1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MCP2221A - Microchip USB to I2C Host Protocol Bridge 4 * 5 * Copyright (c) 2020, Rishi Gupta <gupt21@gmail.com> 6 * 7 * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20005565B.pdf 8 */ 9 10 #include <linux/module.h> 11 #include <linux/err.h> 12 #include <linux/mutex.h> 13 #include <linux/bitfield.h> 14 #include <linux/completion.h> 15 #include <linux/delay.h> 16 #include <linux/hid.h> 17 #include <linux/hidraw.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio/driver.h> 20 #include <linux/iio/iio.h> 21 #include <linux/minmax.h> 22 #include <linux/moduleparam.h> 23 #include "hid-ids.h" 24 25 static bool gpio_mode_enforce; 26 27 module_param(gpio_mode_enforce, bool, 0644); 28 MODULE_PARM_DESC(gpio_mode_enforce, 29 "Enforce GPIO mode for GP0 thru GP3 (default: false, will be used for IIO)"); 30 31 /* Commands codes in a raw output report */ 32 enum { 33 MCP2221_I2C_WR_DATA = 0x90, 34 MCP2221_I2C_WR_NO_STOP = 0x94, 35 MCP2221_I2C_RD_DATA = 0x91, 36 MCP2221_I2C_RD_RPT_START = 0x93, 37 MCP2221_I2C_GET_DATA = 0x40, 38 MCP2221_I2C_PARAM_OR_STATUS = 0x10, 39 MCP2221_I2C_SET_SPEED = 0x20, 40 MCP2221_I2C_CANCEL = 0x10, 41 MCP2221_GPIO_SET = 0x50, 42 MCP2221_GPIO_GET = 0x51, 43 MCP2221_SET_SRAM_SETTINGS = 0x60, 44 MCP2221_GET_SRAM_SETTINGS = 0x61, 45 MCP2221_READ_FLASH_DATA = 0xb0, 46 }; 47 48 /* Response codes in a raw input report */ 49 enum { 50 MCP2221_SUCCESS = 0x00, 51 MCP2221_I2C_ENG_BUSY = 0x01, 52 MCP2221_I2C_START_TOUT = 0x12, 53 MCP2221_I2C_STOP_TOUT = 0x62, 54 MCP2221_I2C_WRADDRL_TOUT = 0x23, 55 MCP2221_I2C_WRDATA_TOUT = 0x44, 56 MCP2221_I2C_WRADDRL_NACK = 0x25, 57 MCP2221_I2C_MASK_ADDR_NACK = 0x40, 58 MCP2221_I2C_WRADDRL_SEND = 0x21, 59 MCP2221_I2C_ADDR_NACK = 0x25, 60 MCP2221_I2C_READ_PARTIAL = 0x54, 61 MCP2221_I2C_READ_COMPL = 0x55, 62 MCP2221_ALT_F_NOT_GPIOV = 0xEE, 63 MCP2221_ALT_F_NOT_GPIOD = 0xEF, 64 }; 65 66 /* MCP SRAM read offsets cmd: MCP2221_GET_SRAM_SETTINGS */ 67 enum { 68 MCP2221_SRAM_RD_GP0 = 22, 69 MCP2221_SRAM_RD_GP1 = 23, 70 MCP2221_SRAM_RD_GP2 = 24, 71 MCP2221_SRAM_RD_GP3 = 25, 72 }; 73 74 /* MCP SRAM write offsets cmd: MCP2221_SET_SRAM_SETTINGS */ 75 enum { 76 MCP2221_SRAM_WR_GP_ENA_ALTER = 7, 77 MCP2221_SRAM_WR_GP0 = 8, 78 MCP2221_SRAM_WR_GP1 = 9, 79 MCP2221_SRAM_WR_GP2 = 10, 80 MCP2221_SRAM_WR_GP3 = 11, 81 }; 82 83 #define MCP2221_SRAM_GP_DESIGN_MASK 0x07 84 #define MCP2221_SRAM_GP_DIRECTION_MASK 0x08 85 #define MCP2221_SRAM_GP_VALUE_MASK 0x10 86 87 /* MCP GPIO direction encoding */ 88 enum { 89 MCP2221_DIR_OUT = 0x00, 90 MCP2221_DIR_IN = 0x01, 91 }; 92 93 #define MCP_NGPIO 4 94 95 /* MCP GPIO set command layout */ 96 struct mcp_set_gpio { 97 u8 cmd; 98 u8 dummy; 99 struct { 100 u8 change_value; 101 u8 value; 102 u8 change_direction; 103 u8 direction; 104 } gpio[MCP_NGPIO]; 105 } __packed; 106 107 /* MCP GPIO get command layout */ 108 struct mcp_get_gpio { 109 u8 cmd; 110 u8 dummy; 111 struct { 112 u8 value; 113 u8 direction; 114 } gpio[MCP_NGPIO]; 115 } __packed; 116 117 /* 118 * There is no way to distinguish responses. Therefore next command 119 * is sent only after response to previous has been received. Mutex 120 * lock is used for this purpose mainly. 121 */ 122 struct mcp2221 { 123 struct hid_device *hdev; 124 struct i2c_adapter adapter; 125 struct mutex lock; 126 struct completion wait_in_report; 127 struct delayed_work init_work; 128 u8 *rxbuf; 129 u8 txbuf[64]; 130 int rxbuf_idx; 131 int rxbuf_size; 132 int status; 133 u8 cur_i2c_clk_div; 134 struct gpio_chip *gc; 135 u8 gp_idx; 136 u8 gpio_dir; 137 u8 mode[4]; 138 #if IS_REACHABLE(CONFIG_IIO) 139 struct iio_chan_spec iio_channels[3]; 140 u16 adc_values[3]; 141 u8 adc_scale; 142 u8 dac_value; 143 u16 dac_scale; 144 #endif 145 }; 146 147 struct mcp2221_iio { 148 struct mcp2221 *mcp; 149 }; 150 151 /* 152 * Default i2c bus clock frequency 400 kHz. Modify this if you 153 * want to set some other frequency (min 50 kHz - max 400 kHz). 154 */ 155 static uint i2c_clk_freq = 400; 156 157 /* Synchronously send output report to the device */ 158 static int mcp_send_report(struct mcp2221 *mcp, 159 u8 *out_report, size_t len) 160 { 161 u8 *buf; 162 int ret; 163 164 buf = kmemdup(out_report, len, GFP_KERNEL); 165 if (!buf) 166 return -ENOMEM; 167 168 /* mcp2221 uses interrupt endpoint for out reports */ 169 ret = hid_hw_output_report(mcp->hdev, buf, len); 170 kfree(buf); 171 172 if (ret < 0) 173 return ret; 174 return 0; 175 } 176 177 /* 178 * Send o/p report to the device and wait for i/p report to be 179 * received from the device. If the device does not respond, 180 * we timeout. 181 */ 182 static int mcp_send_data_req_status(struct mcp2221 *mcp, 183 u8 *out_report, int len) 184 { 185 int ret; 186 unsigned long t; 187 188 reinit_completion(&mcp->wait_in_report); 189 190 ret = mcp_send_report(mcp, out_report, len); 191 if (ret) 192 return ret; 193 194 t = wait_for_completion_timeout(&mcp->wait_in_report, 195 msecs_to_jiffies(4000)); 196 if (!t) 197 return -ETIMEDOUT; 198 199 return mcp->status; 200 } 201 202 /* Check pass/fail for actual communication with i2c slave */ 203 static int mcp_chk_last_cmd_status(struct mcp2221 *mcp) 204 { 205 memset(mcp->txbuf, 0, 8); 206 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 207 208 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 209 } 210 211 /* Cancels last command releasing i2c bus just in case occupied */ 212 static int mcp_cancel_last_cmd(struct mcp2221 *mcp) 213 { 214 memset(mcp->txbuf, 0, 8); 215 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 216 mcp->txbuf[2] = MCP2221_I2C_CANCEL; 217 218 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 219 } 220 221 /* Check if the last command succeeded or failed and return the result. 222 * If the command did fail, cancel that command which will free the i2c bus. 223 */ 224 static int mcp_chk_last_cmd_status_free_bus(struct mcp2221 *mcp) 225 { 226 int ret; 227 228 ret = mcp_chk_last_cmd_status(mcp); 229 if (ret) { 230 /* The last command was a failure. 231 * Send a cancel which will also free the bus. 232 */ 233 usleep_range(980, 1000); 234 mcp_cancel_last_cmd(mcp); 235 } 236 237 return ret; 238 } 239 240 static int mcp_set_i2c_speed(struct mcp2221 *mcp) 241 { 242 int ret; 243 244 memset(mcp->txbuf, 0, 8); 245 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 246 mcp->txbuf[3] = MCP2221_I2C_SET_SPEED; 247 mcp->txbuf[4] = mcp->cur_i2c_clk_div; 248 249 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 8); 250 if (ret) { 251 /* Small delay is needed here */ 252 usleep_range(980, 1000); 253 mcp_cancel_last_cmd(mcp); 254 } 255 256 return 0; 257 } 258 259 /* 260 * An output report can contain minimum 1 and maximum 60 user data 261 * bytes. If the number of data bytes is more then 60, we send it 262 * in chunks of 60 bytes. Last chunk may contain exactly 60 or less 263 * bytes. Total number of bytes is informed in very first report to 264 * mcp2221, from that point onwards it first collect all the data 265 * from host and then send to i2c slave device. 266 */ 267 static int mcp_i2c_write(struct mcp2221 *mcp, 268 struct i2c_msg *msg, int type, u8 last_status) 269 { 270 int ret, len, idx, sent; 271 272 idx = 0; 273 sent = 0; 274 len = min(msg->len, 60); 275 276 do { 277 mcp->txbuf[0] = type; 278 mcp->txbuf[1] = msg->len & 0xff; 279 mcp->txbuf[2] = msg->len >> 8; 280 mcp->txbuf[3] = (u8)(msg->addr << 1); 281 282 memcpy(&mcp->txbuf[4], &msg->buf[idx], len); 283 284 ret = mcp_send_data_req_status(mcp, mcp->txbuf, len + 4); 285 if (ret) 286 return ret; 287 288 usleep_range(980, 1000); 289 290 if (last_status) { 291 ret = mcp_chk_last_cmd_status_free_bus(mcp); 292 if (ret) 293 return ret; 294 } 295 296 sent = sent + len; 297 if (sent >= msg->len) 298 break; 299 300 idx = idx + len; 301 len = min(msg->len - sent, 60); 302 303 /* 304 * Testing shows delay is needed between successive writes 305 * otherwise next write fails on first-try from i2c core. 306 * This value is obtained through automated stress testing. 307 */ 308 usleep_range(980, 1000); 309 } while (len > 0); 310 311 return ret; 312 } 313 314 /* 315 * Device reads all data (0 - 65535 bytes) from i2c slave device and 316 * stores it in device itself. This data is read back from device to 317 * host in multiples of 60 bytes using input reports. 318 */ 319 static int mcp_i2c_smbus_read(struct mcp2221 *mcp, 320 struct i2c_msg *msg, int type, u16 smbus_addr, 321 u8 smbus_len, u8 *smbus_buf) 322 { 323 int ret; 324 u16 total_len; 325 int retries = 0; 326 327 mcp->txbuf[0] = type; 328 if (msg) { 329 mcp->txbuf[1] = msg->len & 0xff; 330 mcp->txbuf[2] = msg->len >> 8; 331 mcp->txbuf[3] = (u8)(msg->addr << 1); 332 total_len = msg->len; 333 mcp->rxbuf = msg->buf; 334 mcp->rxbuf_size = msg->len; 335 } else { 336 mcp->txbuf[1] = smbus_len; 337 mcp->txbuf[2] = 0; 338 mcp->txbuf[3] = (u8)(smbus_addr << 1); 339 total_len = smbus_len; 340 mcp->rxbuf = smbus_buf; 341 mcp->rxbuf_size = smbus_len; 342 } 343 344 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 4); 345 if (ret) 346 goto out; 347 348 mcp->rxbuf_idx = 0; 349 350 do { 351 /* Wait for the data to be read by the device */ 352 usleep_range(980, 1000); 353 354 memset(mcp->txbuf, 0, 4); 355 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 356 357 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 358 if (ret) { 359 if (retries < 5) { 360 /* The data wasn't ready to read. 361 * Wait a bit longer and try again. 362 */ 363 usleep_range(90, 100); 364 retries++; 365 } else { 366 usleep_range(980, 1000); 367 mcp_cancel_last_cmd(mcp); 368 goto out; 369 } 370 } else { 371 retries = 0; 372 } 373 } while (mcp->rxbuf_idx < total_len); 374 375 usleep_range(980, 1000); 376 ret = mcp_chk_last_cmd_status_free_bus(mcp); 377 378 out: 379 mcp->rxbuf = NULL; 380 mcp->rxbuf_size = 0; 381 382 return ret; 383 } 384 385 static int mcp_i2c_xfer(struct i2c_adapter *adapter, 386 struct i2c_msg msgs[], int num) 387 { 388 int ret; 389 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 390 391 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 392 393 mutex_lock(&mcp->lock); 394 395 if (num == 1) { 396 if (msgs->flags & I2C_M_RD) { 397 ret = mcp_i2c_smbus_read(mcp, msgs, MCP2221_I2C_RD_DATA, 398 0, 0, NULL); 399 } else { 400 ret = mcp_i2c_write(mcp, msgs, MCP2221_I2C_WR_DATA, 1); 401 } 402 if (ret) 403 goto exit; 404 ret = num; 405 } else if (num == 2) { 406 /* Ex transaction; send reg address and read its contents */ 407 if (msgs[0].addr == msgs[1].addr && 408 !(msgs[0].flags & I2C_M_RD) && 409 (msgs[1].flags & I2C_M_RD)) { 410 411 ret = mcp_i2c_write(mcp, &msgs[0], 412 MCP2221_I2C_WR_NO_STOP, 0); 413 if (ret) 414 goto exit; 415 416 ret = mcp_i2c_smbus_read(mcp, &msgs[1], 417 MCP2221_I2C_RD_RPT_START, 418 0, 0, NULL); 419 if (ret) 420 goto exit; 421 ret = num; 422 } else { 423 dev_err(&adapter->dev, 424 "unsupported multi-msg i2c transaction\n"); 425 ret = -EOPNOTSUPP; 426 } 427 } else { 428 dev_err(&adapter->dev, 429 "unsupported multi-msg i2c transaction\n"); 430 ret = -EOPNOTSUPP; 431 } 432 433 exit: 434 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 435 mutex_unlock(&mcp->lock); 436 return ret; 437 } 438 439 static int mcp_smbus_write(struct mcp2221 *mcp, u16 addr, 440 u8 command, u8 *buf, u8 len, int type, 441 u8 last_status) 442 { 443 int data_len, ret; 444 445 mcp->txbuf[0] = type; 446 mcp->txbuf[1] = len + 1; /* 1 is due to command byte itself */ 447 mcp->txbuf[2] = 0; 448 mcp->txbuf[3] = (u8)(addr << 1); 449 mcp->txbuf[4] = command; 450 451 switch (len) { 452 case 0: 453 data_len = 5; 454 break; 455 case 1: 456 mcp->txbuf[5] = buf[0]; 457 data_len = 6; 458 break; 459 case 2: 460 mcp->txbuf[5] = buf[0]; 461 mcp->txbuf[6] = buf[1]; 462 data_len = 7; 463 break; 464 default: 465 if (len > I2C_SMBUS_BLOCK_MAX) 466 return -EINVAL; 467 468 memcpy(&mcp->txbuf[5], buf, len); 469 data_len = len + 5; 470 } 471 472 ret = mcp_send_data_req_status(mcp, mcp->txbuf, data_len); 473 if (ret) 474 return ret; 475 476 if (last_status) { 477 usleep_range(980, 1000); 478 479 ret = mcp_chk_last_cmd_status_free_bus(mcp); 480 } 481 482 return ret; 483 } 484 485 static int mcp_smbus_xfer(struct i2c_adapter *adapter, u16 addr, 486 unsigned short flags, char read_write, 487 u8 command, int size, 488 union i2c_smbus_data *data) 489 { 490 int ret; 491 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 492 493 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 494 495 mutex_lock(&mcp->lock); 496 497 switch (size) { 498 499 case I2C_SMBUS_QUICK: 500 if (read_write == I2C_SMBUS_READ) 501 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 502 addr, 0, &data->byte); 503 else 504 ret = mcp_smbus_write(mcp, addr, command, NULL, 505 0, MCP2221_I2C_WR_DATA, 1); 506 break; 507 case I2C_SMBUS_BYTE: 508 if (read_write == I2C_SMBUS_READ) 509 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 510 addr, 1, &data->byte); 511 else 512 ret = mcp_smbus_write(mcp, addr, command, NULL, 513 0, MCP2221_I2C_WR_DATA, 1); 514 break; 515 case I2C_SMBUS_BYTE_DATA: 516 if (read_write == I2C_SMBUS_READ) { 517 ret = mcp_smbus_write(mcp, addr, command, NULL, 518 0, MCP2221_I2C_WR_NO_STOP, 0); 519 if (ret) 520 goto exit; 521 522 ret = mcp_i2c_smbus_read(mcp, NULL, 523 MCP2221_I2C_RD_RPT_START, 524 addr, 1, &data->byte); 525 } else { 526 ret = mcp_smbus_write(mcp, addr, command, &data->byte, 527 1, MCP2221_I2C_WR_DATA, 1); 528 } 529 break; 530 case I2C_SMBUS_WORD_DATA: 531 if (read_write == I2C_SMBUS_READ) { 532 ret = mcp_smbus_write(mcp, addr, command, NULL, 533 0, MCP2221_I2C_WR_NO_STOP, 0); 534 if (ret) 535 goto exit; 536 537 ret = mcp_i2c_smbus_read(mcp, NULL, 538 MCP2221_I2C_RD_RPT_START, 539 addr, 2, (u8 *)&data->word); 540 } else { 541 ret = mcp_smbus_write(mcp, addr, command, 542 (u8 *)&data->word, 2, 543 MCP2221_I2C_WR_DATA, 1); 544 } 545 break; 546 case I2C_SMBUS_BLOCK_DATA: 547 if (read_write == I2C_SMBUS_READ) { 548 ret = mcp_smbus_write(mcp, addr, command, NULL, 549 0, MCP2221_I2C_WR_NO_STOP, 1); 550 if (ret) 551 goto exit; 552 553 ret = mcp_i2c_smbus_read(mcp, NULL, 554 MCP2221_I2C_RD_RPT_START, 555 addr, data->block[0] + 1, 556 data->block); 557 if (ret) 558 goto exit; 559 } else { 560 if (!data->block[0]) { 561 ret = -EINVAL; 562 goto exit; 563 } 564 ret = mcp_smbus_write(mcp, addr, command, data->block, 565 data->block[0] + 1, 566 MCP2221_I2C_WR_DATA, 1); 567 } 568 break; 569 case I2C_SMBUS_I2C_BLOCK_DATA: 570 if (read_write == I2C_SMBUS_READ) { 571 ret = mcp_smbus_write(mcp, addr, command, NULL, 572 0, MCP2221_I2C_WR_NO_STOP, 0); 573 if (ret) 574 goto exit; 575 576 ret = mcp_i2c_smbus_read(mcp, NULL, 577 MCP2221_I2C_RD_RPT_START, 578 addr, data->block[0], 579 &data->block[1]); 580 if (ret) 581 goto exit; 582 } else { 583 if (!data->block[0]) { 584 ret = -EINVAL; 585 goto exit; 586 } 587 ret = mcp_smbus_write(mcp, addr, command, 588 &data->block[1], data->block[0], 589 MCP2221_I2C_WR_DATA, 1); 590 } 591 break; 592 case I2C_SMBUS_PROC_CALL: 593 ret = mcp_smbus_write(mcp, addr, command, 594 (u8 *)&data->word, 595 2, MCP2221_I2C_WR_NO_STOP, 0); 596 if (ret) 597 goto exit; 598 599 ret = mcp_i2c_smbus_read(mcp, NULL, 600 MCP2221_I2C_RD_RPT_START, 601 addr, 2, (u8 *)&data->word); 602 break; 603 case I2C_SMBUS_BLOCK_PROC_CALL: 604 ret = mcp_smbus_write(mcp, addr, command, data->block, 605 data->block[0] + 1, 606 MCP2221_I2C_WR_NO_STOP, 0); 607 if (ret) 608 goto exit; 609 610 ret = mcp_i2c_smbus_read(mcp, NULL, 611 MCP2221_I2C_RD_RPT_START, 612 addr, I2C_SMBUS_BLOCK_MAX, 613 data->block); 614 break; 615 default: 616 dev_err(&mcp->adapter.dev, 617 "unsupported smbus transaction size:%d\n", size); 618 ret = -EOPNOTSUPP; 619 } 620 621 exit: 622 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 623 mutex_unlock(&mcp->lock); 624 return ret; 625 } 626 627 static u32 mcp_i2c_func(struct i2c_adapter *adapter) 628 { 629 return I2C_FUNC_I2C | 630 I2C_FUNC_SMBUS_READ_BLOCK_DATA | 631 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 632 (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_PEC); 633 } 634 635 static const struct i2c_algorithm mcp_i2c_algo = { 636 .master_xfer = mcp_i2c_xfer, 637 .smbus_xfer = mcp_smbus_xfer, 638 .functionality = mcp_i2c_func, 639 }; 640 641 #if IS_REACHABLE(CONFIG_GPIOLIB) 642 static int mcp_gpio_read_sram(struct mcp2221 *mcp) 643 { 644 int ret; 645 646 memset(mcp->txbuf, 0, 64); 647 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 648 649 mutex_lock(&mcp->lock); 650 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 651 mutex_unlock(&mcp->lock); 652 653 return ret; 654 } 655 656 /* 657 * If CONFIG_IIO is not enabled, check for the gpio pins 658 * if they are in gpio mode. For the ones which are not 659 * in gpio mode, set them into gpio mode. 660 */ 661 static int mcp2221_check_gpio_pinfunc(struct mcp2221 *mcp) 662 { 663 int i; 664 int needgpiofix = 0; 665 int ret; 666 667 if (IS_ENABLED(CONFIG_IIO) && !gpio_mode_enforce) 668 return 0; 669 670 ret = mcp_gpio_read_sram(mcp); 671 if (ret) 672 return ret; 673 674 for (i = 0; i < MCP_NGPIO; i++) { 675 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) != 0x0) { 676 dev_warn(&mcp->hdev->dev, 677 "GPIO %d not in gpio mode\n", i); 678 needgpiofix = 1; 679 } 680 } 681 682 if (!needgpiofix) 683 return 0; 684 685 /* 686 * Set all bytes to 0, so Bit 7 is not set. The chip 687 * only changes content of a register when bit 7 is set. 688 */ 689 memset(mcp->txbuf, 0, 64); 690 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 691 692 /* 693 * Set bit 7 in MCP2221_SRAM_WR_GP_ENA_ALTER to enable 694 * loading of a new set of gpio settings to GP SRAM 695 */ 696 mcp->txbuf[MCP2221_SRAM_WR_GP_ENA_ALTER] = 0x80; 697 for (i = 0; i < MCP_NGPIO; i++) { 698 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) == 0x0) { 699 /* write current GPIO mode */ 700 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = mcp->mode[i]; 701 } else { 702 /* pin is not in gpio mode, set it to input mode */ 703 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = 0x08; 704 dev_warn(&mcp->hdev->dev, 705 "Set GPIO mode for gpio pin %d!\n", i); 706 } 707 } 708 709 mutex_lock(&mcp->lock); 710 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 711 mutex_unlock(&mcp->lock); 712 713 return ret; 714 } 715 716 static int mcp_gpio_get(struct gpio_chip *gc, 717 unsigned int offset) 718 { 719 int ret; 720 struct mcp2221 *mcp = gpiochip_get_data(gc); 721 722 mcp->txbuf[0] = MCP2221_GPIO_GET; 723 724 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 725 726 mutex_lock(&mcp->lock); 727 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 728 mutex_unlock(&mcp->lock); 729 730 return ret; 731 } 732 733 static int mcp_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 734 { 735 struct mcp2221 *mcp = gpiochip_get_data(gc); 736 int ret; 737 738 memset(mcp->txbuf, 0, 18); 739 mcp->txbuf[0] = MCP2221_GPIO_SET; 740 741 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].value); 742 743 mcp->txbuf[mcp->gp_idx - 1] = 1; 744 mcp->txbuf[mcp->gp_idx] = !!value; 745 746 mutex_lock(&mcp->lock); 747 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 18); 748 mutex_unlock(&mcp->lock); 749 750 return ret; 751 } 752 753 static int mcp_gpio_dir_set(struct mcp2221 *mcp, 754 unsigned int offset, u8 val) 755 { 756 memset(mcp->txbuf, 0, 18); 757 mcp->txbuf[0] = MCP2221_GPIO_SET; 758 759 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].direction); 760 761 mcp->txbuf[mcp->gp_idx - 1] = 1; 762 mcp->txbuf[mcp->gp_idx] = val; 763 764 return mcp_send_data_req_status(mcp, mcp->txbuf, 18); 765 } 766 767 static int mcp_gpio_direction_input(struct gpio_chip *gc, 768 unsigned int offset) 769 { 770 int ret; 771 struct mcp2221 *mcp = gpiochip_get_data(gc); 772 773 mutex_lock(&mcp->lock); 774 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_IN); 775 mutex_unlock(&mcp->lock); 776 777 return ret; 778 } 779 780 static int mcp_gpio_direction_output(struct gpio_chip *gc, 781 unsigned int offset, int value) 782 { 783 int ret; 784 struct mcp2221 *mcp = gpiochip_get_data(gc); 785 786 mutex_lock(&mcp->lock); 787 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_OUT); 788 mutex_unlock(&mcp->lock); 789 790 /* Can't configure as output, bailout early */ 791 if (ret) 792 return ret; 793 794 mcp_gpio_set(gc, offset, value); 795 796 return 0; 797 } 798 799 static int mcp_gpio_get_direction(struct gpio_chip *gc, 800 unsigned int offset) 801 { 802 int ret; 803 struct mcp2221 *mcp = gpiochip_get_data(gc); 804 805 mcp->txbuf[0] = MCP2221_GPIO_GET; 806 807 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 808 809 mutex_lock(&mcp->lock); 810 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 811 mutex_unlock(&mcp->lock); 812 813 if (ret) 814 return ret; 815 816 if (mcp->gpio_dir == MCP2221_DIR_IN) 817 return GPIO_LINE_DIRECTION_IN; 818 819 return GPIO_LINE_DIRECTION_OUT; 820 } 821 #endif 822 823 /* Gives current state of i2c engine inside mcp2221 */ 824 static int mcp_get_i2c_eng_state(struct mcp2221 *mcp, 825 u8 *data, u8 idx) 826 { 827 int ret; 828 829 switch (data[idx]) { 830 case MCP2221_I2C_WRADDRL_NACK: 831 case MCP2221_I2C_WRADDRL_SEND: 832 ret = -ENXIO; 833 break; 834 case MCP2221_I2C_START_TOUT: 835 case MCP2221_I2C_STOP_TOUT: 836 case MCP2221_I2C_WRADDRL_TOUT: 837 case MCP2221_I2C_WRDATA_TOUT: 838 ret = -ETIMEDOUT; 839 break; 840 case MCP2221_I2C_ENG_BUSY: 841 ret = -EAGAIN; 842 break; 843 case MCP2221_SUCCESS: 844 ret = 0x00; 845 break; 846 default: 847 ret = -EIO; 848 } 849 850 return ret; 851 } 852 853 /* 854 * MCP2221 uses interrupt endpoint for input reports. This function 855 * is called by HID layer when it receives i/p report from mcp2221, 856 * which is actually a response to the previously sent command. 857 * 858 * MCP2221A firmware specific return codes are parsed and 0 or 859 * appropriate negative error code is returned. Delayed response 860 * results in timeout error and stray reponses results in -EIO. 861 */ 862 static int mcp2221_raw_event(struct hid_device *hdev, 863 struct hid_report *report, u8 *data, int size) 864 { 865 u8 *buf; 866 struct mcp2221 *mcp = hid_get_drvdata(hdev); 867 868 if (size < 4) 869 return 0; 870 871 switch (data[0]) { 872 873 case MCP2221_I2C_WR_DATA: 874 case MCP2221_I2C_WR_NO_STOP: 875 case MCP2221_I2C_RD_DATA: 876 case MCP2221_I2C_RD_RPT_START: 877 switch (data[1]) { 878 case MCP2221_SUCCESS: 879 mcp->status = 0; 880 break; 881 default: 882 mcp->status = mcp_get_i2c_eng_state(mcp, data, 2); 883 } 884 complete(&mcp->wait_in_report); 885 break; 886 887 case MCP2221_I2C_PARAM_OR_STATUS: 888 switch (data[1]) { 889 case MCP2221_SUCCESS: 890 if ((mcp->txbuf[3] == MCP2221_I2C_SET_SPEED) && 891 (data[3] != MCP2221_I2C_SET_SPEED)) { 892 mcp->status = -EAGAIN; 893 break; 894 } 895 if (data[20] & MCP2221_I2C_MASK_ADDR_NACK) { 896 mcp->status = -ENXIO; 897 break; 898 } 899 mcp->status = mcp_get_i2c_eng_state(mcp, data, 8); 900 #if IS_REACHABLE(CONFIG_IIO) 901 memcpy(&mcp->adc_values, &data[50], sizeof(mcp->adc_values)); 902 #endif 903 break; 904 default: 905 mcp->status = -EIO; 906 } 907 complete(&mcp->wait_in_report); 908 break; 909 910 case MCP2221_I2C_GET_DATA: 911 switch (data[1]) { 912 case MCP2221_SUCCESS: 913 if (data[2] == MCP2221_I2C_ADDR_NACK) { 914 mcp->status = -ENXIO; 915 break; 916 } 917 if (!mcp_get_i2c_eng_state(mcp, data, 2) 918 && (data[3] == 0)) { 919 mcp->status = 0; 920 break; 921 } 922 if (data[3] == 127) { 923 mcp->status = -EIO; 924 break; 925 } 926 if (data[2] == MCP2221_I2C_READ_COMPL || 927 data[2] == MCP2221_I2C_READ_PARTIAL) { 928 if (!mcp->rxbuf || mcp->rxbuf_idx < 0 || data[3] > 60) { 929 mcp->status = -EINVAL; 930 break; 931 } 932 if (mcp->rxbuf_idx + data[3] > mcp->rxbuf_size) { 933 mcp->status = -EINVAL; 934 break; 935 } 936 if (4 + data[3] > size) { 937 mcp->status = -EINVAL; 938 break; 939 } 940 buf = mcp->rxbuf; 941 memcpy(&buf[mcp->rxbuf_idx], &data[4], data[3]); 942 mcp->rxbuf_idx = mcp->rxbuf_idx + data[3]; 943 mcp->status = 0; 944 break; 945 } 946 mcp->status = -EIO; 947 break; 948 default: 949 mcp->status = -EIO; 950 } 951 complete(&mcp->wait_in_report); 952 break; 953 954 case MCP2221_GPIO_GET: 955 switch (data[1]) { 956 case MCP2221_SUCCESS: 957 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 958 (data[mcp->gp_idx + 1] == MCP2221_ALT_F_NOT_GPIOD)) { 959 mcp->status = -ENOENT; 960 } else { 961 mcp->status = !!data[mcp->gp_idx]; 962 mcp->gpio_dir = data[mcp->gp_idx + 1]; 963 } 964 break; 965 default: 966 mcp->status = -EAGAIN; 967 } 968 complete(&mcp->wait_in_report); 969 break; 970 971 case MCP2221_GPIO_SET: 972 switch (data[1]) { 973 case MCP2221_SUCCESS: 974 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 975 (data[mcp->gp_idx - 1] == MCP2221_ALT_F_NOT_GPIOV)) { 976 mcp->status = -ENOENT; 977 } else { 978 mcp->status = 0; 979 } 980 break; 981 default: 982 mcp->status = -EAGAIN; 983 } 984 complete(&mcp->wait_in_report); 985 break; 986 987 case MCP2221_SET_SRAM_SETTINGS: 988 switch (data[1]) { 989 case MCP2221_SUCCESS: 990 mcp->status = 0; 991 break; 992 default: 993 mcp->status = -EAGAIN; 994 } 995 complete(&mcp->wait_in_report); 996 break; 997 998 case MCP2221_GET_SRAM_SETTINGS: 999 switch (data[1]) { 1000 case MCP2221_SUCCESS: 1001 memcpy(&mcp->mode, &data[22], 4); 1002 #if IS_REACHABLE(CONFIG_IIO) 1003 mcp->dac_value = data[6] & GENMASK(4, 0); 1004 #endif 1005 mcp->status = 0; 1006 break; 1007 default: 1008 mcp->status = -EAGAIN; 1009 } 1010 complete(&mcp->wait_in_report); 1011 break; 1012 1013 case MCP2221_READ_FLASH_DATA: 1014 switch (data[1]) { 1015 case MCP2221_SUCCESS: 1016 mcp->status = 0; 1017 1018 /* Only handles CHIP SETTINGS subpage currently */ 1019 if (mcp->txbuf[1] != 0) { 1020 mcp->status = -EIO; 1021 break; 1022 } 1023 1024 #if IS_REACHABLE(CONFIG_IIO) 1025 { 1026 u8 tmp; 1027 /* DAC scale value */ 1028 tmp = FIELD_GET(GENMASK(7, 6), data[6]); 1029 if ((data[6] & BIT(5)) && tmp) 1030 mcp->dac_scale = tmp + 4; 1031 else 1032 mcp->dac_scale = 5; 1033 1034 /* ADC scale value */ 1035 tmp = FIELD_GET(GENMASK(4, 3), data[7]); 1036 if ((data[7] & BIT(2)) && tmp) 1037 mcp->adc_scale = tmp - 1; 1038 else 1039 mcp->adc_scale = 0; 1040 } 1041 #endif 1042 1043 break; 1044 default: 1045 mcp->status = -EAGAIN; 1046 } 1047 complete(&mcp->wait_in_report); 1048 break; 1049 1050 default: 1051 mcp->status = -EIO; 1052 complete(&mcp->wait_in_report); 1053 } 1054 1055 return 1; 1056 } 1057 1058 /* Device resource managed function for HID unregistration */ 1059 static void mcp2221_hid_unregister(void *ptr) 1060 { 1061 struct hid_device *hdev = ptr; 1062 1063 if (hdev->io_started) 1064 hid_device_io_stop(hdev); 1065 hid_hw_close(hdev); 1066 hid_hw_stop(hdev); 1067 } 1068 1069 /* This is needed to be sure hid_hw_stop() isn't called twice by the subsystem */ 1070 static void mcp2221_remove(struct hid_device *hdev) 1071 { 1072 #if IS_REACHABLE(CONFIG_IIO) 1073 struct mcp2221 *mcp = hid_get_drvdata(hdev); 1074 1075 if (!gpio_mode_enforce) 1076 cancel_delayed_work_sync(&mcp->init_work); 1077 #endif 1078 } 1079 1080 #if IS_REACHABLE(CONFIG_IIO) 1081 static int mcp2221_read_raw(struct iio_dev *indio_dev, 1082 struct iio_chan_spec const *channel, int *val, 1083 int *val2, long mask) 1084 { 1085 struct mcp2221_iio *priv = iio_priv(indio_dev); 1086 struct mcp2221 *mcp = priv->mcp; 1087 int ret; 1088 1089 if (mask == IIO_CHAN_INFO_SCALE) { 1090 if (channel->output) 1091 *val = 1 << mcp->dac_scale; 1092 else 1093 *val = 1 << mcp->adc_scale; 1094 1095 return IIO_VAL_INT; 1096 } 1097 1098 mutex_lock(&mcp->lock); 1099 1100 if (channel->output) { 1101 *val = mcp->dac_value; 1102 ret = IIO_VAL_INT; 1103 } else { 1104 /* Read ADC values */ 1105 ret = mcp_chk_last_cmd_status(mcp); 1106 1107 if (!ret) { 1108 *val = le16_to_cpu((__force __le16) mcp->adc_values[channel->address]); 1109 if (*val >= BIT(10)) 1110 ret = -EINVAL; 1111 else 1112 ret = IIO_VAL_INT; 1113 } 1114 } 1115 1116 mutex_unlock(&mcp->lock); 1117 1118 return ret; 1119 } 1120 1121 static int mcp2221_write_raw(struct iio_dev *indio_dev, 1122 struct iio_chan_spec const *chan, 1123 int val, int val2, long mask) 1124 { 1125 struct mcp2221_iio *priv = iio_priv(indio_dev); 1126 struct mcp2221 *mcp = priv->mcp; 1127 int ret; 1128 1129 if (val < 0 || val >= BIT(5)) 1130 return -EINVAL; 1131 1132 mutex_lock(&mcp->lock); 1133 1134 memset(mcp->txbuf, 0, 12); 1135 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 1136 mcp->txbuf[4] = BIT(7) | val; 1137 1138 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 12); 1139 if (!ret) 1140 mcp->dac_value = val; 1141 1142 mutex_unlock(&mcp->lock); 1143 1144 return ret; 1145 } 1146 1147 static const struct iio_info mcp2221_info = { 1148 .read_raw = &mcp2221_read_raw, 1149 .write_raw = &mcp2221_write_raw, 1150 }; 1151 1152 static int mcp_iio_channels(struct mcp2221 *mcp) 1153 { 1154 int idx, cnt = 0; 1155 bool dac_created = false; 1156 1157 /* GP0 doesn't have ADC/DAC alternative function */ 1158 for (idx = 1; idx < MCP_NGPIO; idx++) { 1159 struct iio_chan_spec *chan = &mcp->iio_channels[cnt]; 1160 1161 switch (mcp->mode[idx]) { 1162 case 2: 1163 chan->address = idx - 1; 1164 chan->channel = cnt++; 1165 break; 1166 case 3: 1167 /* GP1 doesn't have DAC alternative function */ 1168 if (idx == 1 || dac_created) 1169 continue; 1170 /* DAC1 and DAC2 outputs are connected to the same DAC */ 1171 dac_created = true; 1172 chan->output = 1; 1173 cnt++; 1174 break; 1175 default: 1176 continue; 1177 } 1178 1179 chan->type = IIO_VOLTAGE; 1180 chan->indexed = 1; 1181 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 1182 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 1183 chan->scan_index = -1; 1184 } 1185 1186 return cnt; 1187 } 1188 1189 static void mcp_init_work(struct work_struct *work) 1190 { 1191 struct iio_dev *indio_dev; 1192 struct mcp2221 *mcp = container_of(work, struct mcp2221, init_work.work); 1193 struct mcp2221_iio *data; 1194 static int retries = 5; 1195 int ret, num_channels; 1196 1197 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 1198 mutex_lock(&mcp->lock); 1199 1200 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 1201 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 1202 1203 if (ret == -EAGAIN) 1204 goto reschedule_task; 1205 1206 num_channels = mcp_iio_channels(mcp); 1207 if (!num_channels) 1208 goto unlock; 1209 1210 mcp->txbuf[0] = MCP2221_READ_FLASH_DATA; 1211 mcp->txbuf[1] = 0; 1212 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 2); 1213 1214 if (ret == -EAGAIN) 1215 goto reschedule_task; 1216 1217 indio_dev = devm_iio_device_alloc(&mcp->hdev->dev, sizeof(*data)); 1218 if (!indio_dev) 1219 goto unlock; 1220 1221 data = iio_priv(indio_dev); 1222 data->mcp = mcp; 1223 1224 indio_dev->name = "mcp2221"; 1225 indio_dev->modes = INDIO_DIRECT_MODE; 1226 indio_dev->info = &mcp2221_info; 1227 indio_dev->channels = mcp->iio_channels; 1228 indio_dev->num_channels = num_channels; 1229 1230 devm_iio_device_register(&mcp->hdev->dev, indio_dev); 1231 1232 unlock: 1233 mutex_unlock(&mcp->lock); 1234 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1235 1236 return; 1237 1238 reschedule_task: 1239 mutex_unlock(&mcp->lock); 1240 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1241 1242 if (!retries--) 1243 return; 1244 1245 /* Device is not ready to read SRAM or FLASH data, try again */ 1246 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1247 } 1248 #endif 1249 1250 static int mcp2221_probe(struct hid_device *hdev, 1251 const struct hid_device_id *id) 1252 { 1253 int ret; 1254 struct mcp2221 *mcp; 1255 1256 mcp = devm_kzalloc(&hdev->dev, sizeof(*mcp), GFP_KERNEL); 1257 if (!mcp) 1258 return -ENOMEM; 1259 1260 ret = hid_parse(hdev); 1261 if (ret) { 1262 hid_err(hdev, "can't parse reports\n"); 1263 return ret; 1264 } 1265 1266 /* 1267 * This driver uses the .raw_event callback and therefore does not need any 1268 * HID_CONNECT_xxx flags. 1269 */ 1270 ret = hid_hw_start(hdev, 0); 1271 if (ret) { 1272 hid_err(hdev, "can't start hardware\n"); 1273 return ret; 1274 } 1275 1276 hid_info(hdev, "USB HID v%x.%02x Device [%s] on %s\n", hdev->version >> 8, 1277 hdev->version & 0xff, hdev->name, hdev->phys); 1278 1279 ret = hid_hw_open(hdev); 1280 if (ret) { 1281 hid_err(hdev, "can't open device\n"); 1282 hid_hw_stop(hdev); 1283 return ret; 1284 } 1285 1286 mutex_init(&mcp->lock); 1287 init_completion(&mcp->wait_in_report); 1288 hid_set_drvdata(hdev, mcp); 1289 mcp->hdev = hdev; 1290 1291 ret = devm_add_action_or_reset(&hdev->dev, mcp2221_hid_unregister, hdev); 1292 if (ret) 1293 return ret; 1294 1295 hid_device_io_start(hdev); 1296 1297 /* Set I2C bus clock diviser */ 1298 if (i2c_clk_freq > 400) 1299 i2c_clk_freq = 400; 1300 if (i2c_clk_freq < 50) 1301 i2c_clk_freq = 50; 1302 mcp->cur_i2c_clk_div = (12000000 / (i2c_clk_freq * 1000)) - 3; 1303 ret = mcp_set_i2c_speed(mcp); 1304 if (ret) { 1305 hid_err(hdev, "can't set i2c speed: %d\n", ret); 1306 return ret; 1307 } 1308 1309 mcp->adapter.owner = THIS_MODULE; 1310 mcp->adapter.class = I2C_CLASS_HWMON; 1311 mcp->adapter.algo = &mcp_i2c_algo; 1312 mcp->adapter.retries = 1; 1313 mcp->adapter.dev.parent = &hdev->dev; 1314 ACPI_COMPANION_SET(&mcp->adapter.dev, ACPI_COMPANION(hdev->dev.parent)); 1315 snprintf(mcp->adapter.name, sizeof(mcp->adapter.name), 1316 "MCP2221 usb-i2c bridge"); 1317 1318 i2c_set_adapdata(&mcp->adapter, mcp); 1319 ret = devm_i2c_add_adapter(&hdev->dev, &mcp->adapter); 1320 if (ret) { 1321 hid_err(hdev, "can't add usb-i2c adapter: %d\n", ret); 1322 return ret; 1323 } 1324 1325 #if IS_REACHABLE(CONFIG_GPIOLIB) 1326 /* Setup GPIO chip */ 1327 mcp->gc = devm_kzalloc(&hdev->dev, sizeof(*mcp->gc), GFP_KERNEL); 1328 if (!mcp->gc) 1329 return -ENOMEM; 1330 1331 mcp->gc->label = "mcp2221_gpio"; 1332 mcp->gc->direction_input = mcp_gpio_direction_input; 1333 mcp->gc->direction_output = mcp_gpio_direction_output; 1334 mcp->gc->get_direction = mcp_gpio_get_direction; 1335 mcp->gc->set = mcp_gpio_set; 1336 mcp->gc->get = mcp_gpio_get; 1337 mcp->gc->ngpio = MCP_NGPIO; 1338 mcp->gc->base = -1; 1339 mcp->gc->can_sleep = 1; 1340 mcp->gc->parent = &hdev->dev; 1341 1342 ret = devm_gpiochip_add_data(&hdev->dev, mcp->gc, mcp); 1343 if (ret) 1344 return ret; 1345 1346 mcp2221_check_gpio_pinfunc(mcp); 1347 #endif 1348 1349 #if IS_REACHABLE(CONFIG_IIO) 1350 if (!gpio_mode_enforce) { 1351 INIT_DELAYED_WORK(&mcp->init_work, mcp_init_work); 1352 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1353 } 1354 #endif 1355 1356 return 0; 1357 } 1358 1359 static const struct hid_device_id mcp2221_devices[] = { 1360 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_MCP2221) }, 1361 { } 1362 }; 1363 MODULE_DEVICE_TABLE(hid, mcp2221_devices); 1364 1365 static struct hid_driver mcp2221_driver = { 1366 .name = "mcp2221", 1367 .id_table = mcp2221_devices, 1368 .probe = mcp2221_probe, 1369 .remove = mcp2221_remove, 1370 .raw_event = mcp2221_raw_event, 1371 }; 1372 1373 /* Register with HID core */ 1374 module_hid_driver(mcp2221_driver); 1375 1376 MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>"); 1377 MODULE_DESCRIPTION("MCP2221 Microchip HID USB to I2C master bridge"); 1378 MODULE_LICENSE("GPL v2"); 1379