1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8226-tsens 33 - qcom,msm8909-tsens 34 - qcom,msm8916-tsens 35 - qcom,msm8939-tsens 36 - qcom,msm8974-tsens 37 - const: qcom,tsens-v0_1 38 39 - description: 40 v1 of TSENS without RPM which requires to be explicitly reset 41 and enabled in the driver. 42 enum: 43 - qcom,ipq5018-tsens 44 45 - description: v1 of TSENS 46 items: 47 - enum: 48 - qcom,msm8937-tsens 49 - qcom,msm8956-tsens 50 - qcom,msm8976-tsens 51 - qcom,qcs404-tsens 52 - const: qcom,tsens-v1 53 54 - description: v2 of TSENS 55 items: 56 - enum: 57 - qcom,eliza-tsens 58 - qcom,glymur-tsens 59 - qcom,hawi-tsens 60 - qcom,kaanapali-tsens 61 - qcom,maili-tsens 62 - qcom,milos-tsens 63 - qcom,nord-tsens 64 - qcom,msm8953-tsens 65 - qcom,msm8996-tsens 66 - qcom,msm8998-tsens 67 - qcom,qcm2290-tsens 68 - qcom,qcs8300-tsens 69 - qcom,qcs615-tsens 70 - qcom,sa8255p-tsens 71 - qcom,sa8775p-tsens 72 - qcom,sar2130p-tsens 73 - qcom,sc7180-tsens 74 - qcom,sc7280-tsens 75 - qcom,sc8180x-tsens 76 - qcom,sc8280xp-tsens 77 - qcom,sdm630-tsens 78 - qcom,sdm670-tsens 79 - qcom,sdm845-tsens 80 - qcom,shikra-tsens 81 - qcom,sm6115-tsens 82 - qcom,sm6350-tsens 83 - qcom,sm6375-tsens 84 - qcom,sm8150-tsens 85 - qcom,sm8250-tsens 86 - qcom,sm8350-tsens 87 - qcom,sm8450-tsens 88 - qcom,sm8550-tsens 89 - qcom,sm8650-tsens 90 - qcom,sm8750-tsens 91 - qcom,x1e80100-tsens 92 - const: qcom,tsens-v2 93 94 - description: v2 of TSENS with combined interrupt 95 enum: 96 - qcom,ipq5332-tsens 97 - qcom,ipq5424-tsens 98 - qcom,ipq8074-tsens 99 100 - description: v2 of TSENS with combined interrupt 101 items: 102 - enum: 103 - qcom,ipq6018-tsens 104 - qcom,ipq9574-tsens 105 - const: qcom,ipq8074-tsens 106 107 reg: 108 items: 109 - description: TM registers 110 - description: SROT registers 111 112 interrupts: 113 minItems: 1 114 maxItems: 2 115 116 interrupt-names: 117 minItems: 1 118 maxItems: 2 119 120 nvmem-cells: 121 oneOf: 122 - minItems: 1 123 maxItems: 2 124 description: 125 Reference to an nvmem node for the calibration data 126 - minItems: 5 127 maxItems: 35 128 description: | 129 Reference to nvmem cells for the calibration mode, two calibration 130 bases and two cells per each sensor 131 # special case for msm8974 / apq8084 132 - maxItems: 51 133 description: | 134 Reference to nvmem cells for the calibration mode, two calibration 135 bases and two cells per each sensor, main and backup copies, plus use_backup cell 136 137 nvmem-cell-names: 138 oneOf: 139 - minItems: 1 140 items: 141 - const: calib 142 - enum: 143 - calib_backup 144 - calib_sel 145 - minItems: 5 146 items: 147 - const: mode 148 - const: base1 149 - const: base2 150 - pattern: '^s[0-9]+_p1$' 151 - pattern: '^s[0-9]+_p2$' 152 - pattern: '^s[0-9]+_p1$' 153 - pattern: '^s[0-9]+_p2$' 154 - pattern: '^s[0-9]+_p1$' 155 - pattern: '^s[0-9]+_p2$' 156 - pattern: '^s[0-9]+_p1$' 157 - pattern: '^s[0-9]+_p2$' 158 - pattern: '^s[0-9]+_p1$' 159 - pattern: '^s[0-9]+_p2$' 160 - pattern: '^s[0-9]+_p1$' 161 - pattern: '^s[0-9]+_p2$' 162 - pattern: '^s[0-9]+_p1$' 163 - pattern: '^s[0-9]+_p2$' 164 - pattern: '^s[0-9]+_p1$' 165 - pattern: '^s[0-9]+_p2$' 166 - pattern: '^s[0-9]+_p1$' 167 - pattern: '^s[0-9]+_p2$' 168 - pattern: '^s[0-9]+_p1$' 169 - pattern: '^s[0-9]+_p2$' 170 - pattern: '^s[0-9]+_p1$' 171 - pattern: '^s[0-9]+_p2$' 172 - pattern: '^s[0-9]+_p1$' 173 - pattern: '^s[0-9]+_p2$' 174 - pattern: '^s[0-9]+_p1$' 175 - pattern: '^s[0-9]+_p2$' 176 - pattern: '^s[0-9]+_p1$' 177 - pattern: '^s[0-9]+_p2$' 178 - pattern: '^s[0-9]+_p1$' 179 - pattern: '^s[0-9]+_p2$' 180 - pattern: '^s[0-9]+_p1$' 181 - pattern: '^s[0-9]+_p2$' 182 # special case for msm8974 / apq8084 183 - items: 184 - const: mode 185 - const: base1 186 - const: base2 187 - const: use_backup 188 - const: mode_backup 189 - const: base1_backup 190 - const: base2_backup 191 - const: s0_p1 192 - const: s0_p2 193 - const: s1_p1 194 - const: s1_p2 195 - const: s2_p1 196 - const: s2_p2 197 - const: s3_p1 198 - const: s3_p2 199 - const: s4_p1 200 - const: s4_p2 201 - const: s5_p1 202 - const: s5_p2 203 - const: s6_p1 204 - const: s6_p2 205 - const: s7_p1 206 - const: s7_p2 207 - const: s8_p1 208 - const: s8_p2 209 - const: s9_p1 210 - const: s9_p2 211 - const: s10_p1 212 - const: s10_p2 213 - const: s0_p1_backup 214 - const: s0_p2_backup 215 - const: s1_p1_backup 216 - const: s1_p2_backup 217 - const: s2_p1_backup 218 - const: s2_p2_backup 219 - const: s3_p1_backup 220 - const: s3_p2_backup 221 - const: s4_p1_backup 222 - const: s4_p2_backup 223 - const: s5_p1_backup 224 - const: s5_p2_backup 225 - const: s6_p1_backup 226 - const: s6_p2_backup 227 - const: s7_p1_backup 228 - const: s7_p2_backup 229 - const: s8_p1_backup 230 - const: s8_p2_backup 231 - const: s9_p1_backup 232 - const: s9_p2_backup 233 - const: s10_p1_backup 234 - const: s10_p2_backup 235 - minItems: 8 236 items: 237 - const: mode 238 - const: base0 239 - const: base1 240 - pattern: '^tsens_sens[0-9]+_off$' 241 - pattern: '^tsens_sens[0-9]+_off$' 242 - pattern: '^tsens_sens[0-9]+_off$' 243 - pattern: '^tsens_sens[0-9]+_off$' 244 - pattern: '^tsens_sens[0-9]+_off$' 245 - pattern: '^tsens_sens[0-9]+_off$' 246 - pattern: '^tsens_sens[0-9]+_off$' 247 248 "#qcom,sensors": 249 description: 250 Number of sensors enabled on this platform 251 $ref: /schemas/types.yaml#/definitions/uint32 252 minimum: 1 253 maximum: 16 254 255 "#thermal-sensor-cells": 256 const: 1 257 258required: 259 - compatible 260 - interrupts 261 - interrupt-names 262 - "#qcom,sensors" 263 264allOf: 265 - $ref: thermal-sensor.yaml# 266 267 - if: 268 properties: 269 compatible: 270 contains: 271 enum: 272 - qcom,ipq5018-tsens 273 - qcom,ipq8064-tsens 274 - qcom,msm8960-tsens 275 - qcom,tsens-v0_1 276 - qcom,tsens-v1 277 then: 278 properties: 279 interrupts: 280 items: 281 - description: Combined interrupt if upper or lower threshold crossed 282 interrupt-names: 283 items: 284 - const: uplow 285 286 - if: 287 properties: 288 compatible: 289 contains: 290 const: qcom,tsens-v2 291 then: 292 properties: 293 interrupts: 294 items: 295 - description: Combined interrupt if upper or lower threshold crossed 296 - description: Interrupt if critical threshold crossed 297 interrupt-names: 298 items: 299 - const: uplow 300 - const: critical 301 302 - if: 303 properties: 304 compatible: 305 contains: 306 enum: 307 - qcom,ipq5332-tsens 308 - qcom,ipq5424-tsens 309 - qcom,ipq8074-tsens 310 then: 311 properties: 312 interrupts: 313 items: 314 - description: Combined interrupt if upper, lower or critical thresholds crossed 315 interrupt-names: 316 items: 317 - const: combined 318 319 - if: 320 properties: 321 compatible: 322 contains: 323 enum: 324 - qcom,ipq5332-tsens 325 - qcom,ipq5424-tsens 326 - qcom,ipq8074-tsens 327 - qcom,tsens-v0_1 328 - qcom,tsens-v1 329 - qcom,tsens-v2 330 331 then: 332 required: 333 - reg 334 335unevaluatedProperties: false 336 337examples: 338 - | 339 #include <dt-bindings/interrupt-controller/arm-gic.h> 340 thermal-sensor { 341 compatible = "qcom,ipq8064-tsens"; 342 343 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 344 nvmem-cell-names = "calib", "calib_backup"; 345 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 346 interrupt-names = "uplow"; 347 348 #qcom,sensors = <11>; 349 #thermal-sensor-cells = <1>; 350 }; 351 352 - | 353 #include <dt-bindings/interrupt-controller/arm-gic.h> 354 // Example 1 (new calibration data: for pre v1 IP): 355 thermal-sensor@4a9000 { 356 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 357 reg = <0x4a9000 0x1000>, /* TM */ 358 <0x4a8000 0x1000>; /* SROT */ 359 360 nvmem-cells = <&tsens_mode>, 361 <&tsens_base1>, <&tsens_base2>, 362 <&tsens_s0_p1>, <&tsens_s0_p2>, 363 <&tsens_s1_p1>, <&tsens_s1_p2>, 364 <&tsens_s2_p1>, <&tsens_s2_p2>, 365 <&tsens_s4_p1>, <&tsens_s4_p2>, 366 <&tsens_s5_p1>, <&tsens_s5_p2>; 367 nvmem-cell-names = "mode", 368 "base1", "base2", 369 "s0_p1", "s0_p2", 370 "s1_p1", "s1_p2", 371 "s2_p1", "s2_p2", 372 "s4_p1", "s4_p2", 373 "s5_p1", "s5_p2"; 374 375 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 376 interrupt-names = "uplow"; 377 378 #qcom,sensors = <5>; 379 #thermal-sensor-cells = <1>; 380 }; 381 382 - | 383 #include <dt-bindings/interrupt-controller/arm-gic.h> 384 // Example 1 (legacy: for pre v1 IP): 385 tsens1: thermal-sensor@4a9000 { 386 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 387 reg = <0x4a9000 0x1000>, /* TM */ 388 <0x4a8000 0x1000>; /* SROT */ 389 390 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 391 nvmem-cell-names = "calib", "calib_sel"; 392 393 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 394 interrupt-names = "uplow"; 395 396 #qcom,sensors = <5>; 397 #thermal-sensor-cells = <1>; 398 }; 399 400 - | 401 #include <dt-bindings/interrupt-controller/arm-gic.h> 402 // Example 2 (for any platform containing v1 of the TSENS IP): 403 tsens2: thermal-sensor@4a9000 { 404 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 405 reg = <0x004a9000 0x1000>, /* TM */ 406 <0x004a8000 0x1000>; /* SROT */ 407 408 nvmem-cells = <&tsens_caldata>; 409 nvmem-cell-names = "calib"; 410 411 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 412 interrupt-names = "uplow"; 413 414 #qcom,sensors = <10>; 415 #thermal-sensor-cells = <1>; 416 }; 417 418 - | 419 #include <dt-bindings/interrupt-controller/arm-gic.h> 420 // Example 3 (for any platform containing v2 of the TSENS IP): 421 tsens3: thermal-sensor@c263000 { 422 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 423 reg = <0xc263000 0x1ff>, 424 <0xc222000 0x1ff>; 425 426 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 427 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 428 interrupt-names = "uplow", "critical"; 429 430 #qcom,sensors = <13>; 431 #thermal-sensor-cells = <1>; 432 }; 433 434 - | 435 #include <dt-bindings/interrupt-controller/arm-gic.h> 436 // Example 4 (for any IPQ8074 based SoC-s): 437 tsens4: thermal-sensor@4a9000 { 438 compatible = "qcom,ipq8074-tsens"; 439 reg = <0x4a9000 0x1000>, 440 <0x4a8000 0x1000>; 441 442 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 443 interrupt-names = "combined"; 444 445 #qcom,sensors = <16>; 446 #thermal-sensor-cells = <1>; 447 }; 448... 449