1 /* 2 * Copyright (c) 2011 Peter Korsgaard <jacmet@sunsite.dk> 3 * 4 * This file is licensed under the terms of the GNU General Public 5 * License version 2. This program is licensed "as is" without any 6 * warranty of any kind, whether express or implied. 7 */ 8 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/slab.h> 12 #include <linux/err.h> 13 #include <linux/clk.h> 14 #include <linux/io.h> 15 #include <linux/iopoll.h> 16 #include <linux/hw_random.h> 17 #include <linux/of.h> 18 #include <linux/platform_device.h> 19 #include <linux/pm_runtime.h> 20 21 #define TRNG_CR 0x00 22 #define TRNG_MR 0x04 23 #define TRNG_ISR 0x1c 24 #define TRNG_ISR_DATRDY BIT(0) 25 #define TRNG_ODATA 0x50 26 27 #define TRNG_KEY 0x524e4700 /* RNG */ 28 29 #define TRNG_HALFR BIT(0) /* generate RN every 168 cycles */ 30 31 struct atmel_trng_data { 32 bool has_half_rate; 33 }; 34 35 struct atmel_trng { 36 struct clk *clk; 37 void __iomem *base; 38 struct hwrng rng; 39 struct device *dev; 40 bool has_half_rate; 41 }; 42 43 static bool atmel_trng_wait_ready(struct atmel_trng *trng, bool wait) 44 { 45 int ready; 46 47 ready = readl(trng->base + TRNG_ISR) & TRNG_ISR_DATRDY; 48 if (!ready && wait) 49 readl_poll_timeout(trng->base + TRNG_ISR, ready, 50 ready & TRNG_ISR_DATRDY, 1000, 20000); 51 52 return !!ready; 53 } 54 55 static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max, 56 bool wait) 57 { 58 struct atmel_trng *trng = container_of(rng, struct atmel_trng, rng); 59 u32 *data = buf; 60 int ret; 61 62 ret = pm_runtime_get_sync(trng->dev); 63 if (ret < 0) { 64 pm_runtime_put_sync(trng->dev); 65 return ret; 66 } 67 68 ret = atmel_trng_wait_ready(trng, wait); 69 if (!ret) 70 goto out; 71 72 *data = readl(trng->base + TRNG_ODATA); 73 /* 74 * ensure data ready is only set again AFTER the next data word is ready 75 * in case it got set between checking ISR and reading ODATA, so we 76 * don't risk re-reading the same word 77 */ 78 readl(trng->base + TRNG_ISR); 79 ret = 4; 80 81 out: 82 pm_runtime_put_sync_autosuspend(trng->dev); 83 return ret; 84 } 85 86 static int atmel_trng_init(struct atmel_trng *trng) 87 { 88 unsigned long rate; 89 int ret; 90 91 ret = clk_prepare_enable(trng->clk); 92 if (ret) 93 return ret; 94 95 if (trng->has_half_rate) { 96 rate = clk_get_rate(trng->clk); 97 98 /* if peripheral clk is above 100MHz, set HALFR */ 99 if (rate > 100000000) 100 writel(TRNG_HALFR, trng->base + TRNG_MR); 101 } 102 103 writel(TRNG_KEY | 1, trng->base + TRNG_CR); 104 105 return 0; 106 } 107 108 static void atmel_trng_cleanup(struct atmel_trng *trng) 109 { 110 writel(TRNG_KEY, trng->base + TRNG_CR); 111 clk_disable_unprepare(trng->clk); 112 } 113 114 static int atmel_trng_probe(struct platform_device *pdev) 115 { 116 struct atmel_trng *trng; 117 const struct atmel_trng_data *data; 118 int ret; 119 120 trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL); 121 if (!trng) 122 return -ENOMEM; 123 124 trng->base = devm_platform_ioremap_resource(pdev, 0); 125 if (IS_ERR(trng->base)) 126 return PTR_ERR(trng->base); 127 128 trng->clk = devm_clk_get(&pdev->dev, NULL); 129 if (IS_ERR(trng->clk)) 130 return PTR_ERR(trng->clk); 131 data = of_device_get_match_data(&pdev->dev); 132 if (!data) 133 return -ENODEV; 134 135 trng->has_half_rate = data->has_half_rate; 136 trng->dev = &pdev->dev; 137 trng->rng.name = pdev->name; 138 trng->rng.read = atmel_trng_read; 139 platform_set_drvdata(pdev, trng); 140 141 #ifndef CONFIG_PM 142 ret = atmel_trng_init(trng); 143 if (ret) 144 return ret; 145 #endif 146 147 pm_runtime_set_autosuspend_delay(&pdev->dev, 100); 148 pm_runtime_use_autosuspend(&pdev->dev); 149 pm_runtime_enable(&pdev->dev); 150 151 ret = devm_hwrng_register(&pdev->dev, &trng->rng); 152 if (ret) { 153 pm_runtime_disable(&pdev->dev); 154 pm_runtime_set_suspended(&pdev->dev); 155 #ifndef CONFIG_PM 156 atmel_trng_cleanup(trng); 157 #endif 158 } 159 160 return ret; 161 } 162 163 static void atmel_trng_remove(struct platform_device *pdev) 164 { 165 struct atmel_trng *trng = platform_get_drvdata(pdev); 166 167 atmel_trng_cleanup(trng); 168 pm_runtime_disable(&pdev->dev); 169 pm_runtime_set_suspended(&pdev->dev); 170 } 171 172 static int __maybe_unused atmel_trng_runtime_suspend(struct device *dev) 173 { 174 struct atmel_trng *trng = dev_get_drvdata(dev); 175 176 atmel_trng_cleanup(trng); 177 178 return 0; 179 } 180 181 static int __maybe_unused atmel_trng_runtime_resume(struct device *dev) 182 { 183 struct atmel_trng *trng = dev_get_drvdata(dev); 184 185 return atmel_trng_init(trng); 186 } 187 188 static const struct dev_pm_ops atmel_trng_pm_ops = { 189 SET_RUNTIME_PM_OPS(atmel_trng_runtime_suspend, 190 atmel_trng_runtime_resume, NULL) 191 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 192 pm_runtime_force_resume) 193 }; 194 195 static const struct atmel_trng_data at91sam9g45_config = { 196 .has_half_rate = false, 197 }; 198 199 static const struct atmel_trng_data sam9x60_config = { 200 .has_half_rate = true, 201 }; 202 203 static const struct of_device_id atmel_trng_dt_ids[] = { 204 { 205 .compatible = "atmel,at91sam9g45-trng", 206 .data = &at91sam9g45_config, 207 }, { 208 .compatible = "microchip,sam9x60-trng", 209 .data = &sam9x60_config, 210 }, { 211 /* sentinel */ 212 } 213 }; 214 MODULE_DEVICE_TABLE(of, atmel_trng_dt_ids); 215 216 static struct platform_driver atmel_trng_driver = { 217 .probe = atmel_trng_probe, 218 .remove = atmel_trng_remove, 219 .driver = { 220 .name = "atmel-trng", 221 .pm = pm_ptr(&atmel_trng_pm_ops), 222 .of_match_table = atmel_trng_dt_ids, 223 }, 224 }; 225 226 module_platform_driver(atmel_trng_driver); 227 228 MODULE_LICENSE("GPL"); 229 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>"); 230 MODULE_DESCRIPTION("Atmel true random number generator driver"); 231