xref: /linux/arch/x86/hyperv/hv_init.c (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * X86 specific Hyper-V initialization code.
4  *
5  * Copyright (C) 2016, Microsoft, Inc.
6  *
7  * Author : K. Y. Srinivasan <kys@microsoft.com>
8  */
9 
10 #define pr_fmt(fmt)  "Hyper-V: " fmt
11 
12 #include <linux/efi.h>
13 #include <linux/types.h>
14 #include <linux/bitfield.h>
15 #include <linux/io.h>
16 #include <asm/apic.h>
17 #include <asm/desc.h>
18 #include <asm/e820/api.h>
19 #include <asm/sev.h>
20 #include <asm/hypervisor.h>
21 #include <hyperv/hvhdk.h>
22 #include <asm/mshyperv.h>
23 #include <asm/msr.h>
24 #include <asm/idtentry.h>
25 #include <asm/set_memory.h>
26 #include <linux/kexec.h>
27 #include <linux/version.h>
28 #include <linux/vmalloc.h>
29 #include <linux/mm.h>
30 #include <linux/slab.h>
31 #include <linux/kernel.h>
32 #include <linux/cpuhotplug.h>
33 #include <linux/syscore_ops.h>
34 #include <clocksource/hyperv_timer.h>
35 #include <linux/highmem.h>
36 #include <linux/export.h>
37 
38 void *hv_hypercall_pg;
39 
40 #ifdef CONFIG_X86_64
41 static u64 __hv_hyperfail(u64 control, u64 param1, u64 param2)
42 {
43 	return U64_MAX;
44 }
45 
46 DEFINE_STATIC_CALL(__hv_hypercall, __hv_hyperfail);
47 
48 u64 hv_std_hypercall(u64 control, u64 param1, u64 param2)
49 {
50 	u64 hv_status;
51 
52 	register u64 __r8 asm("r8") = param2;
53 	asm volatile ("call " STATIC_CALL_TRAMP_STR(__hv_hypercall)
54 		      : "=a" (hv_status), ASM_CALL_CONSTRAINT,
55 		        "+c" (control), "+d" (param1), "+r" (__r8)
56 		      : : "cc", "memory", "r9", "r10", "r11");
57 
58 	return hv_status;
59 }
60 
61 typedef u64 (*hv_hypercall_f)(u64 control, u64 param1, u64 param2);
62 
63 static inline void hv_set_hypercall_pg(void *ptr)
64 {
65 	hv_hypercall_pg = ptr;
66 
67 	if (!ptr)
68 		ptr = &__hv_hyperfail;
69 	static_call_update(__hv_hypercall, (hv_hypercall_f)ptr);
70 }
71 #else
72 static inline void hv_set_hypercall_pg(void *ptr)
73 {
74 	hv_hypercall_pg = ptr;
75 }
76 EXPORT_SYMBOL_GPL(hv_hypercall_pg);
77 #endif
78 
79 union hv_ghcb * __percpu *hv_ghcb_pg;
80 
81 /* Storage to save the hypercall page temporarily for hibernation */
82 static void *hv_hypercall_pg_saved;
83 
84 struct hv_vp_assist_page **hv_vp_assist_page;
85 EXPORT_SYMBOL_GPL(hv_vp_assist_page);
86 
87 static int hyperv_init_ghcb(void)
88 {
89 	u64 ghcb_gpa;
90 	void *ghcb_va;
91 	void **ghcb_base;
92 
93 	if (!ms_hyperv.paravisor_present || !hv_isolation_type_snp())
94 		return 0;
95 
96 	if (!hv_ghcb_pg)
97 		return -EINVAL;
98 
99 	/*
100 	 * GHCB page is allocated by paravisor. The address
101 	 * returned by MSR_AMD64_SEV_ES_GHCB is above shared
102 	 * memory boundary and map it here.
103 	 */
104 	rdmsrq(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa);
105 
106 	/* Mask out vTOM bit and map as decrypted */
107 	ghcb_gpa &= ~ms_hyperv.shared_gpa_boundary;
108 	ghcb_va = memremap(ghcb_gpa, HV_HYP_PAGE_SIZE, MEMREMAP_WB | MEMREMAP_DEC);
109 	if (!ghcb_va)
110 		return -ENOMEM;
111 
112 	ghcb_base = (void **)this_cpu_ptr(hv_ghcb_pg);
113 	*ghcb_base = ghcb_va;
114 
115 	return 0;
116 }
117 
118 static int hv_cpu_init(unsigned int cpu)
119 {
120 	union hv_vp_assist_msr_contents msr = { 0 };
121 	struct hv_vp_assist_page **hvp;
122 	int ret;
123 
124 	ret = hv_common_cpu_init(cpu);
125 	if (ret)
126 		return ret;
127 
128 	if (!hv_vp_assist_page)
129 		return 0;
130 
131 	hvp = &hv_vp_assist_page[cpu];
132 	if (hv_root_partition()) {
133 		/*
134 		 * For root partition we get the hypervisor provided VP assist
135 		 * page, instead of allocating a new page.
136 		 */
137 		rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
138 		*hvp = memremap(msr.pfn << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT,
139 				PAGE_SIZE, MEMREMAP_WB);
140 	} else {
141 		/*
142 		 * The VP assist page is an "overlay" page (see Hyper-V TLFS's
143 		 * Section 5.2.1 "GPA Overlay Pages"). Here it must be zeroed
144 		 * out to make sure we always write the EOI MSR in
145 		 * hv_apic_eoi_write() *after* the EOI optimization is disabled
146 		 * in hv_cpu_die(), otherwise a CPU may not be stopped in the
147 		 * case of CPU offlining and the VM will hang.
148 		 */
149 		if (!*hvp) {
150 			*hvp = __vmalloc(PAGE_SIZE, GFP_KERNEL | __GFP_ZERO);
151 
152 			/*
153 			 * Hyper-V should never specify a VM that is a Confidential
154 			 * VM and also running in the root partition. Root partition
155 			 * is blocked to run in Confidential VM. So only decrypt assist
156 			 * page in non-root partition here.
157 			 */
158 			if (*hvp && !ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
159 				WARN_ON_ONCE(set_memory_decrypted((unsigned long)(*hvp), 1));
160 				memset(*hvp, 0, PAGE_SIZE);
161 			}
162 		}
163 
164 		if (*hvp)
165 			msr.pfn = vmalloc_to_pfn(*hvp);
166 
167 	}
168 	if (!WARN_ON(!(*hvp))) {
169 		msr.enable = 1;
170 		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
171 	}
172 
173 	/* Allow Hyper-V stimer vector to be injected from Hypervisor. */
174 	apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, true);
175 
176 	return hyperv_init_ghcb();
177 }
178 
179 static void (*hv_reenlightenment_cb)(void);
180 
181 static void hv_reenlightenment_notify(struct work_struct *dummy)
182 {
183 	struct hv_tsc_emulation_status emu_status;
184 
185 	rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
186 
187 	/* Don't issue the callback if TSC accesses are not emulated */
188 	if (hv_reenlightenment_cb && emu_status.inprogress)
189 		hv_reenlightenment_cb();
190 }
191 static DECLARE_DELAYED_WORK(hv_reenlightenment_work, hv_reenlightenment_notify);
192 
193 void hyperv_stop_tsc_emulation(void)
194 {
195 	u64 freq;
196 	struct hv_tsc_emulation_status emu_status;
197 
198 	rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
199 	emu_status.inprogress = 0;
200 	wrmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
201 
202 	rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);
203 	tsc_khz = div64_u64(freq, 1000);
204 }
205 EXPORT_SYMBOL_GPL(hyperv_stop_tsc_emulation);
206 
207 static inline bool hv_reenlightenment_available(void)
208 {
209 	/*
210 	 * Check for required features and privileges to make TSC frequency
211 	 * change notifications work.
212 	 */
213 	return ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
214 		ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE &&
215 		ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT;
216 }
217 
218 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment)
219 {
220 	apic_eoi();
221 	inc_irq_stat(HYPERV_REENLIGHTENMENT);
222 	schedule_delayed_work(&hv_reenlightenment_work, HZ/10);
223 }
224 
225 void set_hv_tscchange_cb(void (*cb)(void))
226 {
227 	struct hv_reenlightenment_control re_ctrl = {
228 		.vector = HYPERV_REENLIGHTENMENT_VECTOR,
229 		.enabled = 1,
230 	};
231 	struct hv_tsc_emulation_control emu_ctrl = {.enabled = 1};
232 
233 	if (!hv_reenlightenment_available()) {
234 		pr_warn("reenlightenment support is unavailable\n");
235 		return;
236 	}
237 
238 	if (!hv_vp_index)
239 		return;
240 
241 	hv_reenlightenment_cb = cb;
242 
243 	/* Make sure callback is registered before we write to MSRs */
244 	wmb();
245 
246 	re_ctrl.target_vp = hv_vp_index[get_cpu()];
247 
248 	wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
249 	wrmsrq(HV_X64_MSR_TSC_EMULATION_CONTROL, *((u64 *)&emu_ctrl));
250 
251 	put_cpu();
252 }
253 EXPORT_SYMBOL_GPL(set_hv_tscchange_cb);
254 
255 void clear_hv_tscchange_cb(void)
256 {
257 	struct hv_reenlightenment_control re_ctrl;
258 
259 	if (!hv_reenlightenment_available())
260 		return;
261 
262 	rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);
263 	re_ctrl.enabled = 0;
264 	wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);
265 
266 	hv_reenlightenment_cb = NULL;
267 }
268 EXPORT_SYMBOL_GPL(clear_hv_tscchange_cb);
269 
270 static int hv_cpu_die(unsigned int cpu)
271 {
272 	struct hv_reenlightenment_control re_ctrl;
273 	unsigned int new_cpu;
274 	void **ghcb_va;
275 
276 	if (hv_ghcb_pg) {
277 		ghcb_va = (void **)this_cpu_ptr(hv_ghcb_pg);
278 		if (*ghcb_va)
279 			memunmap(*ghcb_va);
280 		*ghcb_va = NULL;
281 	}
282 
283 	apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, false);
284 
285 	hv_common_cpu_die(cpu);
286 
287 	if (hv_vp_assist_page && hv_vp_assist_page[cpu]) {
288 		union hv_vp_assist_msr_contents msr = { 0 };
289 		if (hv_root_partition()) {
290 			/*
291 			 * For root partition the VP assist page is mapped to
292 			 * hypervisor provided page, and thus we unmap the
293 			 * page here and nullify it, so that in future we have
294 			 * correct page address mapped in hv_cpu_init.
295 			 */
296 			memunmap(hv_vp_assist_page[cpu]);
297 			hv_vp_assist_page[cpu] = NULL;
298 			rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
299 			msr.enable = 0;
300 		}
301 		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
302 	}
303 
304 	if (hv_reenlightenment_cb == NULL)
305 		return 0;
306 
307 	rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
308 	if (re_ctrl.target_vp == hv_vp_index[cpu]) {
309 		/*
310 		 * Reassign reenlightenment notifications to some other online
311 		 * CPU or just disable the feature if there are no online CPUs
312 		 * left (happens on hibernation).
313 		 */
314 		new_cpu = cpumask_any_but(cpu_online_mask, cpu);
315 
316 		if (new_cpu < nr_cpu_ids)
317 			re_ctrl.target_vp = hv_vp_index[new_cpu];
318 		else
319 			re_ctrl.enabled = 0;
320 
321 		wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
322 	}
323 
324 	return 0;
325 }
326 
327 static int __init hv_pci_init(void)
328 {
329 	bool gen2vm = efi_enabled(EFI_BOOT);
330 
331 	/*
332 	 * A Generation-2 VM doesn't support legacy PCI/PCIe, so both
333 	 * raw_pci_ops and raw_pci_ext_ops are NULL, and pci_subsys_init() ->
334 	 * pcibios_init() doesn't call pcibios_resource_survey() ->
335 	 * e820__reserve_resources_late(); as a result, any emulated persistent
336 	 * memory of E820_TYPE_PRAM (12) via the kernel parameter
337 	 * memmap=nn[KMG]!ss is not added into iomem_resource and hence can't be
338 	 * detected by register_e820_pmem(). Fix this by directly calling
339 	 * e820__reserve_resources_late() here: e820__reserve_resources_late()
340 	 * depends on e820__reserve_resources(), which has been called earlier
341 	 * from setup_arch(). Note: e820__reserve_resources_late() also adds
342 	 * any memory of E820_TYPE_PMEM (7) into iomem_resource, and
343 	 * acpi_nfit_register_region() -> acpi_nfit_insert_resource() ->
344 	 * region_intersects() returns REGION_INTERSECTS, so the memory of
345 	 * E820_TYPE_PMEM won't get added twice.
346 	 *
347 	 * We return 0 here so that pci_arch_init() won't print the warning:
348 	 * "PCI: Fatal: No config space access function found"
349 	 */
350 	if (gen2vm) {
351 		e820__reserve_resources_late();
352 		return 0;
353 	}
354 
355 	/* For Generation-1 VM, we'll proceed in pci_arch_init().  */
356 	return 1;
357 }
358 
359 static int hv_suspend(void *data)
360 {
361 	union hv_x64_msr_hypercall_contents hypercall_msr;
362 	int ret;
363 
364 	if (hv_root_partition())
365 		return -EPERM;
366 
367 	/*
368 	 * Reset the hypercall page as it is going to be invalidated
369 	 * across hibernation. Setting hv_hypercall_pg to NULL ensures
370 	 * that any subsequent hypercall operation fails safely instead of
371 	 * crashing due to an access of an invalid page. The hypercall page
372 	 * pointer is restored on resume.
373 	 */
374 	hv_hypercall_pg_saved = hv_hypercall_pg;
375 	hv_set_hypercall_pg(NULL);
376 
377 	/* Disable the hypercall page in the hypervisor */
378 	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
379 	hypercall_msr.enable = 0;
380 	wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
381 
382 	ret = hv_cpu_die(0);
383 	return ret;
384 }
385 
386 static void hv_resume(void *data)
387 {
388 	union hv_x64_msr_hypercall_contents hypercall_msr;
389 	int ret;
390 
391 	ret = hv_cpu_init(0);
392 	WARN_ON(ret);
393 
394 	/* Re-enable the hypercall page */
395 	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
396 	hypercall_msr.enable = 1;
397 	hypercall_msr.guest_physical_address =
398 		vmalloc_to_pfn(hv_hypercall_pg_saved);
399 	wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
400 
401 	hv_set_hypercall_pg(hv_hypercall_pg_saved);
402 	hv_hypercall_pg_saved = NULL;
403 
404 	/*
405 	 * Reenlightenment notifications are disabled by hv_cpu_die(0),
406 	 * reenable them here if hv_reenlightenment_cb was previously set.
407 	 */
408 	if (hv_reenlightenment_cb)
409 		set_hv_tscchange_cb(hv_reenlightenment_cb);
410 }
411 
412 /* Note: when the ops are called, only CPU0 is online and IRQs are disabled. */
413 static const struct syscore_ops hv_syscore_ops = {
414 	.suspend	= hv_suspend,
415 	.resume		= hv_resume,
416 };
417 
418 static struct syscore hv_syscore = {
419 	.ops = &hv_syscore_ops,
420 };
421 
422 static void (* __initdata old_setup_percpu_clockev)(void);
423 
424 static void __init hv_stimer_setup_percpu_clockev(void)
425 {
426 	int ret;
427 
428 	/*
429 	 * Continue afters errors in setting up stimer clockevents
430 	 * as we can run with the LAPIC timer as a fallback.
431 	 */
432 	ret = hv_stimer_alloc(false);
433 	if (ret)
434 		pr_warn("stimer setup failed with error %d\n", ret);
435 
436 	/*
437 	 * Still register the LAPIC timer to allows users
438 	 * to switch to LAPIC timer via /sys, if they want to.
439 	 */
440 	if (old_setup_percpu_clockev)
441 		old_setup_percpu_clockev();
442 }
443 
444 /*
445  * This function is to be invoked early in the boot sequence after the
446  * hypervisor has been detected.
447  *
448  * 1. Setup the hypercall page.
449  * 2. Register Hyper-V specific clocksource.
450  * 3. Setup Hyper-V specific APIC entry points.
451  */
452 void __init hyperv_init(void)
453 {
454 	u64 guest_id;
455 	union hv_x64_msr_hypercall_contents hypercall_msr;
456 	int cpuhp;
457 
458 	if (x86_hyper_type != X86_HYPER_MS_HYPERV)
459 		return;
460 
461 	if (hv_common_init())
462 		return;
463 
464 	/*
465 	 * The VP assist page is useless to a TDX guest: the only use we
466 	 * would have for it is lazy EOI, which can not be used with TDX.
467 	 */
468 	if (hv_isolation_type_tdx())
469 		hv_vp_assist_page = NULL;
470 	else
471 		hv_vp_assist_page = kzalloc_objs(*hv_vp_assist_page, nr_cpu_ids);
472 	if (!hv_vp_assist_page) {
473 		ms_hyperv.hints &= ~HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
474 
475 		if (!hv_isolation_type_tdx())
476 			goto common_free;
477 	}
478 
479 	if (ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
480 		/* Negotiate GHCB Version. */
481 		if (!hv_ghcb_negotiate_protocol())
482 			hv_ghcb_terminate(SEV_TERM_SET_GEN,
483 					  GHCB_SEV_ES_PROT_UNSUPPORTED);
484 
485 		hv_ghcb_pg = alloc_percpu(union hv_ghcb *);
486 		if (!hv_ghcb_pg)
487 			goto free_vp_assist_page;
488 	}
489 
490 	cpuhp = cpuhp_setup_state(CPUHP_AP_HYPERV_ONLINE, "x86/hyperv_init:online",
491 				  hv_cpu_init, hv_cpu_die);
492 	if (cpuhp < 0)
493 		goto free_ghcb_page;
494 
495 	/*
496 	 * Setup the hypercall page and enable hypercalls.
497 	 * 1. Register the guest ID
498 	 * 2. Enable the hypercall and register the hypercall page
499 	 *
500 	 * A TDX VM with no paravisor only uses TDX GHCI rather than hv_hypercall_pg:
501 	 * when the hypercall input is a page, such a VM must pass a decrypted
502 	 * page to Hyper-V, e.g. hv_post_message() uses the per-CPU page
503 	 * hyperv_pcpu_input_arg, which is decrypted if no paravisor is present.
504 	 *
505 	 * A TDX VM with the paravisor uses hv_hypercall_pg for most hypercalls,
506 	 * which are handled by the paravisor and the VM must use an encrypted
507 	 * input page: in such a VM, the hyperv_pcpu_input_arg is encrypted and
508 	 * used in the hypercalls, e.g. see hv_mark_gpa_visibility() and
509 	 * hv_arch_irq_unmask(). Such a VM uses TDX GHCI for two hypercalls:
510 	 * 1. HVCALL_SIGNAL_EVENT: see vmbus_set_event() and _hv_do_fast_hypercall8().
511 	 * 2. HVCALL_POST_MESSAGE: the input page must be a decrypted page, i.e.
512 	 * hv_post_message() in such a VM can't use the encrypted hyperv_pcpu_input_arg;
513 	 * instead, hv_post_message() uses the post_msg_page, which is decrypted
514 	 * in such a VM and is only used in such a VM.
515 	 */
516 	guest_id = hv_generate_guest_id(LINUX_VERSION_CODE);
517 	wrmsrq(HV_X64_MSR_GUEST_OS_ID, guest_id);
518 
519 	/* With the paravisor, the VM must also write the ID via GHCB/GHCI */
520 	hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, guest_id);
521 
522 	/* A TDX VM with no paravisor only uses TDX GHCI rather than hv_hypercall_pg */
523 	if (hv_isolation_type_tdx() && !ms_hyperv.paravisor_present)
524 		goto skip_hypercall_pg_init;
525 
526 	hv_hypercall_pg = __vmalloc_node_range(PAGE_SIZE, 1, MODULES_VADDR,
527 			MODULES_END, GFP_KERNEL, PAGE_KERNEL_ROX,
528 			VM_FLUSH_RESET_PERMS, NUMA_NO_NODE,
529 			__builtin_return_address(0));
530 	if (hv_hypercall_pg == NULL)
531 		goto clean_guest_os_id;
532 
533 	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
534 	hypercall_msr.enable = 1;
535 
536 	if (hv_root_partition()) {
537 		struct page *pg;
538 		void *src;
539 
540 		/*
541 		 * For the root partition, the hypervisor will set up its
542 		 * hypercall page. The hypervisor guarantees it will not show
543 		 * up in the root's address space. The root can't change the
544 		 * location of the hypercall page.
545 		 *
546 		 * Order is important here. We must enable the hypercall page
547 		 * so it is populated with code, then copy the code to an
548 		 * executable page.
549 		 */
550 		wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
551 
552 		pg = vmalloc_to_page(hv_hypercall_pg);
553 		src = memremap(hypercall_msr.guest_physical_address << PAGE_SHIFT, PAGE_SIZE,
554 				MEMREMAP_WB);
555 		BUG_ON(!src);
556 		memcpy_to_page(pg, 0, src, HV_HYP_PAGE_SIZE);
557 		memunmap(src);
558 
559 		hv_remap_tsc_clocksource();
560 		hv_sleep_notifiers_register();
561 	} else {
562 		hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);
563 		wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
564 	}
565 
566 	hv_set_hypercall_pg(hv_hypercall_pg);
567 
568 	if (hv_root_partition())        /* after set hypercall pg */
569 		hv_root_crash_init();
570 
571 skip_hypercall_pg_init:
572 	/*
573 	 * hyperv_init() is called before LAPIC is initialized: see
574 	 * apic_intr_mode_init() -> x86_platform.apic_post_init() and
575 	 * apic_bsp_setup() -> setup_local_APIC(). The direct-mode STIMER
576 	 * depends on LAPIC, so hv_stimer_alloc() should be called from
577 	 * x86_init.timers.setup_percpu_clockev.
578 	 */
579 	old_setup_percpu_clockev = x86_init.timers.setup_percpu_clockev;
580 	x86_init.timers.setup_percpu_clockev = hv_stimer_setup_percpu_clockev;
581 
582 	hv_apic_init();
583 
584 	x86_init.pci.arch_init = hv_pci_init;
585 
586 	register_syscore(&hv_syscore);
587 
588 	if (ms_hyperv.priv_high & HV_ACCESS_PARTITION_ID)
589 		hv_get_partition_id();
590 
591 #ifdef CONFIG_PCI_MSI
592 	/*
593 	 * If we're running as root, we want to create our own PCI MSI domain.
594 	 * We can't set this in hv_pci_init because that would be too late.
595 	 */
596 	if (hv_root_partition())
597 		x86_init.irqs.create_pci_msi_domain = hv_create_pci_msi_domain;
598 #endif
599 
600 	/* Query the VMs extended capability once, so that it can be cached. */
601 	hv_query_ext_cap(0);
602 
603 	/* Find the VTL */
604 	ms_hyperv.vtl = get_vtl();
605 
606 	if (ms_hyperv.vtl > 0) /* non default VTL */
607 		hv_vtl_early_init();
608 
609 	return;
610 
611 clean_guest_os_id:
612 	wrmsrq(HV_X64_MSR_GUEST_OS_ID, 0);
613 	hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0);
614 	cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE);
615 free_ghcb_page:
616 	free_percpu(hv_ghcb_pg);
617 free_vp_assist_page:
618 	kfree(hv_vp_assist_page);
619 	hv_vp_assist_page = NULL;
620 common_free:
621 	hv_common_free();
622 }
623 
624 /*
625  * This routine is called before kexec/kdump, it does the required cleanup.
626  */
627 void hyperv_cleanup(void)
628 {
629 	union hv_x64_msr_hypercall_contents hypercall_msr;
630 	union hv_reference_tsc_msr tsc_msr;
631 
632 	/* Reset our OS id */
633 	wrmsrq(HV_X64_MSR_GUEST_OS_ID, 0);
634 	hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0);
635 
636 	/*
637 	 * Reset hv_hypercall_pg before resetting it in the hypervisor.
638 	 * hv_set_hypercall_pg(NULL) is not used because at this point in the
639 	 * panic path other CPUs have been stopped, causing static_call_update()
640 	 * to hang. So resetting hv_hypercall_pg to cause hypercalls to fail
641 	 * cleanly is only operative on 32-bit builds. But this is OK as it is
642 	 * just a preventative measure to ease detecting a hypercall being made
643 	 * after this point, which shouldn't be happening anyway.
644 	 */
645 	hv_hypercall_pg = NULL;
646 
647 	/* Reset the hypercall page */
648 	hypercall_msr.as_uint64 = hv_get_msr(HV_X64_MSR_HYPERCALL);
649 	hypercall_msr.enable = 0;
650 	hv_set_msr(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
651 
652 	/* Reset the TSC page */
653 	tsc_msr.as_uint64 = hv_get_msr(HV_X64_MSR_REFERENCE_TSC);
654 	tsc_msr.enable = 0;
655 	hv_set_msr(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
656 }
657 
658 void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die)
659 {
660 	static bool panic_reported;
661 	u64 guest_id;
662 
663 	if (in_die && !panic_on_oops)
664 		return;
665 
666 	/*
667 	 * We prefer to report panic on 'die' chain as we have proper
668 	 * registers to report, but if we miss it (e.g. on BUG()) we need
669 	 * to report it on 'panic'.
670 	 */
671 	if (panic_reported)
672 		return;
673 	panic_reported = true;
674 
675 	rdmsrq(HV_X64_MSR_GUEST_OS_ID, guest_id);
676 
677 	wrmsrq(HV_X64_MSR_CRASH_P0, err);
678 	wrmsrq(HV_X64_MSR_CRASH_P1, guest_id);
679 	wrmsrq(HV_X64_MSR_CRASH_P2, regs->ip);
680 	wrmsrq(HV_X64_MSR_CRASH_P3, regs->ax);
681 	wrmsrq(HV_X64_MSR_CRASH_P4, regs->sp);
682 
683 	/*
684 	 * Let Hyper-V know there is crash data available
685 	 */
686 	wrmsrq(HV_X64_MSR_CRASH_CTL, HV_CRASH_CTL_CRASH_NOTIFY);
687 }
688 EXPORT_SYMBOL_GPL(hyperv_report_panic);
689 
690 bool hv_is_hyperv_initialized(void)
691 {
692 	union hv_x64_msr_hypercall_contents hypercall_msr;
693 
694 	/*
695 	 * Ensure that we're really on Hyper-V, and not a KVM or Xen
696 	 * emulation of Hyper-V
697 	 */
698 	if (x86_hyper_type != X86_HYPER_MS_HYPERV)
699 		return false;
700 
701 	/* A TDX VM with no paravisor uses TDX GHCI call rather than hv_hypercall_pg */
702 	if (hv_isolation_type_tdx() && !ms_hyperv.paravisor_present)
703 		return true;
704 	/*
705 	 * Verify that earlier initialization succeeded by checking
706 	 * that the hypercall page is setup
707 	 */
708 	hypercall_msr.as_uint64 = 0;
709 	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
710 
711 	return hypercall_msr.enable;
712 }
713 EXPORT_SYMBOL_GPL(hv_is_hyperv_initialized);
714 
715 int hv_apicid_to_vp_index(u32 apic_id)
716 {
717 	u64 control;
718 	u64 status;
719 	unsigned long irq_flags;
720 	struct hv_get_vp_from_apic_id_in *input;
721 	u32 *output, ret;
722 
723 	local_irq_save(irq_flags);
724 
725 	input = *this_cpu_ptr(hyperv_pcpu_input_arg);
726 	memset(input, 0, sizeof(*input));
727 	input->partition_id = HV_PARTITION_ID_SELF;
728 	input->apic_ids[0] = apic_id;
729 
730 	output = *this_cpu_ptr(hyperv_pcpu_output_arg);
731 
732 	control = HV_HYPERCALL_REP_COMP_1 | HVCALL_GET_VP_INDEX_FROM_APIC_ID;
733 	status = hv_do_hypercall(control, input, output);
734 	ret = output[0];
735 
736 	local_irq_restore(irq_flags);
737 
738 	if (!hv_result_success(status)) {
739 		pr_err("failed to get vp index from apic id %d, status %#llx\n",
740 		       apic_id, status);
741 		return -EINVAL;
742 	}
743 
744 	return ret;
745 }
746 EXPORT_SYMBOL_GPL(hv_apicid_to_vp_index);
747