1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers 4 * 5 * Copyright (C) 2020 Nvidia Technologies Ltd. 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/err.h> 10 #include <linux/i2c.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 15 #include "pmbus.h" 16 17 /* Vendor specific registers. */ 18 #define MP2975_MFR_APS_HYS_R2 0x0d 19 #define MP2975_MFR_SLOPE_TRIM3 0x1d 20 #define MP2975_MFR_VR_MULTI_CONFIG_R1 0x0d 21 #define MP2975_MFR_VR_MULTI_CONFIG_R2 0x1d 22 #define MP2975_MFR_APS_DECAY_ADV 0x56 23 #define MP2975_MFR_DC_LOOP_CTRL 0x59 24 #define MP2975_MFR_OCP_UCP_PHASE_SET 0x65 25 #define MP2975_MFR_VR_CONFIG1 0x68 26 #define MP2975_MFR_READ_CS1_2 0x82 27 #define MP2975_MFR_READ_CS3_4 0x83 28 #define MP2975_MFR_READ_CS5_6 0x84 29 #define MP2975_MFR_READ_CS7_8 0x85 30 #define MP2975_MFR_READ_CS9_10 0x86 31 #define MP2975_MFR_READ_CS11_12 0x87 32 #define MP2975_MFR_READ_IOUT_PK 0x90 33 #define MP2975_MFR_READ_POUT_PK 0x91 34 #define MP2975_MFR_READ_VREF_R1 0xa1 35 #define MP2975_MFR_READ_VREF_R2 0xa3 36 #define MP2975_MFR_OVP_TH_SET 0xe5 37 #define MP2975_MFR_UVP_SET 0xe6 38 39 #define MP2973_MFR_RESO_SET 0xc7 40 41 #define MP2975_VOUT_FORMAT BIT(15) 42 #define MP2975_VID_STEP_SEL_R1 BIT(4) 43 #define MP2975_IMVP9_EN_R1 BIT(13) 44 #define MP2975_VID_STEP_SEL_R2 BIT(3) 45 #define MP2975_IMVP9_EN_R2 BIT(12) 46 #define MP2975_PRT_THRES_DIV_OV_EN BIT(14) 47 #define MP2975_DRMOS_KCS GENMASK(13, 12) 48 #define MP2975_PROT_DEV_OV_OFF 10 49 #define MP2975_PROT_DEV_OV_ON 5 50 #define MP2975_SENSE_AMPL BIT(11) 51 #define MP2975_SENSE_AMPL_UNIT 1 52 #define MP2975_SENSE_AMPL_HALF 2 53 #define MP2975_VIN_UV_LIMIT_UNIT 8 54 55 #define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6) 56 #define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3) 57 #define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7) 58 #define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6) 59 #define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4) 60 #define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3) 61 62 #define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d 63 #define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d 64 #define MP2973_VID_STEP_SEL_R1 BIT(4) 65 #define MP2973_IMVP9_EN_R1 BIT(14) 66 #define MP2973_VID_STEP_SEL_R2 BIT(3) 67 #define MP2973_IMVP9_EN_R2 BIT(13) 68 69 #define MP2973_MFR_OCP_TOTAL_SET 0x5f 70 #define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0) 71 #define MP2973_MFR_OCP_LEVEL_RES BIT(15) 72 73 #define MP2973_MFR_READ_IOUT_PK 0x90 74 #define MP2973_MFR_READ_POUT_PK 0x91 75 76 #define MP2975_MAX_PHASE_RAIL1 8 77 #define MP2975_MAX_PHASE_RAIL2 4 78 79 #define MP2973_MAX_PHASE_RAIL1 14 80 #define MP2973_MAX_PHASE_RAIL2 6 81 82 #define MP2971_MAX_PHASE_RAIL1 8 83 #define MP2971_MAX_PHASE_RAIL2 3 84 85 #define MP2975_PAGE_NUM 2 86 87 #define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \ 88 PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \ 89 PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) 90 91 enum chips { 92 mp2971, mp2973, mp2975 93 }; 94 95 static const int mp2975_max_phases[][MP2975_PAGE_NUM] = { 96 [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 }, 97 [mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 }, 98 [mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 }, 99 }; 100 101 struct mp2975_driver_info { 102 const struct pmbus_driver_info *info; 103 enum chips chip_id; 104 }; 105 106 struct mp2975_data { 107 struct pmbus_driver_info info; 108 enum chips chip_id; 109 int vout_scale; 110 int max_phases[MP2975_PAGE_NUM]; 111 int vid_step[MP2975_PAGE_NUM]; 112 int vref[MP2975_PAGE_NUM]; 113 int vref_off[MP2975_PAGE_NUM]; 114 int vout_max[MP2975_PAGE_NUM]; 115 int vout_ov_fixed[MP2975_PAGE_NUM]; 116 int curr_sense_gain[MP2975_PAGE_NUM]; 117 }; 118 119 static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { 120 PMBUS_REGULATOR("vout", 0), 121 PMBUS_REGULATOR("vout", 1), 122 }; 123 124 #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) 125 126 static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg) 127 { 128 switch (reg) { 129 case PMBUS_VOUT_MODE: 130 /* 131 * Report direct format as configured by MFR_DC_LOOP_CTRL. 132 * Unlike on MP2971/MP2973 the reported VOUT_MODE isn't automatically 133 * internally updated, but always reads as PB_VOUT_MODE_VID. 134 */ 135 return PB_VOUT_MODE_DIRECT; 136 default: 137 return -ENODATA; 138 } 139 } 140 141 static int 142 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, 143 u16 mask) 144 { 145 int ret = pmbus_read_word_data(client, page, phase, reg); 146 147 return (ret > 0) ? ret & mask : ret; 148 } 149 150 static int 151 mp2975_vid2direct(int vrf, int val) 152 { 153 switch (vrf) { 154 case vr12: 155 if (val >= 0x01) 156 return 250 + (val - 1) * 5; 157 break; 158 case vr13: 159 if (val >= 0x01) 160 return 500 + (val - 1) * 10; 161 break; 162 case imvp9: 163 if (val >= 0x01) 164 return 200 + (val - 1) * 10; 165 break; 166 default: 167 return -EINVAL; 168 } 169 return 0; 170 } 171 172 #define MAX_LIN_MANTISSA (1023 * 1000) 173 #define MIN_LIN_MANTISSA (511 * 1000) 174 175 /* Converts a milli-unit DIRECT value to LINEAR11 format */ 176 static u16 mp2975_data2reg_linear11(s64 val) 177 { 178 s16 exponent = 0, mantissa; 179 180 /* simple case */ 181 if (val == 0) 182 return 0; 183 184 /* Reduce large mantissa until it fits into 10 bit */ 185 while (val >= MAX_LIN_MANTISSA && exponent < 15) { 186 exponent++; 187 val >>= 1; 188 } 189 /* Increase small mantissa to improve precision */ 190 while (val < MIN_LIN_MANTISSA && exponent > -15) { 191 exponent--; 192 val <<= 1; 193 } 194 195 /* Convert mantissa from milli-units to units */ 196 mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); 197 198 /* Convert to 5 bit exponent, 11 bit mantissa */ 199 return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); 200 } 201 202 static int 203 mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data, 204 int page, int phase, u8 reg) 205 { 206 int ph_curr, ret; 207 208 ret = pmbus_read_word_data(client, page, phase, reg); 209 if (ret < 0) 210 return ret; 211 212 if (!((phase + 1) % MP2975_PAGE_NUM)) 213 ret >>= 8; 214 ret &= 0xff; 215 216 /* 217 * Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs) 218 * where: 219 * - Kcs is the DrMOS current sense gain of power stage, which is 220 * obtained from the register MP2975_MFR_VR_CONFIG1, bits 13-12 with 221 * the following selection of DrMOS (data->curr_sense_gain[page]): 222 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. 223 * - Rcs is the internal phase current sense resistor which is constant 224 * value 1kΩ. 225 */ 226 ph_curr = ret * 100 - 9800; 227 228 /* 229 * Current phase sensing, providing by the device is not accurate 230 * for the light load. This because sampling of current occurrence of 231 * bit weight has a big deviation for light load. For handling such 232 * case phase current is represented as the maximum between the value 233 * calculated above and total rail current divided by number phases. 234 */ 235 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); 236 if (ret < 0) 237 return ret; 238 239 return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]), 240 DIV_ROUND_CLOSEST(ph_curr, data->curr_sense_gain[page])); 241 } 242 243 static int 244 mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data, 245 int page, int phase) 246 { 247 int ret; 248 249 if (page) { 250 switch (phase) { 251 case 0 ... 1: 252 ret = mp2975_read_phase(client, data, page, phase, 253 MP2975_MFR_READ_CS7_8); 254 break; 255 case 2 ... 3: 256 ret = mp2975_read_phase(client, data, page, phase, 257 MP2975_MFR_READ_CS9_10); 258 break; 259 case 4 ... 5: 260 ret = mp2975_read_phase(client, data, page, phase, 261 MP2975_MFR_READ_CS11_12); 262 break; 263 default: 264 return -ENODATA; 265 } 266 } else { 267 switch (phase) { 268 case 0 ... 1: 269 ret = mp2975_read_phase(client, data, page, phase, 270 MP2975_MFR_READ_CS1_2); 271 break; 272 case 2 ... 3: 273 ret = mp2975_read_phase(client, data, page, phase, 274 MP2975_MFR_READ_CS3_4); 275 break; 276 case 4 ... 5: 277 ret = mp2975_read_phase(client, data, page, phase, 278 MP2975_MFR_READ_CS5_6); 279 break; 280 case 6 ... 7: 281 ret = mp2975_read_phase(client, data, page, phase, 282 MP2975_MFR_READ_CS7_8); 283 break; 284 case 8 ... 9: 285 ret = mp2975_read_phase(client, data, page, phase, 286 MP2975_MFR_READ_CS9_10); 287 break; 288 case 10 ... 11: 289 ret = mp2975_read_phase(client, data, page, phase, 290 MP2975_MFR_READ_CS11_12); 291 break; 292 default: 293 return -ENODATA; 294 } 295 } 296 return ret; 297 } 298 299 static int mp2973_read_word_data(struct i2c_client *client, int page, 300 int phase, int reg) 301 { 302 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 303 struct mp2975_data *data = to_mp2975_data(info); 304 int ret; 305 306 switch (reg) { 307 case PMBUS_STATUS_WORD: 308 /* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */ 309 ret = pmbus_read_word_data(client, page, phase, reg); 310 if (ret < 0) 311 return ret; 312 ret ^= PB_STATUS_POWER_GOOD_N; 313 break; 314 case PMBUS_OT_FAULT_LIMIT: 315 ret = mp2975_read_word_helper(client, page, phase, reg, 316 GENMASK(7, 0)); 317 break; 318 case PMBUS_VIN_OV_FAULT_LIMIT: 319 ret = mp2975_read_word_helper(client, page, phase, reg, 320 GENMASK(7, 0)); 321 if (ret < 0) 322 return ret; 323 324 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 325 break; 326 case PMBUS_VOUT_OV_FAULT_LIMIT: 327 /* 328 * MP2971 and mp2973 only supports tracking (ovp1) mode. 329 */ 330 ret = mp2975_read_word_helper(client, page, phase, 331 MP2975_MFR_OVP_TH_SET, 332 GENMASK(2, 0)); 333 if (ret < 0) 334 return ret; 335 336 ret = data->vout_max[page] + 50 * (ret + 1); 337 break; 338 case PMBUS_VOUT_UV_FAULT_LIMIT: 339 ret = mp2975_read_word_helper(client, page, phase, reg, 340 GENMASK(8, 0)); 341 if (ret < 0) 342 return ret; 343 ret = mp2975_vid2direct(info->vrm_version[page], ret); 344 break; 345 case PMBUS_VIRT_READ_POUT_MAX: 346 ret = pmbus_read_word_data(client, page, phase, 347 MP2973_MFR_READ_POUT_PK); 348 break; 349 case PMBUS_VIRT_READ_IOUT_MAX: 350 ret = pmbus_read_word_data(client, page, phase, 351 MP2973_MFR_READ_IOUT_PK); 352 break; 353 case PMBUS_IOUT_OC_FAULT_LIMIT: 354 ret = mp2975_read_word_helper(client, page, phase, 355 MP2973_MFR_OCP_TOTAL_SET, 356 GENMASK(15, 0)); 357 if (ret < 0) 358 return ret; 359 360 if (ret & MP2973_MFR_OCP_LEVEL_RES) 361 ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK); 362 else 363 ret = ret & MP2973_OCP_TOTAL_CUR_MASK; 364 365 ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000); 366 break; 367 case PMBUS_UT_WARN_LIMIT: 368 case PMBUS_UT_FAULT_LIMIT: 369 case PMBUS_VIN_UV_WARN_LIMIT: 370 case PMBUS_VIN_UV_FAULT_LIMIT: 371 case PMBUS_VOUT_UV_WARN_LIMIT: 372 case PMBUS_VOUT_OV_WARN_LIMIT: 373 case PMBUS_VIN_OV_WARN_LIMIT: 374 case PMBUS_IIN_OC_FAULT_LIMIT: 375 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 376 case PMBUS_IOUT_OC_WARN_LIMIT: 377 case PMBUS_IOUT_UC_FAULT_LIMIT: 378 case PMBUS_POUT_OP_FAULT_LIMIT: 379 case PMBUS_POUT_OP_WARN_LIMIT: 380 case PMBUS_PIN_OP_WARN_LIMIT: 381 return -ENXIO; 382 default: 383 return -ENODATA; 384 } 385 386 return ret; 387 } 388 389 static int mp2973_write_word_data(struct i2c_client *client, int page, 390 int reg, u16 word) 391 { 392 u8 target, mask; 393 long ret; 394 395 if (reg != PMBUS_SMBALERT_MASK) 396 return -ENODATA; 397 398 /* 399 * Vendor-specific SMBALERT_MASK register with 16 maskable bits. 400 */ 401 ret = pmbus_read_word_data(client, 0, 0, PMBUS_SMBALERT_MASK); 402 if (ret < 0) 403 return ret; 404 405 target = word & 0xff; 406 mask = word >> 8; 407 408 /* 409 * Set/Clear 'bit' in 'ret' based on condition followed by define for each bit in SMBALERT_MASK. 410 * Also bit 2 & 15 are reserved. 411 */ 412 413 #define MP2973_TEMP_OT 0 414 #define MP2973_VIN_UVLO 1 415 #define MP2973_VIN_OVP 3 416 #define MP2973_MTP_FAULT 4 417 #define MP2973_OTHER_COMM 5 418 #define MP2973_MTP_BLK_TRIG 6 419 #define MP2973_PACKET_ERROR 7 420 #define MP2973_INVALID_DATA 8 421 #define MP2973_INVALID_COMMAND 9 422 #define MP2973_IOUT_OC_LV 10 423 #define MP2973_IOUT_OC 11 424 #define MP2973_VOUT_MAX_MIN_WARNING 12 425 #define MP2973_VOLTAGE_UV 13 426 #define MP2973_VOLTAGE_OV 14 427 428 switch (target) { 429 case PMBUS_STATUS_CML: 430 __assign_bit(MP2973_INVALID_DATA, &ret, !(mask & PB_CML_FAULT_INVALID_DATA)); 431 __assign_bit(MP2973_INVALID_COMMAND, &ret, !(mask & PB_CML_FAULT_INVALID_COMMAND)); 432 __assign_bit(MP2973_OTHER_COMM, &ret, !(mask & PB_CML_FAULT_OTHER_COMM)); 433 __assign_bit(MP2973_PACKET_ERROR, &ret, !(mask & PB_CML_FAULT_PACKET_ERROR)); 434 break; 435 case PMBUS_STATUS_VOUT: 436 __assign_bit(MP2973_VOLTAGE_UV, &ret, !(mask & PB_VOLTAGE_UV_FAULT)); 437 __assign_bit(MP2973_VOLTAGE_OV, &ret, !(mask & PB_VOLTAGE_OV_FAULT)); 438 break; 439 case PMBUS_STATUS_IOUT: 440 __assign_bit(MP2973_IOUT_OC, &ret, !(mask & PB_IOUT_OC_FAULT)); 441 __assign_bit(MP2973_IOUT_OC_LV, &ret, !(mask & PB_IOUT_OC_LV_FAULT)); 442 break; 443 case PMBUS_STATUS_TEMPERATURE: 444 __assign_bit(MP2973_TEMP_OT, &ret, !(mask & PB_TEMP_OT_FAULT)); 445 break; 446 /* 447 * Map remaining bits to MFR specific to let the PMBUS core mask 448 * those bits by default. 449 */ 450 case PMBUS_STATUS_MFR_SPECIFIC: 451 __assign_bit(MP2973_VIN_UVLO, &ret, !(mask & BIT(1))); 452 __assign_bit(MP2973_VIN_OVP, &ret, !(mask & BIT(3))); 453 __assign_bit(MP2973_MTP_FAULT, &ret, !(mask & BIT(4))); 454 __assign_bit(MP2973_MTP_BLK_TRIG, &ret, !(mask & BIT(6))); 455 break; 456 default: 457 return 0; 458 } 459 460 return pmbus_write_word_data(client, 0, PMBUS_SMBALERT_MASK, ret); 461 } 462 463 static int mp2975_read_word_data(struct i2c_client *client, int page, 464 int phase, int reg) 465 { 466 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 467 struct mp2975_data *data = to_mp2975_data(info); 468 int ret; 469 470 switch (reg) { 471 case PMBUS_OT_FAULT_LIMIT: 472 ret = mp2975_read_word_helper(client, page, phase, reg, 473 GENMASK(7, 0)); 474 break; 475 case PMBUS_VIN_OV_FAULT_LIMIT: 476 ret = mp2975_read_word_helper(client, page, phase, reg, 477 GENMASK(7, 0)); 478 if (ret < 0) 479 return ret; 480 481 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 482 break; 483 case PMBUS_VOUT_OV_FAULT_LIMIT: 484 /* 485 * Register provides two values for over-voltage protection 486 * threshold for fixed (ovp2) and tracking (ovp1) modes. The 487 * minimum of these two values is provided as over-voltage 488 * fault alarm. 489 */ 490 ret = mp2975_read_word_helper(client, page, phase, 491 MP2975_MFR_OVP_TH_SET, 492 GENMASK(2, 0)); 493 if (ret < 0) 494 return ret; 495 496 ret = min_t(int, data->vout_max[page] + 50 * (ret + 1), 497 data->vout_ov_fixed[page]); 498 break; 499 case PMBUS_VOUT_UV_FAULT_LIMIT: 500 ret = mp2975_read_word_helper(client, page, phase, 501 MP2975_MFR_UVP_SET, 502 GENMASK(2, 0)); 503 if (ret < 0) 504 return ret; 505 506 ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 * 507 (ret + 1) * data->vout_scale, 10); 508 break; 509 case PMBUS_VIRT_READ_POUT_MAX: 510 ret = mp2975_read_word_helper(client, page, phase, 511 MP2975_MFR_READ_POUT_PK, 512 GENMASK(12, 0)); 513 if (ret < 0) 514 return ret; 515 516 ret = DIV_ROUND_CLOSEST(ret, 4); 517 break; 518 case PMBUS_VIRT_READ_IOUT_MAX: 519 ret = mp2975_read_word_helper(client, page, phase, 520 MP2975_MFR_READ_IOUT_PK, 521 GENMASK(12, 0)); 522 if (ret < 0) 523 return ret; 524 525 ret = DIV_ROUND_CLOSEST(ret, 4); 526 break; 527 case PMBUS_READ_IOUT: 528 ret = mp2975_read_phases(client, data, page, phase); 529 if (ret < 0) 530 return ret; 531 532 break; 533 case PMBUS_UT_WARN_LIMIT: 534 case PMBUS_UT_FAULT_LIMIT: 535 case PMBUS_VIN_UV_WARN_LIMIT: 536 case PMBUS_VIN_UV_FAULT_LIMIT: 537 case PMBUS_VOUT_UV_WARN_LIMIT: 538 case PMBUS_VOUT_OV_WARN_LIMIT: 539 case PMBUS_VIN_OV_WARN_LIMIT: 540 case PMBUS_IIN_OC_FAULT_LIMIT: 541 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 542 case PMBUS_IIN_OC_WARN_LIMIT: 543 case PMBUS_IOUT_OC_WARN_LIMIT: 544 case PMBUS_IOUT_OC_FAULT_LIMIT: 545 case PMBUS_IOUT_UC_FAULT_LIMIT: 546 case PMBUS_POUT_OP_FAULT_LIMIT: 547 case PMBUS_POUT_OP_WARN_LIMIT: 548 case PMBUS_PIN_OP_WARN_LIMIT: 549 return -ENXIO; 550 default: 551 return -ENODATA; 552 } 553 554 return ret; 555 } 556 557 static int mp2975_identify_multiphase_rail2(struct i2c_client *client, 558 struct mp2975_data *data) 559 { 560 int ret; 561 562 /* 563 * Identify multiphase for rail 2 - could be from 0 to data->max_phases[1]. 564 * In case phase number is zero – only page zero is supported 565 */ 566 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 567 if (ret < 0) 568 return ret; 569 570 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2); 571 if (ret < 0) 572 return ret; 573 574 ret &= GENMASK(2, 0); 575 return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret; 576 } 577 578 static void mp2975_set_phase_rail1(struct pmbus_driver_info *info) 579 { 580 int i; 581 582 for (i = 0 ; i < info->phases[0]; i++) 583 info->pfunc[i] = PMBUS_HAVE_IOUT; 584 } 585 586 static void 587 mp2975_set_phase_rail2(struct pmbus_driver_info *info, int num_phases) 588 { 589 int i; 590 591 /* Set phases for rail 2 from upper to lower. */ 592 for (i = 1; i <= num_phases; i++) 593 info->pfunc[MP2975_MAX_PHASE_RAIL1 - i] = PMBUS_HAVE_IOUT; 594 } 595 596 static int 597 mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, 598 struct pmbus_driver_info *info) 599 { 600 int num_phases2, ret; 601 602 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 603 if (ret < 0) 604 return ret; 605 606 /* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */ 607 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1); 608 if (ret <= 0) 609 return ret; 610 611 info->phases[0] = ret & GENMASK(3, 0); 612 613 /* 614 * The device provides a total of $n PWM pins, and can be configured 615 * to different phase count applications for rail 1 and rail 2. 616 * Rail 1 can be set to $n phases, while rail 2 can be set to less than 617 * that. When rail 1’s phase count is configured as 0, rail 618 * 1 operates with 1-phase DCM. When rail 2 phase count is configured 619 * as 0, rail 2 is disabled. 620 */ 621 if (info->phases[0] > data->max_phases[0]) 622 return -EINVAL; 623 624 if (data->chip_id == mp2975) { 625 mp2975_set_phase_rail1(info); 626 num_phases2 = min(data->max_phases[0] - info->phases[0], 627 data->max_phases[1]); 628 if (info->phases[1] && info->phases[1] <= num_phases2) 629 mp2975_set_phase_rail2(info, num_phases2); 630 } 631 632 return 0; 633 } 634 635 static int 636 mp2975_identify_vid(struct i2c_client *client, struct mp2975_data *data, 637 struct pmbus_driver_info *info, u32 reg, int page, 638 u32 imvp_bit, u32 vr_bit) 639 { 640 int ret; 641 642 /* Identify VID mode and step selection. */ 643 ret = i2c_smbus_read_word_data(client, reg); 644 if (ret < 0) 645 return ret; 646 647 if (ret & imvp_bit) { 648 info->vrm_version[page] = imvp9; 649 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 650 } else if (ret & vr_bit) { 651 info->vrm_version[page] = vr12; 652 data->vid_step[page] = MP2975_PROT_DEV_OV_ON; 653 } else { 654 info->vrm_version[page] = vr13; 655 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 656 } 657 658 return 0; 659 } 660 661 static int 662 mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 663 struct pmbus_driver_info *info) 664 { 665 int ret; 666 667 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 668 if (ret < 0) 669 return ret; 670 671 /* Identify VID mode for rail 1. */ 672 ret = mp2975_identify_vid(client, data, info, 673 MP2975_MFR_VR_MULTI_CONFIG_R1, 0, 674 MP2975_IMVP9_EN_R1, MP2975_VID_STEP_SEL_R1); 675 if (ret < 0) 676 return ret; 677 678 /* Identify VID mode for rail 2, if connected. */ 679 if (info->phases[1]) 680 ret = mp2975_identify_vid(client, data, info, 681 MP2975_MFR_VR_MULTI_CONFIG_R2, 1, 682 MP2975_IMVP9_EN_R2, 683 MP2975_VID_STEP_SEL_R2); 684 685 return ret; 686 } 687 688 static int 689 mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 690 struct pmbus_driver_info *info) 691 { 692 int ret; 693 694 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 695 if (ret < 0) 696 return ret; 697 698 /* Identify VID mode for rail 1. */ 699 ret = mp2975_identify_vid(client, data, info, 700 MP2973_MFR_VR_MULTI_CONFIG_R1, 0, 701 MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1); 702 703 if (ret < 0) 704 return ret; 705 706 /* Identify VID mode for rail 2, if connected. */ 707 if (info->phases[1]) 708 ret = mp2975_identify_vid(client, data, info, 709 MP2973_MFR_VR_MULTI_CONFIG_R2, 1, 710 MP2973_IMVP9_EN_R2, 711 MP2973_VID_STEP_SEL_R2); 712 713 return ret; 714 } 715 716 static int 717 mp2975_current_sense_gain_get(struct i2c_client *client, 718 struct mp2975_data *data) 719 { 720 int i, ret; 721 722 /* 723 * Obtain DrMOS current sense gain of power stage from the register 724 * MP2975_MFR_VR_CONFIG1, bits 13-12. The value is selected as below: 725 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other 726 * values are invalid. 727 */ 728 for (i = 0 ; i < data->info.pages; i++) { 729 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 730 if (ret < 0) 731 return ret; 732 ret = i2c_smbus_read_word_data(client, 733 MP2975_MFR_VR_CONFIG1); 734 if (ret < 0) 735 return ret; 736 737 switch ((ret & MP2975_DRMOS_KCS) >> 12) { 738 case 0: 739 data->curr_sense_gain[i] = 50; 740 break; 741 case 1: 742 data->curr_sense_gain[i] = 85; 743 break; 744 case 2: 745 data->curr_sense_gain[i] = 97; 746 break; 747 default: 748 data->curr_sense_gain[i] = 100; 749 break; 750 } 751 } 752 753 return 0; 754 } 755 756 static int 757 mp2975_vref_get(struct i2c_client *client, struct mp2975_data *data, 758 struct pmbus_driver_info *info) 759 { 760 int ret; 761 762 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 3); 763 if (ret < 0) 764 return ret; 765 766 /* Get voltage reference value for rail 1. */ 767 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R1); 768 if (ret < 0) 769 return ret; 770 771 data->vref[0] = ret * data->vid_step[0]; 772 773 /* Get voltage reference value for rail 2, if connected. */ 774 if (data->info.pages == MP2975_PAGE_NUM) { 775 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R2); 776 if (ret < 0) 777 return ret; 778 779 data->vref[1] = ret * data->vid_step[1]; 780 } 781 return 0; 782 } 783 784 static int 785 mp2975_vref_offset_get(struct i2c_client *client, struct mp2975_data *data, 786 int page) 787 { 788 int ret; 789 790 ret = i2c_smbus_read_word_data(client, MP2975_MFR_OVP_TH_SET); 791 if (ret < 0) 792 return ret; 793 794 switch ((ret & GENMASK(5, 3)) >> 3) { 795 case 1: 796 data->vref_off[page] = 140; 797 break; 798 case 2: 799 data->vref_off[page] = 220; 800 break; 801 case 4: 802 data->vref_off[page] = 400; 803 break; 804 default: 805 return -EINVAL; 806 } 807 return 0; 808 } 809 810 static int 811 mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data, 812 struct pmbus_driver_info *info, int page) 813 { 814 int ret; 815 816 /* Get maximum reference voltage of VID-DAC in VID format. */ 817 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_MAX); 818 if (ret < 0) 819 return ret; 820 821 data->vout_max[page] = mp2975_vid2direct(info->vrm_version[page], ret & 822 GENMASK(8, 0)); 823 return 0; 824 } 825 826 static int 827 mp2975_set_vout_format(struct i2c_client *client, 828 struct mp2975_data *data, int page) 829 { 830 int ret, i; 831 832 /* Enable DIRECT VOUT format 1mV/LSB */ 833 if (data->chip_id == mp2975) { 834 ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); 835 if (ret < 0) 836 return ret; 837 if (ret & MP2975_VOUT_FORMAT) { 838 ret &= ~MP2975_VOUT_FORMAT; 839 ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); 840 } 841 } else { 842 ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET); 843 if (ret < 0) 844 return ret; 845 i = ret; 846 847 if (page == 0) { 848 i &= ~MP2973_VOUT_FORMAT_R1; 849 i |= MP2973_VOUT_FORMAT_DIRECT_R1; 850 } else { 851 i &= ~MP2973_VOUT_FORMAT_R2; 852 i |= MP2973_VOUT_FORMAT_DIRECT_R2; 853 } 854 if (i != ret) 855 ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i); 856 } 857 return ret; 858 } 859 860 static int 861 mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data, 862 struct pmbus_driver_info *info) 863 { 864 int thres_dev, sense_ampl, ret; 865 866 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); 867 if (ret < 0) 868 return ret; 869 870 /* 871 * Get divider for over- and under-voltage protection thresholds 872 * configuration from the Advanced Options of Auto Phase Shedding and 873 * decay register. 874 */ 875 ret = i2c_smbus_read_word_data(client, MP2975_MFR_APS_DECAY_ADV); 876 if (ret < 0) 877 return ret; 878 thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON : 879 MP2975_PROT_DEV_OV_OFF; 880 881 /* Select the gain of remote sense amplifier. */ 882 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP); 883 if (ret < 0) 884 return ret; 885 sense_ampl = ret & MP2975_SENSE_AMPL ? MP2975_SENSE_AMPL_HALF : 886 MP2975_SENSE_AMPL_UNIT; 887 888 data->vout_scale = sense_ampl * thres_dev; 889 890 return 0; 891 } 892 893 static int 894 mp2975_vout_per_rail_config_get(struct i2c_client *client, 895 struct mp2975_data *data, 896 struct pmbus_driver_info *info) 897 { 898 int i, ret; 899 900 for (i = 0; i < data->info.pages; i++) { 901 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 902 if (ret < 0) 903 continue; 904 905 /* Set VOUT format for READ_VOUT command : direct. */ 906 ret = mp2975_set_vout_format(client, data, i); 907 if (ret < 0) 908 return ret; 909 910 /* Obtain maximum voltage values. */ 911 ret = mp2975_vout_max_get(client, data, info, i); 912 if (ret < 0) 913 return ret; 914 915 /* Skip if reading Vref is unsupported */ 916 if (data->chip_id != mp2975) 917 continue; 918 919 /* Obtain voltage reference offsets. */ 920 ret = mp2975_vref_offset_get(client, data, i); 921 if (ret < 0) 922 return ret; 923 924 /* 925 * Set over-voltage fixed value. Thresholds are provided as 926 * fixed value, and tracking value. The minimum of them are 927 * exposed as over-voltage critical threshold. 928 */ 929 data->vout_ov_fixed[i] = data->vref[i] + 930 DIV_ROUND_CLOSEST(data->vref_off[i] * 931 data->vout_scale, 932 10); 933 } 934 935 return 0; 936 } 937 938 static const struct pmbus_driver_info mp2975_info = { 939 .pages = 1, 940 .format[PSC_VOLTAGE_IN] = linear, 941 .format[PSC_VOLTAGE_OUT] = direct, 942 .format[PSC_TEMPERATURE] = direct, 943 .format[PSC_CURRENT_IN] = linear, 944 .format[PSC_CURRENT_OUT] = direct, 945 .format[PSC_POWER] = direct, 946 .m[PSC_TEMPERATURE] = 1, 947 .m[PSC_VOLTAGE_OUT] = 1, 948 .R[PSC_VOLTAGE_OUT] = 3, 949 .m[PSC_CURRENT_OUT] = 1, 950 .m[PSC_POWER] = 1, 951 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 952 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 953 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 954 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL, 955 .read_byte_data = mp2975_read_byte_data, 956 .read_word_data = mp2975_read_word_data, 957 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 958 .num_regulators = 1, 959 .reg_desc = mp2975_reg_desc, 960 #endif 961 }; 962 963 static const struct pmbus_driver_info mp2973_info = { 964 .pages = 1, 965 .format[PSC_VOLTAGE_IN] = linear, 966 .format[PSC_VOLTAGE_OUT] = direct, 967 .format[PSC_TEMPERATURE] = linear, 968 .format[PSC_CURRENT_IN] = linear, 969 .format[PSC_CURRENT_OUT] = linear, 970 .format[PSC_POWER] = linear, 971 .m[PSC_VOLTAGE_OUT] = 1, 972 .R[PSC_VOLTAGE_OUT] = 3, 973 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 974 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 975 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 976 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, 977 .read_word_data = mp2973_read_word_data, 978 .write_word_data = mp2973_write_word_data, 979 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 980 .num_regulators = 1, 981 .reg_desc = mp2975_reg_desc, 982 #endif 983 }; 984 985 static const struct mp2975_driver_info mp2975_ddinfo[] = { 986 [mp2975] = { .info = &mp2975_info, .chip_id = mp2975 }, 987 [mp2973] = { .info = &mp2973_info, .chip_id = mp2973 }, 988 [mp2971] = { .info = &mp2973_info, .chip_id = mp2971 }, 989 }; 990 991 static int mp2975_probe(struct i2c_client *client) 992 { 993 const struct mp2975_driver_info *ddinfo; 994 struct pmbus_driver_info *info; 995 struct mp2975_data *data; 996 int ret; 997 998 ddinfo = i2c_get_match_data(client); 999 if (!ddinfo) 1000 return -ENODEV; 1001 1002 data = devm_kzalloc(&client->dev, sizeof(struct mp2975_data), 1003 GFP_KERNEL); 1004 if (!data) 1005 return -ENOMEM; 1006 1007 data->chip_id = ddinfo->chip_id; 1008 1009 memcpy(data->max_phases, mp2975_max_phases[data->chip_id], 1010 sizeof(data->max_phases)); 1011 1012 memcpy(&data->info, ddinfo->info, sizeof(data->info)); 1013 1014 info = &data->info; 1015 1016 /* Identify multiphase configuration for rail 2. */ 1017 ret = mp2975_identify_multiphase_rail2(client, data); 1018 if (ret < 0) 1019 return ret; 1020 1021 if (ret) { 1022 /* Two rails are connected. */ 1023 data->info.pages = MP2975_PAGE_NUM; 1024 data->info.phases[1] = ret; 1025 data->info.func[1] = MP2975_RAIL2_FUNC; 1026 if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)) 1027 data->info.num_regulators = MP2975_PAGE_NUM; 1028 } 1029 1030 /* Identify multiphase configuration. */ 1031 ret = mp2975_identify_multiphase(client, data, info); 1032 if (ret) 1033 return ret; 1034 1035 if (data->chip_id == mp2975) { 1036 /* Identify VID setting per rail. */ 1037 ret = mp2975_identify_rails_vid(client, data, info); 1038 if (ret < 0) 1039 return ret; 1040 1041 /* Obtain current sense gain of power stage. */ 1042 ret = mp2975_current_sense_gain_get(client, data); 1043 if (ret) 1044 return ret; 1045 1046 /* Obtain voltage reference values. */ 1047 ret = mp2975_vref_get(client, data, info); 1048 if (ret) 1049 return ret; 1050 1051 /* Obtain vout over-voltage scales. */ 1052 ret = mp2975_vout_ov_scale_get(client, data, info); 1053 if (ret < 0) 1054 return ret; 1055 } else { 1056 /* Identify VID setting per rail. */ 1057 ret = mp2973_identify_rails_vid(client, data, info); 1058 if (ret < 0) 1059 return ret; 1060 } 1061 1062 /* Obtain offsets, maximum and format for vout. */ 1063 ret = mp2975_vout_per_rail_config_get(client, data, info); 1064 if (ret) 1065 return ret; 1066 1067 return pmbus_do_probe(client, info); 1068 } 1069 1070 static const struct of_device_id mp2975_of_match[] = { 1071 {.compatible = "mps,mp2971", .data = &mp2975_ddinfo[mp2971]}, 1072 {.compatible = "mps,mp2973", .data = &mp2975_ddinfo[mp2973]}, 1073 {.compatible = "mps,mp2975", .data = &mp2975_ddinfo[mp2975]}, 1074 {} 1075 }; 1076 MODULE_DEVICE_TABLE(of, mp2975_of_match); 1077 1078 static const struct i2c_device_id mp2975_id[] = { 1079 { .name = "mp2971", .driver_data = (kernel_ulong_t)&mp2975_ddinfo[mp2971] }, 1080 { .name = "mp2973", .driver_data = (kernel_ulong_t)&mp2975_ddinfo[mp2973] }, 1081 { .name = "mp2975", .driver_data = (kernel_ulong_t)&mp2975_ddinfo[mp2975] }, 1082 { } 1083 }; 1084 MODULE_DEVICE_TABLE(i2c, mp2975_id); 1085 1086 static struct i2c_driver mp2975_driver = { 1087 .driver = { 1088 .name = "mp2975", 1089 .of_match_table = mp2975_of_match, 1090 }, 1091 .probe = mp2975_probe, 1092 .id_table = mp2975_id, 1093 }; 1094 1095 module_i2c_driver(mp2975_driver); 1096 1097 MODULE_AUTHOR("Vadim Pasternak <vadimp@nvidia.com>"); 1098 MODULE_DESCRIPTION("PMBus driver for MPS MP2975 device"); 1099 MODULE_LICENSE("GPL"); 1100 MODULE_IMPORT_NS("PMBUS"); 1101