1 /* 2 * Copyright 2015-2026 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "inc/clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "inc/core_status.h" 34 #include "inc/hw/hw_shared.h" 35 #include "inc/hw/dchubbub.h" 36 #include "dsc/dsc.h" 37 #include "link_service_types.h" 38 39 struct pipe_ctx; 40 struct dc_state; 41 struct dc_stream_status; 42 struct dc_writeback_info; 43 struct dchub_init_data; 44 struct dc_static_screen_params; 45 struct resource_pool; 46 struct dc_phy_addr_space_config; 47 struct dc_virtual_addr_space_config; 48 struct dpp; 49 struct dce_hwseq; 50 struct link_resource; 51 struct dc_dmub_cmd; 52 struct pg_block_update; 53 struct drr_params; 54 struct dc_underflow_debug_data; 55 struct dsc_optc_config; 56 struct vm_system_aperture_param; 57 struct stream_encoder; 58 struct hpo_dp_stream_encoder; 59 struct hpo_frl_stream_encoder; 60 struct link_training_settings; 61 struct dc_link; 62 struct dc_crtc_timing; 63 struct subvp_pipe_control_lock_fast_params { 64 struct dc *dc; 65 bool lock; 66 bool subvp_immediate_flip; 67 }; 68 69 struct pipe_control_lock_params { 70 struct dc *dc; 71 struct pipe_ctx *pipe_ctx; 72 bool lock; 73 }; 74 75 struct set_flip_control_gsl_params { 76 struct hubp *hubp; 77 bool flip_immediate; 78 }; 79 80 struct program_triplebuffer_params { 81 const struct dc *dc; 82 struct pipe_ctx *pipe_ctx; 83 bool enableTripleBuffer; 84 }; 85 86 struct update_plane_addr_params { 87 struct dc *dc; 88 struct pipe_ctx *pipe_ctx; 89 }; 90 91 struct set_input_transfer_func_params { 92 struct dc *dc; 93 struct pipe_ctx *pipe_ctx; 94 struct dc_plane_state *plane_state; 95 }; 96 97 struct program_gamut_remap_params { 98 struct transform *xfm; 99 struct dpp *dpp; 100 struct mpc *mpc; 101 int mpcc_id; 102 const struct dc_stream_state *stream; 103 const struct dc_plane_state *plane; 104 bool is_top_pipe; 105 }; 106 107 struct hubp_enable_3dlut_fl_params { 108 struct hubp *hubp; 109 }; 110 111 struct tg_setup_vertical_interrupt0_params { 112 struct timing_generator *tg; 113 uint32_t start_line; 114 uint32_t end_line; 115 }; 116 117 struct update_info_frame_params { 118 struct dc *dc; 119 struct pipe_ctx *pipe_ctx; 120 }; 121 122 struct program_manual_trigger_params { 123 struct pipe_ctx *pipe_ctx; 124 }; 125 126 struct send_dmcub_cmd_params { 127 struct dc_context *ctx; 128 union dmub_rb_cmd *cmd; 129 enum dm_dmub_wait_type wait_type; 130 }; 131 132 struct setup_dpp_params { 133 struct pipe_ctx *pipe_ctx; 134 }; 135 136 struct program_bias_and_scale_params { 137 struct pipe_ctx *pipe_ctx; 138 }; 139 140 struct set_output_transfer_func_params { 141 struct transform *xfm; 142 struct dpp *dpp; 143 struct mpc *mpc; 144 int mpcc_id; 145 bool is_top_pipe; 146 const struct dc_stream_state *stream; 147 }; 148 struct program_upsp_params { 149 struct pipe_ctx *pipe_ctx; 150 }; 151 152 struct update_visual_confirm_params { 153 struct dc *dc; 154 struct pipe_ctx *pipe_ctx; 155 int mpcc_id; 156 }; 157 158 struct power_on_mpc_mem_pwr_params { 159 struct mpc *mpc; 160 int mpcc_id; 161 bool power_on; 162 }; 163 164 struct set_output_csc_params { 165 struct mpc *mpc; 166 int opp_id; 167 const uint16_t *regval; 168 enum mpc_output_csc_mode ocsc_mode; 169 }; 170 171 struct set_ocsc_default_params { 172 struct mpc *mpc; 173 int opp_id; 174 enum dc_color_space color_space; 175 enum mpc_output_csc_mode ocsc_mode; 176 }; 177 178 struct subvp_save_surf_addr { 179 struct dc_dmub_srv *dc_dmub_srv; 180 const struct dc_plane_address *addr; 181 uint8_t subvp_index; 182 }; 183 184 struct wait_for_dcc_meta_propagation_params { 185 const struct dc *dc; 186 const struct pipe_ctx *top_pipe_to_program; 187 }; 188 189 struct dmub_hw_control_lock_fast_params { 190 struct dc *dc; 191 bool is_required; 192 bool lock; 193 }; 194 195 struct program_surface_config_params { 196 struct hubp *hubp; 197 enum surface_pixel_format format; 198 struct dc_tiling_info *tiling_info; 199 struct plane_size plane_size; 200 enum dc_rotation_angle rotation; 201 struct dc_plane_dcc_param *dcc; 202 bool horizontal_mirror; 203 int compat_level; 204 }; 205 206 struct program_mcache_id_and_split_coordinate { 207 struct hubp *hubp; 208 struct dml2_hubp_pipe_mcache_regs *mcache_regs; 209 }; 210 211 struct control_cm_hist_params { 212 struct dpp *dpp; 213 struct cm_hist_control cm_hist_control; 214 enum dc_color_space color_space; 215 }; 216 217 struct program_cursor_update_now_params { 218 struct dc *dc; 219 struct pipe_ctx *pipe_ctx; 220 }; 221 222 struct hubp_wait_pipe_read_start_params { 223 struct hubp *hubp; 224 }; 225 226 struct apply_update_flags_for_phantom_params { 227 struct pipe_ctx *pipe_ctx; 228 }; 229 230 struct update_phantom_vp_position_params { 231 struct dc *dc; 232 struct pipe_ctx *pipe_ctx; 233 struct dc_state *context; 234 }; 235 236 struct set_odm_combine_params { 237 struct timing_generator *tg; 238 int opp_inst[MAX_PIPES]; 239 int opp_head_count; 240 int odm_slice_width; 241 int last_odm_slice_width; 242 }; 243 244 struct set_odm_bypass_params { 245 struct timing_generator *tg; 246 const struct dc_crtc_timing *timing; 247 }; 248 249 struct opp_pipe_clock_control_params { 250 struct output_pixel_processor *opp; 251 bool enable; 252 }; 253 254 struct opp_program_left_edge_extra_pixel_params { 255 struct output_pixel_processor *opp; 256 enum dc_pixel_encoding pixel_encoding; 257 bool is_otg_master; 258 }; 259 260 struct dccg_set_dto_dscclk_params { 261 struct dccg *dccg; 262 int inst; 263 int num_slices_h; 264 }; 265 266 struct dsc_set_config_params { 267 struct display_stream_compressor *dsc; 268 struct dsc_config *dsc_cfg; 269 struct dsc_optc_config *dsc_optc_cfg; 270 }; 271 272 struct dsc_enable_params { 273 struct display_stream_compressor *dsc; 274 int opp_inst; 275 }; 276 277 struct tg_set_dsc_config_params { 278 struct timing_generator *tg; 279 struct dsc_optc_config *dsc_optc_cfg; 280 bool enable; 281 }; 282 283 struct dsc_disconnect_params { 284 struct display_stream_compressor *dsc; 285 }; 286 287 struct dsc_read_state_params { 288 struct display_stream_compressor *dsc; 289 struct dcn_dsc_state *dsc_state; 290 }; 291 292 struct dsc_calculate_and_set_config_params { 293 struct pipe_ctx *pipe_ctx; 294 struct dsc_optc_config dsc_optc_cfg; 295 bool enable; 296 int opp_cnt; 297 }; 298 299 struct dsc_enable_with_opp_params { 300 struct pipe_ctx *pipe_ctx; 301 }; 302 303 struct program_tg_params { 304 struct dc *dc; 305 struct pipe_ctx *pipe_ctx; 306 struct dc_state *context; 307 }; 308 309 struct tg_program_global_sync_params { 310 struct timing_generator *tg; 311 int vready_offset; 312 unsigned int vstartup_lines; 313 unsigned int vupdate_offset_pixels; 314 unsigned int vupdate_vupdate_width_pixels; 315 unsigned int pstate_keepout_start_lines; 316 }; 317 318 struct tg_wait_for_state_params { 319 struct timing_generator *tg; 320 enum crtc_state state; 321 }; 322 323 struct tg_set_vtg_params_params { 324 struct timing_generator *tg; 325 struct dc_crtc_timing *timing; 326 bool program_fp2; 327 }; 328 329 struct tg_set_gsl_params { 330 struct timing_generator *tg; 331 struct gsl_params gsl; 332 }; 333 334 struct tg_set_gsl_source_select_params { 335 struct timing_generator *tg; 336 int group_idx; 337 uint32_t gsl_ready_signal; 338 }; 339 340 struct setup_vupdate_interrupt_params { 341 struct dc *dc; 342 struct pipe_ctx *pipe_ctx; 343 }; 344 345 struct tg_setup_vertical_interrupt2_params { 346 struct timing_generator *tg; 347 int start_line; 348 }; 349 350 struct dpp_set_hdr_multiplier_params { 351 struct dpp *dpp; 352 uint32_t hw_mult; 353 }; 354 355 struct program_det_size_params { 356 struct hubbub *hubbub; 357 unsigned int hubp_inst; 358 unsigned int det_buffer_size_kb; 359 }; 360 361 struct program_det_segments_params { 362 struct hubbub *hubbub; 363 unsigned int hubp_inst; 364 unsigned int det_size; 365 }; 366 367 struct update_dchubp_dpp_params { 368 struct dc *dc; 369 struct pipe_ctx *pipe_ctx; 370 struct dc_state *context; 371 }; 372 373 struct opp_set_dyn_expansion_params { 374 struct output_pixel_processor *opp; 375 enum dc_color_space color_space; 376 enum dc_color_depth color_depth; 377 enum signal_type signal; 378 }; 379 380 struct opp_program_fmt_params { 381 struct output_pixel_processor *opp; 382 struct bit_depth_reduction_params *fmt_bit_depth; 383 struct clamping_and_pixel_encoding_params *clamping; 384 }; 385 386 struct opp_program_bit_depth_reduction_params { 387 struct output_pixel_processor *opp; 388 bool use_default_params; 389 struct pipe_ctx *pipe_ctx; 390 }; 391 392 struct opp_set_disp_pattern_generator_params { 393 struct output_pixel_processor *opp; 394 enum controller_dp_test_pattern test_pattern; 395 enum controller_dp_color_space color_space; 396 enum dc_color_depth color_depth; 397 struct tg_color solid_color; 398 bool use_solid_color; 399 int width; 400 int height; 401 int offset; 402 }; 403 404 struct set_abm_pipe_params { 405 struct dc *dc; 406 struct pipe_ctx *pipe_ctx; 407 }; 408 409 struct set_abm_level_params { 410 struct abm *abm; 411 unsigned int abm_level; 412 }; 413 414 struct set_abm_immediate_disable_params { 415 struct dc *dc; 416 struct pipe_ctx *pipe_ctx; 417 }; 418 419 struct set_disp_pattern_generator_params { 420 struct dc *dc; 421 struct pipe_ctx *pipe_ctx; 422 enum controller_dp_test_pattern test_pattern; 423 enum controller_dp_color_space color_space; 424 enum dc_color_depth color_depth; 425 const struct tg_color *solid_color; 426 int width; 427 int height; 428 int offset; 429 }; 430 431 struct mpc_update_blending_params { 432 struct mpc *mpc; 433 struct mpcc_blnd_cfg blnd_cfg; 434 int mpcc_id; 435 }; 436 437 struct mpc_assert_idle_mpcc_params { 438 struct mpc *mpc; 439 int mpcc_id; 440 }; 441 442 struct mpc_insert_plane_params { 443 struct mpc *mpc; 444 struct mpc_tree *mpc_tree_params; 445 struct mpcc_blnd_cfg blnd_cfg; 446 struct mpcc_sm_cfg *sm_cfg; 447 struct mpcc *insert_above_mpcc; 448 int dpp_id; 449 int mpcc_id; 450 }; 451 452 struct mpc_remove_mpcc_params { 453 struct mpc *mpc; 454 struct mpc_tree *mpc_tree_params; 455 struct mpcc *mpcc_to_remove; 456 }; 457 458 struct opp_set_mpcc_disconnect_pending_params { 459 struct output_pixel_processor *opp; 460 int mpcc_inst; 461 bool pending; 462 }; 463 464 struct dc_set_optimized_required_params { 465 struct dc *dc; 466 bool optimized_required; 467 }; 468 469 struct hubp_disconnect_params { 470 struct hubp *hubp; 471 }; 472 473 struct hubbub_force_pstate_change_control_params { 474 struct hubbub *hubbub; 475 bool enable; 476 bool wait; 477 }; 478 479 struct tg_enable_crtc_params { 480 struct timing_generator *tg; 481 }; 482 483 struct hubp_wait_flip_pending_params { 484 struct hubp *hubp; 485 unsigned int timeout_us; 486 unsigned int polling_interval_us; 487 }; 488 489 struct tg_wait_double_buffer_pending_params { 490 struct timing_generator *tg; 491 unsigned int timeout_us; 492 unsigned int polling_interval_us; 493 }; 494 495 struct update_force_pstate_params { 496 struct dc *dc; 497 struct dc_state *context; 498 }; 499 500 struct hubbub_apply_dedcn21_147_wa_params { 501 struct hubbub *hubbub; 502 }; 503 504 struct hubbub_allow_self_refresh_control_params { 505 struct hubbub *hubbub; 506 bool allow; 507 bool *disallow_self_refresh_applied; 508 }; 509 510 struct tg_get_frame_count_params { 511 struct timing_generator *tg; 512 unsigned int *frame_count; 513 }; 514 515 struct mpc_set_dwb_mux_params { 516 struct mpc *mpc; 517 int dwb_id; 518 int mpcc_id; 519 }; 520 521 struct mpc_disable_dwb_mux_params { 522 struct mpc *mpc; 523 unsigned int dwb_id; 524 }; 525 526 struct mcif_wb_config_buf_params { 527 struct mcif_wb *mcif_wb; 528 struct mcif_buf_params *mcif_buf_params; 529 unsigned int dest_height; 530 }; 531 532 struct mcif_wb_config_arb_params { 533 struct mcif_wb *mcif_wb; 534 struct mcif_arb_params *mcif_arb_params; 535 }; 536 537 struct mcif_wb_enable_params { 538 struct mcif_wb *mcif_wb; 539 }; 540 541 struct mcif_wb_disable_params { 542 struct mcif_wb *mcif_wb; 543 }; 544 545 struct dwbc_enable_params { 546 struct dwbc *dwb; 547 struct dc_dwb_params *dwb_params; 548 }; 549 550 struct dwbc_disable_params { 551 struct dwbc *dwb; 552 }; 553 554 struct dwbc_update_params { 555 struct dwbc *dwb; 556 struct dc_dwb_params *dwb_params; 557 }; 558 559 struct hubp_update_mall_sel_params { 560 struct hubp *hubp; 561 uint32_t mall_sel; 562 bool cache_cursor; 563 }; 564 565 struct hubp_prepare_subvp_buffering_params { 566 struct hubp *hubp; 567 bool enable; 568 }; 569 570 struct hubp_set_blank_en_params { 571 struct hubp *hubp; 572 bool enable; 573 }; 574 575 struct hubp_disable_control_params { 576 struct hubp *hubp; 577 bool disable; 578 }; 579 580 struct hubbub_soft_reset_params { 581 struct hubbub *hubbub; 582 void (*hubbub_soft_reset)(struct hubbub *hubbub, bool reset); 583 bool reset; 584 }; 585 586 struct hubbub_perfmon_reset_params { 587 struct hubbub *hubbub; 588 }; 589 590 struct hubbub_perfmon_arm_out_of_order_bw_params { 591 struct hubbub *hubbub; 592 }; 593 594 struct hubbub_perfmon_start_out_of_order_bw_params { 595 struct hubbub *hubbub; 596 }; 597 598 struct hubbub_perfmon_start_in_order_bw_params { 599 struct hubbub *hubbub; 600 }; 601 602 struct hubbub_perfmon_start_memory_latencies_params { 603 struct hubbub *hubbub; 604 }; 605 606 struct hubbub_perfmon_start_urgent_assertion_count_params { 607 struct hubbub *hubbub; 608 }; 609 610 struct hubbub_perfmon_start_urgent_ramp_latency_params { 611 struct hubbub *hubbub; 612 struct hubbub_urgent_latency_params latency_params; 613 }; 614 615 struct hubbub_perfmon_start_prefetch_data_size_params { 616 struct hubbub *hubbub; 617 }; 618 619 struct hubbub_perfmon_get_out_of_order_bw_params { 620 struct hubbub *hubbub; 621 uint32_t refclk_mhz; 622 uint32_t *bandwidth_mbps; 623 uint32_t *duration_ns; 624 }; 625 626 struct hubbub_perfmon_get_in_order_bw_params { 627 struct hubbub *hubbub; 628 uint32_t refclk_mhz; 629 uint32_t min_duration_ns; 630 uint32_t *bandwidth_mbps; 631 uint32_t *duration_ns; 632 }; 633 634 struct hubbub_perfmon_get_memory_latencies_params { 635 struct hubbub *hubbub; 636 uint32_t refclk_mhz; 637 struct dc_probe_latencies *result; 638 }; 639 640 struct hubbub_perfmon_get_urgent_assertion_count_params { 641 struct hubbub *hubbub; 642 uint32_t refclk_mhz; 643 uint32_t *assertion_count; 644 }; 645 646 struct hubbub_perfmon_get_prefetch_data_size_params { 647 struct hubbub *hubbub; 648 uint32_t *prefetch_data_size; 649 }; 650 651 struct hubbub_perfmon_get_urgent_ramp_latency_params { 652 struct hubbub *hubbub; 653 uint32_t refclk_mhz; 654 uint32_t *latency_ns; 655 }; 656 657 struct hubp_clk_cntl_params { 658 struct hubp *hubp; 659 bool enable; 660 }; 661 662 struct hubp_init_params { 663 struct hubp *hubp; 664 }; 665 666 struct hubp_set_vm_system_aperture_settings_params { 667 struct hubp *hubp; 668 //struct vm_system_aperture_param apt; 669 PHYSICAL_ADDRESS_LOC sys_default; 670 PHYSICAL_ADDRESS_LOC sys_low; 671 PHYSICAL_ADDRESS_LOC sys_high; 672 }; 673 674 struct hubp_set_flip_int_params { 675 struct hubp *hubp; 676 }; 677 678 struct dpp_dppclk_control_params { 679 struct dpp *dpp; 680 bool dppclk_div; 681 bool enable; 682 }; 683 684 struct disable_phantom_crtc_params { 685 struct timing_generator *tg; 686 }; 687 688 struct dpp_pg_control_params { 689 struct dce_hwseq *hws; 690 unsigned int dpp_inst; 691 bool power_on; 692 }; 693 694 struct hubp_pg_control_params { 695 struct dce_hwseq *hws; 696 unsigned int hubp_inst; 697 bool power_on; 698 }; 699 700 struct hubp_reset_params { 701 struct hubp *hubp; 702 }; 703 704 struct dpp_reset_params { 705 struct dpp *dpp; 706 }; 707 708 struct dpp_root_clock_control_params { 709 struct dce_hwseq *hws; 710 unsigned int dpp_inst; 711 bool clock_on; 712 }; 713 714 struct dc_ip_request_cntl_params { 715 struct dc *dc; 716 bool enable; 717 }; 718 719 struct dsc_pg_status_params { 720 struct dce_hwseq *hws; 721 int dsc_inst; 722 bool is_ungated; 723 }; 724 725 struct dsc_wait_disconnect_pending_clear_params { 726 struct display_stream_compressor *dsc; 727 bool *is_ungated; 728 }; 729 730 struct dsc_disable_params { 731 struct display_stream_compressor *dsc; 732 bool *is_ungated; 733 }; 734 735 struct dccg_set_ref_dscclk_params { 736 struct dccg *dccg; 737 int dsc_inst; 738 bool *is_ungated; 739 }; 740 741 struct dccg_update_dpp_dto_params { 742 struct dccg *dccg; 743 int dpp_inst; 744 int dppclk_khz; 745 }; 746 747 struct hubp_vtg_sel_params { 748 struct hubp *hubp; 749 uint32_t otg_inst; 750 }; 751 752 struct hubp_setup2_params { 753 struct hubp *hubp; 754 struct dml2_dchub_per_pipe_register_set *hubp_regs; 755 union dml2_global_sync_programming *global_sync; 756 struct dc_crtc_timing *timing; 757 }; 758 759 struct hubp_setup_params { 760 struct hubp *hubp; 761 struct _vcs_dpi_display_dlg_regs_st *dlg_regs; 762 struct _vcs_dpi_display_ttu_regs_st *ttu_regs; 763 struct _vcs_dpi_display_rq_regs_st *rq_regs; 764 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest; 765 }; 766 767 struct hubp_set_unbounded_requesting_params { 768 struct hubp *hubp; 769 bool unbounded_req; 770 }; 771 772 struct hubp_setup_interdependent2_params { 773 struct hubp *hubp; 774 struct dml2_dchub_per_pipe_register_set *hubp_regs; 775 }; 776 777 struct hubp_setup_interdependent_params { 778 struct hubp *hubp; 779 struct _vcs_dpi_display_dlg_regs_st *dlg_regs; 780 struct _vcs_dpi_display_ttu_regs_st *ttu_regs; 781 }; 782 783 struct dpp_set_cursor_matrix_params { 784 struct dpp *dpp; 785 enum dc_color_space color_space; 786 struct dc_csc_transform *cursor_csc_color_matrix; 787 }; 788 789 struct mpc_update_mpcc_params { 790 struct dc *dc; 791 struct pipe_ctx *pipe_ctx; 792 }; 793 794 struct dpp_set_scaler_params { 795 struct dpp *dpp; 796 const struct scaler_data *scl_data; 797 }; 798 799 struct hubp_mem_program_viewport_params { 800 struct hubp *hubp; 801 const struct rect *viewport; 802 const struct rect *viewport_c; 803 }; 804 805 struct hubp_program_mcache_id_and_split_coordinate_params { 806 struct hubp *hubp; 807 struct mcache_regs_struct *mcache_regs; 808 }; 809 810 struct abort_cursor_offload_update_params { 811 struct dc *dc; 812 struct pipe_ctx *pipe_ctx; 813 }; 814 815 struct cursor_lock_params { 816 struct dc *dc; 817 struct pipe_ctx *pipe_ctx; 818 bool lock; 819 }; 820 821 struct setup_periodic_interrupt_params { 822 struct dc *dc; 823 struct pipe_ctx *pipe_ctx; 824 }; 825 826 struct send_cursor_info_to_dmu_params { 827 struct pipe_ctx *pipe_ctx; 828 int pipe_idx; 829 }; 830 831 struct set_cursor_attribute_params { 832 struct dc *dc; 833 struct pipe_ctx *pipe_ctx; 834 }; 835 836 struct hubp_set_cursor_attributes_params { 837 struct hubp *hubp; 838 const struct dc_cursor_attributes *attributes; 839 }; 840 841 struct dpp_set_cursor_attributes_params { 842 struct dpp *dpp; 843 struct dc_cursor_attributes *attributes; 844 }; 845 846 struct set_cursor_position_params { 847 struct dc *dc; 848 struct pipe_ctx *pipe_ctx; 849 }; 850 851 struct set_cursor_sdr_white_level_params { 852 struct dc *dc; 853 struct pipe_ctx *pipe_ctx; 854 }; 855 856 struct program_output_csc_params { 857 struct dc *dc; 858 struct pipe_ctx *pipe_ctx; 859 enum dc_color_space colorspace; 860 uint16_t *matrix; 861 int opp_id; 862 }; 863 864 struct hubp_set_blank_params { 865 struct hubp *hubp; 866 bool blank; 867 }; 868 869 struct phantom_hubp_post_enable_params { 870 struct hubp *hubp; 871 }; 872 873 struct begin_cursor_offload_update_params { 874 struct dc *dc; 875 struct pipe_ctx *pipe_ctx; 876 }; 877 878 struct update_cursor_offload_pipe_params { 879 struct dc *dc; 880 struct pipe_ctx *pipe_ctx; 881 }; 882 883 struct commit_cursor_offload_update_params { 884 struct dc *dc; 885 struct pipe_ctx *pipe_ctx; 886 }; 887 888 struct stream_enc_update_hdmi_info_packets_params { 889 struct pipe_ctx *pipe_ctx; 890 }; 891 892 struct hpo_frl_stream_enc_update_hdmi_info_packets_params { 893 struct pipe_ctx *pipe_ctx; 894 }; 895 896 struct hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params { 897 struct pipe_ctx *pipe_ctx; 898 }; 899 900 struct hpo_dp_stream_enc_update_dp_info_packets_params { 901 struct pipe_ctx *pipe_ctx; 902 }; 903 904 struct stream_enc_update_dp_info_packets_sdp_line_num_params { 905 struct pipe_ctx *pipe_ctx; 906 }; 907 908 struct stream_enc_update_dp_info_packets_params { 909 struct pipe_ctx *pipe_ctx; 910 }; 911 912 struct dsc_set_config_simple_params { 913 struct display_stream_compressor *dsc; 914 struct dsc_config dsc_cfg; 915 struct dsc_optc_config dsc_optc_cfg; 916 }; 917 918 struct stream_enc_dp_set_dsc_config_params { 919 struct stream_encoder *stream_enc; 920 const struct dsc_optc_config *dsc_optc_cfg; 921 }; 922 923 struct hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params { 924 struct hpo_dp_stream_encoder *hpo_dp_stream_enc; 925 bool immediate_update; 926 uint8_t *dsc_packed_pps; 927 bool pps_sdp_stream; 928 }; 929 930 struct stream_enc_dp_set_dsc_pps_info_packet_params { 931 struct stream_encoder *stream_enc; 932 bool immediate_update; 933 uint8_t *dsc_packed_pps; 934 bool pps_sdp_stream; 935 }; 936 937 struct hpo_frl_stream_enc_set_dsc_config_params { 938 struct hpo_frl_stream_encoder *hpo_frl_stream_enc; 939 const struct dc_crtc_timing *timing; 940 uint8_t *dsc_packed_pps; 941 }; 942 943 struct dp_trace_source_sequence_params { 944 struct dc_link *link; 945 enum dpcd_source_sequence source; 946 }; 947 948 struct set_dmdata_attributes_params { 949 struct hubp *hubp; 950 struct dc_dmdata_attributes attr; 951 }; 952 953 struct link_increase_mst_payload_params { 954 struct pipe_ctx *pipe_ctx; 955 uint32_t mst_stream_bw; 956 }; 957 958 struct link_reduce_mst_payload_params { 959 struct pipe_ctx *pipe_ctx; 960 uint32_t mst_stream_bw; 961 }; 962 963 struct dp_set_test_pattern_params { 964 struct dc_link *link; 965 enum dp_test_pattern test_pattern; 966 enum dp_test_pattern_color_space test_pattern_color_space; 967 const struct link_training_settings *p_link_settings; 968 const unsigned char *p_custom_pattern; 969 unsigned int cust_pattern_size; 970 }; 971 972 struct link_set_dpms_off_params { 973 struct pipe_ctx *pipe_ctx; 974 }; 975 976 struct disable_audio_stream_params { 977 struct pipe_ctx *pipe_ctx; 978 }; 979 980 struct clk_mgr_set_max_memclk_params { 981 struct clk_mgr *clk_mgr; 982 unsigned int memclk_mhz; 983 }; 984 985 struct clk_mgr_update_clocks_params { 986 struct clk_mgr *clk_mgr; 987 }; 988 989 struct hubbub_program_watermarks_params { 990 struct dc *dc; 991 struct hubbub *hubbub; 992 union dcn_watermark_set *watermarks; 993 unsigned int refclk_mhz; 994 bool safe_to_lower; 995 }; 996 997 struct hubbub_program_arbiter_params { 998 struct dc *dc; 999 struct hubbub *hubbub; 1000 struct dml2_display_arb_regs *arb_regs; 1001 bool safe_to_lower; 1002 }; 1003 1004 struct hubbub_program_compbuf_segments_params { 1005 struct hubbub *hubbub; 1006 unsigned int compbuf_size; 1007 bool safe_to_lower; 1008 }; 1009 1010 struct prepare_bandwidth_params { 1011 struct dc *dc; 1012 struct dc_state *context; 1013 }; 1014 1015 struct link_set_dpms_on_params { 1016 struct dc_state *state; 1017 struct pipe_ctx *pipe_ctx; 1018 }; 1019 1020 union block_sequence_params { 1021 struct update_plane_addr_params update_plane_addr_params; 1022 struct subvp_pipe_control_lock_fast_params subvp_pipe_control_lock_fast_params; 1023 struct pipe_control_lock_params pipe_control_lock_params; 1024 struct set_flip_control_gsl_params set_flip_control_gsl_params; 1025 struct program_triplebuffer_params program_triplebuffer_params; 1026 struct set_input_transfer_func_params set_input_transfer_func_params; 1027 struct program_gamut_remap_params program_gamut_remap_params; 1028 struct hubp_enable_3dlut_fl_params hubp_enable_3dlut_fl_params; 1029 struct tg_setup_vertical_interrupt0_params tg_setup_vertical_interrupt0_params; 1030 struct update_info_frame_params update_info_frame_params; 1031 struct program_manual_trigger_params program_manual_trigger_params; 1032 struct send_dmcub_cmd_params send_dmcub_cmd_params; 1033 struct setup_dpp_params setup_dpp_params; 1034 struct program_bias_and_scale_params program_bias_and_scale_params; 1035 struct set_output_transfer_func_params set_output_transfer_func_params; 1036 struct program_upsp_params program_upsp_params; 1037 struct update_visual_confirm_params update_visual_confirm_params; 1038 struct power_on_mpc_mem_pwr_params power_on_mpc_mem_pwr_params; 1039 struct set_output_csc_params set_output_csc_params; 1040 struct set_ocsc_default_params set_ocsc_default_params; 1041 struct subvp_save_surf_addr subvp_save_surf_addr; 1042 struct wait_for_dcc_meta_propagation_params wait_for_dcc_meta_propagation_params; 1043 struct dmub_hw_control_lock_fast_params dmub_hw_control_lock_fast_params; 1044 struct program_surface_config_params program_surface_config_params; 1045 struct program_mcache_id_and_split_coordinate program_mcache_id_and_split_coordinate; 1046 struct control_cm_hist_params control_cm_hist_params; 1047 struct program_cursor_update_now_params program_cursor_update_now_params; 1048 struct hubp_wait_pipe_read_start_params hubp_wait_pipe_read_start_params; 1049 struct apply_update_flags_for_phantom_params apply_update_flags_for_phantom_params; 1050 struct update_phantom_vp_position_params update_phantom_vp_position_params; 1051 struct set_odm_combine_params set_odm_combine_params; 1052 struct set_odm_bypass_params set_odm_bypass_params; 1053 struct opp_pipe_clock_control_params opp_pipe_clock_control_params; 1054 struct opp_program_left_edge_extra_pixel_params opp_program_left_edge_extra_pixel_params; 1055 struct dccg_set_dto_dscclk_params dccg_set_dto_dscclk_params; 1056 struct dsc_set_config_params dsc_set_config_params; 1057 struct dsc_enable_params dsc_enable_params; 1058 struct tg_set_dsc_config_params tg_set_dsc_config_params; 1059 struct dsc_disconnect_params dsc_disconnect_params; 1060 struct dsc_read_state_params dsc_read_state_params; 1061 struct dsc_calculate_and_set_config_params dsc_calculate_and_set_config_params; 1062 struct dsc_enable_with_opp_params dsc_enable_with_opp_params; 1063 struct program_tg_params program_tg_params; 1064 struct tg_program_global_sync_params tg_program_global_sync_params; 1065 struct tg_wait_for_state_params tg_wait_for_state_params; 1066 struct tg_set_vtg_params_params tg_set_vtg_params_params; 1067 struct tg_setup_vertical_interrupt2_params tg_setup_vertical_interrupt2_params; 1068 struct dpp_set_hdr_multiplier_params dpp_set_hdr_multiplier_params; 1069 struct tg_set_gsl_params tg_set_gsl_params; 1070 struct tg_set_gsl_source_select_params tg_set_gsl_source_select_params; 1071 struct setup_vupdate_interrupt_params setup_vupdate_interrupt_params; 1072 struct program_det_size_params program_det_size_params; 1073 struct program_det_segments_params program_det_segments_params; 1074 struct update_dchubp_dpp_params update_dchubp_dpp_params; 1075 struct opp_set_dyn_expansion_params opp_set_dyn_expansion_params; 1076 struct opp_program_fmt_params opp_program_fmt_params; 1077 struct opp_program_bit_depth_reduction_params opp_program_bit_depth_reduction_params; 1078 struct opp_set_disp_pattern_generator_params opp_set_disp_pattern_generator_params; 1079 struct set_abm_pipe_params set_abm_pipe_params; 1080 struct set_abm_level_params set_abm_level_params; 1081 struct set_abm_immediate_disable_params set_abm_immediate_disable_params; 1082 struct set_disp_pattern_generator_params set_disp_pattern_generator_params; 1083 struct mpc_remove_mpcc_params mpc_remove_mpcc_params; 1084 struct opp_set_mpcc_disconnect_pending_params opp_set_mpcc_disconnect_pending_params; 1085 struct dc_set_optimized_required_params dc_set_optimized_required_params; 1086 struct hubp_disconnect_params hubp_disconnect_params; 1087 struct hubbub_force_pstate_change_control_params hubbub_force_pstate_change_control_params; 1088 struct tg_enable_crtc_params tg_enable_crtc_params; 1089 struct hubp_wait_flip_pending_params hubp_wait_flip_pending_params; 1090 struct tg_wait_double_buffer_pending_params tg_wait_double_buffer_pending_params; 1091 struct update_force_pstate_params update_force_pstate_params; 1092 struct hubbub_apply_dedcn21_147_wa_params hubbub_apply_dedcn21_147_wa_params; 1093 struct hubbub_allow_self_refresh_control_params hubbub_allow_self_refresh_control_params; 1094 struct tg_get_frame_count_params tg_get_frame_count_params; 1095 struct mpc_set_dwb_mux_params mpc_set_dwb_mux_params; 1096 struct mpc_disable_dwb_mux_params mpc_disable_dwb_mux_params; 1097 struct mcif_wb_config_buf_params mcif_wb_config_buf_params; 1098 struct mcif_wb_config_arb_params mcif_wb_config_arb_params; 1099 struct mcif_wb_enable_params mcif_wb_enable_params; 1100 struct mcif_wb_disable_params mcif_wb_disable_params; 1101 struct dwbc_enable_params dwbc_enable_params; 1102 struct dwbc_disable_params dwbc_disable_params; 1103 struct dwbc_update_params dwbc_update_params; 1104 struct hubp_update_mall_sel_params hubp_update_mall_sel_params; 1105 struct hubp_prepare_subvp_buffering_params hubp_prepare_subvp_buffering_params; 1106 struct hubp_set_blank_en_params hubp_set_blank_en_params; 1107 struct hubp_disable_control_params hubp_disable_control_params; 1108 struct hubbub_soft_reset_params hubbub_soft_reset_params; 1109 struct hubbub_perfmon_reset_params hubbub_perfmon_reset_params; 1110 struct hubbub_perfmon_arm_out_of_order_bw_params hubbub_perfmon_arm_out_of_order_bw_params; 1111 struct hubbub_perfmon_start_out_of_order_bw_params hubbub_perfmon_start_out_of_order_bw_params; 1112 struct hubbub_perfmon_start_in_order_bw_params hubbub_perfmon_start_in_order_bw_params; 1113 struct hubbub_perfmon_start_memory_latencies_params hubbub_perfmon_start_memory_latencies_params; 1114 struct hubbub_perfmon_start_urgent_assertion_count_params hubbub_perfmon_start_urgent_assertion_count_params; 1115 struct hubbub_perfmon_start_urgent_ramp_latency_params hubbub_perfmon_start_urgent_ramp_latency_params; 1116 struct hubbub_perfmon_start_prefetch_data_size_params hubbub_perfmon_start_prefetch_data_size_params; 1117 struct hubbub_perfmon_get_out_of_order_bw_params hubbub_perfmon_get_out_of_order_bw_params; 1118 struct hubbub_perfmon_get_in_order_bw_params hubbub_perfmon_get_in_order_bw_params; 1119 struct hubbub_perfmon_get_memory_latencies_params hubbub_perfmon_get_memory_latencies_params; 1120 struct hubbub_perfmon_get_urgent_assertion_count_params hubbub_perfmon_get_urgent_assertion_count_params; 1121 struct hubbub_perfmon_get_prefetch_data_size_params hubbub_perfmon_get_prefetch_data_size_params; 1122 struct hubbub_perfmon_get_urgent_ramp_latency_params hubbub_perfmon_get_urgent_ramp_latency_params; 1123 struct hubp_clk_cntl_params hubp_clk_cntl_params; 1124 struct hubp_init_params hubp_init_params; 1125 struct hubp_set_vm_system_aperture_settings_params hubp_set_vm_system_aperture_settings_params; 1126 struct hubp_set_flip_int_params hubp_set_flip_int_params; 1127 struct dpp_dppclk_control_params dpp_dppclk_control_params; 1128 struct disable_phantom_crtc_params disable_phantom_crtc_params; 1129 struct dpp_pg_control_params dpp_pg_control_params; 1130 struct hubp_pg_control_params hubp_pg_control_params; 1131 struct hubp_reset_params hubp_reset_params; 1132 struct dpp_reset_params dpp_reset_params; 1133 struct dpp_root_clock_control_params dpp_root_clock_control_params; 1134 struct dc_ip_request_cntl_params dc_ip_request_cntl_params; 1135 struct dsc_pg_status_params dsc_pg_status_params; 1136 struct dsc_wait_disconnect_pending_clear_params dsc_wait_disconnect_pending_clear_params; 1137 struct dsc_disable_params dsc_disable_params; 1138 struct dccg_set_ref_dscclk_params dccg_set_ref_dscclk_params; 1139 struct dccg_update_dpp_dto_params dccg_update_dpp_dto_params; 1140 struct hubp_vtg_sel_params hubp_vtg_sel_params; 1141 struct hubp_setup2_params hubp_setup2_params; 1142 struct hubp_setup_params hubp_setup_params; 1143 struct hubp_set_unbounded_requesting_params hubp_set_unbounded_requesting_params; 1144 struct hubp_setup_interdependent2_params hubp_setup_interdependent2_params; 1145 struct hubp_setup_interdependent_params hubp_setup_interdependent_params; 1146 struct dpp_set_cursor_matrix_params dpp_set_cursor_matrix_params; 1147 struct mpc_update_mpcc_params mpc_update_mpcc_params; 1148 struct mpc_update_blending_params mpc_update_blending_params; 1149 struct mpc_assert_idle_mpcc_params mpc_assert_idle_mpcc_params; 1150 struct mpc_insert_plane_params mpc_insert_plane_params; 1151 struct dpp_set_scaler_params dpp_set_scaler_params; 1152 struct hubp_mem_program_viewport_params hubp_mem_program_viewport_params; 1153 struct abort_cursor_offload_update_params abort_cursor_offload_update_params; 1154 struct cursor_lock_params cursor_lock_params; 1155 struct setup_periodic_interrupt_params setup_periodic_interrupt_params; 1156 struct send_cursor_info_to_dmu_params send_cursor_info_to_dmu_params; 1157 struct set_cursor_attribute_params set_cursor_attribute_params; 1158 struct hubp_set_cursor_attributes_params hubp_set_cursor_attributes_params; 1159 struct dpp_set_cursor_attributes_params dpp_set_cursor_attributes_params; 1160 struct set_cursor_position_params set_cursor_position_params; 1161 struct set_cursor_sdr_white_level_params set_cursor_sdr_white_level_params; 1162 struct program_output_csc_params program_output_csc_params; 1163 struct hubp_set_blank_params hubp_set_blank_params; 1164 struct phantom_hubp_post_enable_params phantom_hubp_post_enable_params; 1165 struct begin_cursor_offload_update_params begin_cursor_offload_update_params; 1166 struct update_cursor_offload_pipe_params update_cursor_offload_pipe_params; 1167 struct commit_cursor_offload_update_params commit_cursor_offload_update_params; 1168 struct stream_enc_update_hdmi_info_packets_params stream_enc_update_hdmi_info_packets_params; 1169 struct hpo_frl_stream_enc_update_hdmi_info_packets_params hpo_frl_stream_enc_update_hdmi_info_packets_params; 1170 struct hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params; 1171 struct hpo_dp_stream_enc_update_dp_info_packets_params hpo_dp_stream_enc_update_dp_info_packets_params; 1172 struct stream_enc_update_dp_info_packets_sdp_line_num_params stream_enc_update_dp_info_packets_sdp_line_num_params; 1173 struct stream_enc_update_dp_info_packets_params stream_enc_update_dp_info_packets_params; 1174 struct dsc_set_config_simple_params dsc_set_config_simple_params; 1175 struct stream_enc_dp_set_dsc_config_params stream_enc_dp_set_dsc_config_params; 1176 struct hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params; 1177 struct stream_enc_dp_set_dsc_pps_info_packet_params stream_enc_dp_set_dsc_pps_info_packet_params; 1178 struct hpo_frl_stream_enc_set_dsc_config_params hpo_frl_stream_enc_set_dsc_config_params; 1179 struct dp_trace_source_sequence_params dp_trace_source_sequence_params; 1180 struct set_dmdata_attributes_params set_dmdata_attributes_params; 1181 struct link_increase_mst_payload_params link_increase_mst_payload_params; 1182 struct link_reduce_mst_payload_params link_reduce_mst_payload_params; 1183 struct dp_set_test_pattern_params dp_set_test_pattern_params; 1184 struct link_set_dpms_off_params link_set_dpms_off_params; 1185 struct disable_audio_stream_params disable_audio_stream_params; 1186 struct prepare_bandwidth_params prepare_bandwidth_params; 1187 struct link_set_dpms_on_params link_set_dpms_on_params; 1188 struct clk_mgr_set_max_memclk_params clk_mgr_set_max_memclk_params; 1189 struct clk_mgr_update_clocks_params clk_mgr_update_clocks_params; 1190 struct hubbub_program_watermarks_params hubbub_program_watermarks_params; 1191 struct hubbub_program_arbiter_params hubbub_program_arbiter_params; 1192 struct hubbub_program_compbuf_segments_params hubbub_program_compbuf_segments_params; 1193 }; 1194 1195 enum block_sequence_func { 1196 DMUB_SUBVP_PIPE_CONTROL_LOCK_FAST = 0, 1197 OPTC_PIPE_CONTROL_LOCK, 1198 HUBP_SET_FLIP_CONTROL_GSL, 1199 HUBP_PROGRAM_TRIPLEBUFFER, 1200 HUBP_UPDATE_PLANE_ADDR, 1201 DPP_SET_INPUT_TRANSFER_FUNC, 1202 DPP_PROGRAM_GAMUT_REMAP, 1203 HUBP_ENABLE_3DLUT_FL, 1204 OTG_SETUP_VERTICAL_INTERRUPT, 1205 HWSS_SETUP_PERIODIC_INTERRUPT, 1206 HWSS_UPDATE_INFO_FRAME, 1207 HUBP_SET_DMDATA_ATTRIBUTES, 1208 OPTC_PROGRAM_MANUAL_TRIGGER, 1209 DMUB_SEND_DMCUB_CMD, 1210 DPP_SETUP_DPP, 1211 DPP_PROGRAM_BIAS_AND_SCALE, 1212 DPP_SET_OUTPUT_TRANSFER_FUNC, 1213 DPP_SET_HDR_MULTIPLIER, 1214 DPP_PROGRAM_UPSP, 1215 MPC_UPDATE_VISUAL_CONFIRM, 1216 MPC_POWER_ON_MPC_MEM_PWR, 1217 MPC_SET_OUTPUT_CSC, 1218 MPC_SET_OCSC_DEFAULT, 1219 DMUB_SUBVP_SAVE_SURF_ADDR, 1220 HUBP_WAIT_FOR_DCC_META_PROP, 1221 DMUB_HW_CONTROL_LOCK_FAST, 1222 HUBP_PROGRAM_SURFACE_CONFIG, 1223 HUBP_PROGRAM_MCACHE_ID, 1224 DPP_PROGRAM_CM_HIST, 1225 PROGRAM_CURSOR_UPDATE_NOW, 1226 HUBP_WAIT_PIPE_READ_START, 1227 HWS_APPLY_UPDATE_FLAGS_FOR_PHANTOM, 1228 HWS_UPDATE_PHANTOM_VP_POSITION, 1229 OPTC_SET_ODM_COMBINE, 1230 OPTC_SET_ODM_BYPASS, 1231 OPP_PIPE_CLOCK_CONTROL, 1232 OPP_PROGRAM_LEFT_EDGE_EXTRA_PIXEL, 1233 DCCG_SET_DTO_DSCCLK, 1234 DSC_SET_CONFIG, 1235 DSC_ENABLE, 1236 TG_SET_DSC_CONFIG, 1237 DSC_DISCONNECT, 1238 DSC_READ_STATE, 1239 DSC_CALCULATE_AND_SET_CONFIG, 1240 DSC_ENABLE_WITH_OPP, 1241 TG_PROGRAM_GLOBAL_SYNC, 1242 TG_WAIT_FOR_STATE, 1243 TG_SET_VTG_PARAMS, 1244 TG_SETUP_VERTICAL_INTERRUPT2, 1245 HUBP_PROGRAM_DET_SIZE, 1246 HUBP_PROGRAM_DET_SEGMENTS, 1247 OPP_SET_DYN_EXPANSION, 1248 OPP_PROGRAM_FMT, 1249 OPP_PROGRAM_BIT_DEPTH_REDUCTION, 1250 OPP_SET_DISP_PATTERN_GENERATOR, 1251 ABM_SET_PIPE, 1252 ABM_SET_LEVEL, 1253 ABM_SET_IMMEDIATE_DISABLE, 1254 MPC_REMOVE_MPCC, 1255 OPP_SET_MPCC_DISCONNECT_PENDING, 1256 DC_SET_OPTIMIZED_REQUIRED, 1257 HUBP_DISCONNECT, 1258 HUBBUB_FORCE_PSTATE_CHANGE_CONTROL, 1259 TG_ENABLE_CRTC, 1260 TG_SET_GSL, 1261 TG_SET_GSL_SOURCE_SELECT, 1262 HUBP_WAIT_FLIP_PENDING, 1263 TG_WAIT_DOUBLE_BUFFER_PENDING, 1264 UPDATE_FORCE_PSTATE, 1265 PROGRAM_MALL_PIPE_CONFIG, 1266 HUBBUB_APPLY_DEDCN21_147_WA, 1267 HUBBUB_ALLOW_SELF_REFRESH_CONTROL, 1268 TG_GET_FRAME_COUNT, 1269 MPC_SET_DWB_MUX, 1270 MPC_DISABLE_DWB_MUX, 1271 MCIF_WB_CONFIG_BUF, 1272 MCIF_WB_CONFIG_ARB, 1273 MCIF_WB_ENABLE, 1274 MCIF_WB_DISABLE, 1275 DWBC_ENABLE, 1276 DWBC_DISABLE, 1277 DWBC_UPDATE, 1278 HUBP_UPDATE_MALL_SEL, 1279 HUBP_PREPARE_SUBVP_BUFFERING, 1280 HUBP_SET_BLANK_EN, 1281 HUBP_DISABLE_CONTROL, 1282 HUBBUB_SOFT_RESET, 1283 HUBP_CLK_CNTL, 1284 HUBP_INIT, 1285 HUBP_SET_VM_SYSTEM_APERTURE_SETTINGS, 1286 HUBP_SET_FLIP_INT, 1287 DPP_DPPCLK_CONTROL, 1288 DISABLE_PHANTOM_CRTC, 1289 DSC_PG_STATUS, 1290 DSC_WAIT_DISCONNECT_PENDING_CLEAR, 1291 DSC_DISABLE, 1292 DCCG_SET_REF_DSCCLK, 1293 DPP_PG_CONTROL, 1294 HUBP_PG_CONTROL, 1295 HUBP_RESET, 1296 DPP_RESET, 1297 DPP_ROOT_CLOCK_CONTROL, 1298 DC_IP_REQUEST_CNTL, 1299 DCCG_UPDATE_DPP_DTO, 1300 HUBP_VTG_SEL, 1301 HUBP_SETUP2, 1302 HUBP_SETUP, 1303 HUBP_SET_UNBOUNDED_REQUESTING, 1304 HUBP_SETUP_INTERDEPENDENT2, 1305 HUBP_SETUP_INTERDEPENDENT, 1306 DPP_SET_CURSOR_MATRIX, 1307 MPC_UPDATE_BLENDING, 1308 MPC_ASSERT_IDLE_MPCC, 1309 MPC_INSERT_PLANE, 1310 DPP_SET_SCALER, 1311 HUBP_MEM_PROGRAM_VIEWPORT, 1312 ABORT_CURSOR_OFFLOAD_UPDATE, 1313 HWSS_CURSOR_LOCK, 1314 HWSS_BEGIN_CURSOR_OFFLOAD_UPDATE, 1315 HWSS_COMMIT_CURSOR_OFFLOAD_UPDATE, 1316 HWSS_UPDATE_CURSOR_OFFLOAD_PIPE, 1317 DC_SEND_CURSOR_INFO_TO_DMU, 1318 SET_CURSOR_ATTRIBUTE, 1319 HUBP_SET_CURSOR_ATTRIBUTES, 1320 DPP_SET_CURSOR_ATTRIBUTES, 1321 SET_CURSOR_POSITION, 1322 SET_CURSOR_SDR_WHITE_LEVEL, 1323 PROGRAM_OUTPUT_CSC, 1324 HUBP_SET_LEGACY_TILING_COMPAT_LEVEL, 1325 HUBP_SET_BLANK, 1326 PHANTOM_HUBP_POST_ENABLE, 1327 STREAM_ENC_UPDATE_HDMI_INFO_PACKETS, 1328 HPO_FRL_STREAM_ENC_UPDATE_HDMI_INFO_PACKETS, 1329 HPO_DP_STREAM_ENC_UPDATE_DP_INFO_PACKETS_SDP_LINE_NUM, 1330 HPO_DP_STREAM_ENC_UPDATE_DP_INFO_PACKETS, 1331 STREAM_ENC_UPDATE_DP_INFO_PACKETS_SDP_LINE_NUM, 1332 STREAM_ENC_UPDATE_DP_INFO_PACKETS, 1333 DSC_SET_CONFIG_SIMPLE, 1334 STREAM_ENC_DP_SET_DSC_CONFIG, 1335 HPO_DP_STREAM_ENC_DP_SET_DSC_PPS_INFO_PACKET, 1336 STREAM_ENC_DP_SET_DSC_PPS_INFO_PACKET, 1337 HPO_FRL_STREAM_ENC_SET_DSC_CONFIG, 1338 LINK_INCREASE_MST_PAYLOAD, 1339 LINK_REDUCE_MST_PAYLOAD, 1340 DP_TRACE_SOURCE_SEQUENCE, 1341 DP_SET_TEST_PATTERN, 1342 LINK_SET_DPMS_OFF, 1343 DISABLE_AUDIO_STREAM, 1344 PREPARE_BANDWIDTH, 1345 LINK_SET_DPMS_ON, 1346 CLK_MGR_SET_MAX_MEMCLK, 1347 CLK_MGR_UPDATE_CLOCKS, 1348 HUBBUB_PROGRAM_WATERMARKS, 1349 HUBBUB_PROGRAM_ARBITER, 1350 HUBBUB_PROGRAM_COMPBUF_SEGMENTS, 1351 HUBBUB_PERFMON_RESET, 1352 HUBBUB_PERFMON_ARM_OUT_OF_ORDER_BW, 1353 HUBBUB_PERFMON_START_OUT_OF_ORDER_BW, 1354 HUBBUB_PERFMON_START_IN_ORDER_BW, 1355 HUBBUB_PERFMON_START_MEMORY_LATENCIES, 1356 HUBBUB_PERFMON_START_URGENT_ASSERTION_COUNT, 1357 HUBBUB_PERFMON_START_URGENT_RAMP_LATENCY, 1358 HUBBUB_PERFMON_START_PREFETCH_DATA_SIZE, 1359 HUBBUB_PERFMON_GET_OUT_OF_ORDER_BW, 1360 HUBBUB_PERFMON_GET_IN_ORDER_BW, 1361 HUBBUB_PERFMON_GET_MEMORY_LATENCIES, 1362 HUBBUB_PERFMON_GET_URGENT_ASSERTION_COUNT, 1363 HUBBUB_PERFMON_GET_PREFETCH_DATA_SIZE, 1364 HUBBUB_PERFMON_GET_URGENT_RAMP_LATENCY, 1365 /* This must be the last value in this enum, add new ones above */ 1366 HWSS_BLOCK_SEQUENCE_FUNC_COUNT 1367 }; 1368 1369 struct block_sequence { 1370 union block_sequence_params params; 1371 enum block_sequence_func func; 1372 }; 1373 1374 struct block_sequence_state { 1375 struct block_sequence *steps; 1376 unsigned int *num_steps; 1377 }; 1378 1379 #define MAX_HWSS_BLOCK_SEQUENCE_SIZE (HWSS_BLOCK_SEQUENCE_FUNC_COUNT * MAX_PIPES) 1380 1381 struct hw_sequencer_funcs { 1382 void (*hardware_release)(struct dc *dc); 1383 /* Embedded Display Related */ 1384 void (*edp_power_control)(struct dc_link *link, bool enable); 1385 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 1386 void (*edp_wait_for_T12)(struct dc_link *link); 1387 1388 /* Pipe Programming Related */ 1389 void (*init_hw)(struct dc *dc); 1390 void (*power_down_on_boot)(struct dc *dc); 1391 void (*enable_accelerated_mode)(struct dc *dc, 1392 struct dc_state *context); 1393 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 1394 struct dc_state *context); 1395 void (*disable_plane)(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx); 1396 void (*disable_plane_sequence)(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx, 1397 struct block_sequence_state *seq_state); 1398 void (*disable_pixel_data)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank); 1399 void (*apply_ctx_for_surface)(struct dc *dc, 1400 const struct dc_stream_state *stream, 1401 int num_planes, struct dc_state *context); 1402 void (*program_front_end_for_ctx)(struct dc *dc, 1403 struct dc_state *context); 1404 void (*wait_for_pending_cleared)(struct dc *dc, 1405 struct dc_state *context); 1406 void (*post_unlock_program_front_end)(struct dc *dc, 1407 struct dc_state *context); 1408 void (*update_plane_addr)(const struct dc *dc, 1409 struct pipe_ctx *pipe_ctx); 1410 void (*update_dchub)(struct dce_hwseq *hws, 1411 struct dchub_init_data *dh_data); 1412 void (*wait_for_mpcc_disconnect)(struct dc *dc, 1413 struct resource_pool *res_pool, 1414 struct pipe_ctx *pipe_ctx); 1415 void (*wait_for_mpcc_disconnect_sequence)(struct dc *dc, 1416 struct resource_pool *res_pool, 1417 struct pipe_ctx *pipe_ctx, 1418 struct block_sequence_state *seq_state); 1419 void (*edp_backlight_control)( 1420 struct dc_link *link, 1421 bool enable); 1422 void (*program_triplebuffer)(const struct dc *dc, 1423 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 1424 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 1425 void (*update_dsc_pg)(struct dc *dc, struct dc_state *context, bool safe_to_disable); 1426 void (*clear_surface_dcc_and_tiling)(struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state, bool clear_tiling); 1427 1428 /* Pipe Lock Related */ 1429 void (*pipe_control_lock)(struct dc *dc, 1430 struct pipe_ctx *pipe, bool lock); 1431 void (*interdependent_update_lock)(struct dc *dc, 1432 struct dc_state *context, bool lock); 1433 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 1434 bool flip_immediate); 1435 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock); 1436 1437 /* Timing Related */ 1438 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 1439 struct crtc_position *position); 1440 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 1441 void (*calc_vupdate_position)( 1442 struct dc *dc, 1443 struct pipe_ctx *pipe_ctx, 1444 uint32_t *start_line, 1445 uint32_t *end_line); 1446 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 1447 int group_size, struct pipe_ctx *grouped_pipes[]); 1448 void (*enable_timing_synchronization)(struct dc *dc, 1449 struct dc_state *state, 1450 int group_index, int group_size, 1451 struct pipe_ctx *grouped_pipes[]); 1452 void (*enable_vblanks_synchronization)(struct dc *dc, 1453 int group_index, int group_size, 1454 struct pipe_ctx *grouped_pipes[]); 1455 void (*setup_periodic_interrupt)(struct dc *dc, 1456 struct pipe_ctx *pipe_ctx); 1457 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 1458 struct dc_crtc_timing_adjust adjust); 1459 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 1460 int num_pipes, 1461 const struct dc_static_screen_params *events); 1462 1463 /* Stream Related */ 1464 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 1465 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 1466 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 1467 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 1468 struct dc_link_settings *link_settings); 1469 1470 /* Bandwidth Related */ 1471 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 1472 void (*prepare_bandwidth_sequence)(struct dc *dc, 1473 struct dc_state *context, 1474 struct block_sequence_state *seq_state); 1475 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 1476 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 1477 void (*optimize_bandwidth_sequence)(struct dc *dc, 1478 struct dc_state *context, 1479 struct block_sequence_state *seq_state); 1480 1481 /* Infopacket Related */ 1482 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 1483 void (*send_immediate_sdp_message)( 1484 struct pipe_ctx *pipe_ctx, 1485 const uint8_t *custom_sdp_message, 1486 unsigned int sdp_message_size); 1487 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 1488 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 1489 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 1490 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 1491 1492 /* Cursor Related */ 1493 void (*set_cursor_position)(struct pipe_ctx *pipe); 1494 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 1495 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 1496 void (*abort_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe); 1497 void (*begin_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe); 1498 void (*commit_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe); 1499 void (*update_cursor_offload_pipe)(struct dc *dc, const struct pipe_ctx *pipe); 1500 void (*notify_cursor_offload_drr_update)(struct dc *dc, struct dc_state *context, 1501 const struct dc_stream_state *stream); 1502 void (*program_cursor_offload_now)(struct dc *dc, const struct pipe_ctx *pipe); 1503 1504 /* Colour Related */ 1505 void (*program_gamut_remap)(struct program_gamut_remap_params *params); 1506 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 1507 enum dc_color_space colorspace, 1508 uint16_t *matrix, int opp_id); 1509 void (*trigger_3dlut_dma_load)(struct pipe_ctx *pipe_ctx); 1510 1511 /* VM Related */ 1512 int (*init_sys_ctx)(struct dce_hwseq *hws, 1513 struct dc *dc, 1514 struct dc_phy_addr_space_config *pa_config); 1515 void (*init_vm_ctx)(struct dce_hwseq *hws, 1516 struct dc *dc, 1517 struct dc_virtual_addr_space_config *va_config, 1518 int vmid); 1519 1520 /* Writeback Related */ 1521 void (*update_writeback)(struct dc *dc, 1522 struct dc_writeback_info *wb_info, 1523 struct dc_state *context); 1524 void (*enable_writeback)(struct dc *dc, 1525 struct dc_writeback_info *wb_info, 1526 struct dc_state *context); 1527 void (*disable_writeback)(struct dc *dc, 1528 unsigned int dwb_pipe_inst); 1529 1530 /* Clock Related */ 1531 enum dc_status (*set_clock)(struct dc *dc, 1532 enum dc_clock_type clock_type, 1533 uint32_t clk_khz, uint32_t stepping); 1534 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 1535 struct dc_clock_config *clock_cfg); 1536 void (*optimize_pwr_state)(const struct dc *dc, 1537 struct dc_state *context); 1538 void (*exit_optimized_pwr_state)(const struct dc *dc, 1539 struct dc_state *context); 1540 void (*calculate_pix_rate_divider)(struct dc *dc, 1541 struct dc_state *context, 1542 const struct dc_stream_state *stream); 1543 1544 /* Audio Related */ 1545 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 1546 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 1547 1548 /* Stereo 3D Related */ 1549 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 1550 1551 /* HW State Logging Related */ 1552 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 1553 void (*log_color_state)(struct dc *dc, 1554 struct dc_log_buffer_ctx *log_ctx); 1555 void (*get_hw_state)(struct dc *dc, char *pBuf, 1556 unsigned int bufSize, unsigned int mask); 1557 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 1558 1559 bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx, 1560 struct set_backlight_level_params *params); 1561 1562 void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx); 1563 1564 void (*set_pipe)(struct pipe_ctx *pipe_ctx); 1565 1566 void (*enable_dp_link_output)(struct dc_link *link, 1567 const struct link_resource *link_res, 1568 enum signal_type signal, 1569 enum clock_source_id clock_source, 1570 const struct dc_link_settings *link_settings); 1571 void (*enable_tmds_link_output)(struct dc_link *link, 1572 const struct link_resource *link_res, 1573 enum signal_type signal, 1574 enum clock_source_id clock_source, 1575 enum dc_color_depth color_depth, 1576 uint32_t pixel_clock); 1577 void (*enable_lvds_link_output)(struct dc_link *link, 1578 const struct link_resource *link_res, 1579 enum clock_source_id clock_source, 1580 uint32_t pixel_clock); 1581 void (*enable_analog_link_output)(struct dc_link *link, 1582 uint32_t pixel_clock); 1583 void (*disable_link_output)(struct dc_link *link, 1584 const struct link_resource *link_res, 1585 enum signal_type signal); 1586 bool (*dac_load_detect)(struct dc_link *link); 1587 void (*prepare_ddc)(struct dc_link *link); 1588 1589 void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits); 1590 1591 enum dc_status (*setup_hdmi_frl_link)( 1592 struct dc_link *link, 1593 int hpo_inst, 1594 enum clock_source_id frl_phy_clock_source_id); 1595 1596 unsigned int (*get_max_dispclk_mhz)(struct dc *dc, 1597 struct dc_state *context); 1598 1599 /* Idle Optimization Related */ 1600 bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable); 1601 1602 bool (*does_plane_fit_in_mall)(struct dc *dc, 1603 unsigned int pitch, 1604 unsigned int height, 1605 enum surface_pixel_format format, 1606 struct dc_cursor_attributes *cursor_attr); 1607 void (*commit_subvp_config)(struct dc *dc, struct dc_state *context); 1608 void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context); 1609 void (*disable_phantom_streams)(struct dc *dc, struct dc_state *context); 1610 void (*subvp_pipe_control_lock)(struct dc *dc, 1611 struct dc_state *context, 1612 bool lock, 1613 bool should_lock_all_pipes, 1614 struct pipe_ctx *top_pipe_to_program, 1615 bool subvp_prev_use); 1616 void (*subvp_pipe_control_lock_fast)(union block_sequence_params *params); 1617 1618 void (*z10_restore)(const struct dc *dc); 1619 void (*z10_save_init)(struct dc *dc); 1620 bool (*is_abm_supported)(struct dc *dc, 1621 struct dc_state *context, struct dc_stream_state *stream); 1622 1623 void (*set_disp_pattern_generator)(const struct dc *dc, 1624 struct pipe_ctx *pipe_ctx, 1625 enum controller_dp_test_pattern test_pattern, 1626 enum controller_dp_color_space color_space, 1627 enum dc_color_depth color_depth, 1628 const struct tg_color *solid_color, 1629 int width, int height, int offset); 1630 void (*blank_phantom)(struct dc *dc, 1631 struct timing_generator *tg, 1632 int width, 1633 int height); 1634 void (*update_visual_confirm_color)(struct dc *dc, 1635 struct pipe_ctx *pipe_ctx, 1636 int mpcc_id); 1637 void (*update_phantom_vp_position)(struct dc *dc, 1638 struct dc_state *context, 1639 struct pipe_ctx *phantom_pipe); 1640 void (*apply_update_flags_for_phantom)(struct pipe_ctx *phantom_pipe); 1641 1642 void (*calc_blocks_to_gate)(struct dc *dc, struct dc_state *context, 1643 struct pg_block_update *update_state); 1644 void (*calc_blocks_to_ungate)(struct dc *dc, struct dc_state *context, 1645 struct pg_block_update *update_state); 1646 void (*hw_block_power_up)(struct dc *dc, 1647 struct pg_block_update *update_state); 1648 void (*hw_block_power_down)(struct dc *dc, 1649 struct pg_block_update *update_state); 1650 void (*root_clock_control)(struct dc *dc, 1651 struct pg_block_update *update_state, bool power_on); 1652 bool (*is_pipe_topology_transition_seamless)(struct dc *dc, 1653 const struct dc_state *cur_ctx, 1654 const struct dc_state *new_ctx); 1655 void (*wait_for_dcc_meta_propagation)(const struct dc *dc, 1656 const struct pipe_ctx *top_pipe_to_program); 1657 void (*dmub_hw_control_lock)(struct dc *dc, 1658 struct dc_state *context, 1659 bool lock); 1660 void (*fams2_update_config)(struct dc *dc, 1661 struct dc_state *context, 1662 bool enable); 1663 void (*dmub_hw_control_lock_fast)(union block_sequence_params *params); 1664 void (*set_long_vtotal)(struct pipe_ctx **pipe_ctx, int num_pipes, uint32_t v_total_min, uint32_t v_total_max); 1665 void (*program_outstanding_updates)(struct dc *dc, 1666 struct dc_state *context); 1667 void (*setup_hpo_hw_control)(const struct dce_hwseq *hws, bool enable); 1668 void (*wait_for_all_pending_updates)(const struct pipe_ctx *pipe_ctx); 1669 void (*detect_pipe_changes)(struct dc_state *old_state, 1670 struct dc_state *new_state, 1671 struct pipe_ctx *old_pipe, 1672 struct pipe_ctx *new_pipe); 1673 void (*enable_plane)(struct dc *dc, 1674 struct pipe_ctx *pipe_ctx, 1675 struct dc_state *context); 1676 void (*enable_plane_sequence)(struct dc *dc, 1677 struct pipe_ctx *pipe_ctx, 1678 struct dc_state *context, 1679 struct block_sequence_state *seq_state); 1680 void (*update_dchubp_dpp)(struct dc *dc, 1681 struct pipe_ctx *pipe_ctx, 1682 struct dc_state *context); 1683 void (*update_dchubp_dpp_sequence)(struct dc *dc, 1684 struct pipe_ctx *pipe_ctx, 1685 struct dc_state *context, 1686 struct block_sequence_state *seq_state); 1687 void (*post_unlock_reset_opp)(struct dc *dc, 1688 struct pipe_ctx *opp_head); 1689 void (*post_unlock_reset_opp_sequence)( 1690 struct dc *dc, 1691 struct pipe_ctx *opp_head, 1692 struct block_sequence_state *seq_state); 1693 void (*get_underflow_debug_data)(const struct dc *dc, 1694 struct timing_generator *tg, 1695 struct dc_underflow_debug_data *out_data); 1696 1697 /** 1698 * program_perfmon - Program/transition perfmon probes for a commit. 1699 * @dc: DC structure 1700 * @context: target state; probes, probe_count, and probe_status are 1701 * read from and written to this object 1702 * 1703 * Invoked during the execute phase of dc_update_state. The hook resolves 1704 * each probe's transition by diffing @context against dc->current_state 1705 * and latches MEASURED results into @context->probe_status. 1706 */ 1707 void (*program_perfmon)(struct dc *dc, struct dc_state *context); 1708 1709 }; 1710 1711 void color_space_to_black_color( 1712 const struct dc *dc, 1713 enum dc_color_space colorspace, 1714 struct tg_color *black_color); 1715 1716 bool hwss_wait_for_blank_complete( 1717 struct timing_generator *tg); 1718 1719 const uint16_t *find_color_matrix( 1720 enum dc_color_space color_space, 1721 uint32_t *array_size); 1722 1723 void get_surface_tile_visual_confirm_color( 1724 struct pipe_ctx *pipe_ctx, 1725 struct tg_color *color); 1726 void get_surface_visual_confirm_color( 1727 const struct pipe_ctx *pipe_ctx, 1728 struct tg_color *color); 1729 1730 void get_hdr_visual_confirm_color( 1731 struct pipe_ctx *pipe_ctx, 1732 struct tg_color *color); 1733 void get_mpctree_visual_confirm_color( 1734 struct pipe_ctx *pipe_ctx, 1735 struct tg_color *color); 1736 void get_smartmux_visual_confirm_color( 1737 struct dc *dc, 1738 struct tg_color *color); 1739 void get_vabc_visual_confirm_color( 1740 struct pipe_ctx *pipe_ctx, 1741 struct tg_color *color); 1742 void get_subvp_visual_confirm_color( 1743 struct pipe_ctx *pipe_ctx, 1744 struct tg_color *color); 1745 void get_fams2_visual_confirm_color( 1746 struct dc *dc, 1747 struct dc_state *context, 1748 struct pipe_ctx *pipe_ctx, 1749 struct tg_color *color); 1750 1751 void get_mclk_switch_visual_confirm_color( 1752 struct pipe_ctx *pipe_ctx, 1753 struct tg_color *color); 1754 1755 void get_cursor_visual_confirm_color( 1756 struct pipe_ctx *pipe_ctx, 1757 struct tg_color *color); 1758 1759 void get_dcc_visual_confirm_color( 1760 struct dc *dc, 1761 struct pipe_ctx *pipe_ctx, 1762 struct tg_color *color); 1763 1764 void get_refresh_rate_confirm_color( 1765 struct pipe_ctx *pipe_ctx, 1766 struct tg_color *color); 1767 1768 void set_p_state_switch_method( 1769 struct dc *dc, 1770 struct dc_state *context, 1771 struct pipe_ctx *pipe_ctx); 1772 1773 void set_drr_and_clear_adjust_pending( 1774 struct pipe_ctx *pipe_ctx, 1775 struct dc_stream_state *stream, 1776 struct drr_params *params); 1777 1778 void hwss_execute_sequence(struct dc *dc, 1779 struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE], 1780 int num_steps); 1781 1782 void hwss_build_fast_sequence(struct dc *dc, 1783 struct dc_dmub_cmd *dc_dmub_cmd, 1784 unsigned int dmub_cmd_count, 1785 struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE], 1786 unsigned int *num_steps, 1787 struct pipe_ctx *pipe_ctx, 1788 struct dc_stream_status *stream_status, 1789 struct dc_state *context); 1790 1791 void hwss_build_full_sequence(struct dc *dc, 1792 struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE], 1793 unsigned int *num_steps, 1794 struct dc_state *context, bool program_phantom_pipe); 1795 1796 void hwss_build_post_unlock_full_sequence(struct dc *dc, 1797 struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE], 1798 unsigned int *num_steps, 1799 struct dc_state *context); 1800 1801 void hwss_wait_for_all_blank_complete(struct dc *dc, 1802 struct dc_state *context); 1803 1804 void hwss_wait_for_odm_update_pending_complete(struct dc *dc, 1805 struct dc_state *context); 1806 1807 void hwss_wait_for_no_pipes_pending(struct dc *dc, 1808 struct dc_state *context); 1809 1810 void hwss_wait_for_outstanding_hw_updates(struct dc *dc, 1811 struct dc_state *dc_context); 1812 1813 void hwss_process_outstanding_hw_updates(struct dc *dc, 1814 struct dc_state *dc_context); 1815 1816 void hwss_send_dmcub_cmd(union block_sequence_params *params); 1817 1818 void hwss_program_manual_trigger(union block_sequence_params *params); 1819 1820 void hwss_setup_dpp(union block_sequence_params *params); 1821 1822 void hwss_program_bias_and_scale(union block_sequence_params *params); 1823 1824 void hwss_program_upsp(union block_sequence_params *params); 1825 1826 void hwss_power_on_mpc_mem_pwr(union block_sequence_params *params); 1827 1828 void hwss_set_output_csc(union block_sequence_params *params); 1829 1830 void hwss_set_ocsc_default(union block_sequence_params *params); 1831 1832 void hwss_subvp_save_surf_addr(union block_sequence_params *params); 1833 1834 void hwss_program_surface_config(union block_sequence_params *params); 1835 1836 void hwss_program_mcache_id_and_split_coordinate(union block_sequence_params *params); 1837 1838 void hwss_program_cm_hist(union block_sequence_params *params); 1839 1840 void hwss_set_odm_combine(union block_sequence_params *params); 1841 1842 void hwss_set_odm_bypass(union block_sequence_params *params); 1843 1844 void hwss_opp_pipe_clock_control(union block_sequence_params *params); 1845 1846 void hwss_opp_program_left_edge_extra_pixel(union block_sequence_params *params); 1847 1848 void hwss_blank_pixel_data(union block_sequence_params *params); 1849 1850 void hwss_dccg_set_dto_dscclk(union block_sequence_params *params); 1851 1852 void hwss_dsc_set_config(union block_sequence_params *params); 1853 1854 void hwss_dsc_enable(union block_sequence_params *params); 1855 1856 void hwss_tg_set_dsc_config(union block_sequence_params *params); 1857 1858 void hwss_dsc_disconnect(union block_sequence_params *params); 1859 1860 void hwss_dsc_read_state(union block_sequence_params *params); 1861 1862 void hwss_dsc_calculate_and_set_config(union block_sequence_params *params); 1863 1864 void hwss_dsc_enable_with_opp(union block_sequence_params *params); 1865 1866 void hwss_dsc_set_config_simple(union block_sequence_params *params); 1867 1868 void hwss_stream_enc_update_hdmi_info_packets(union block_sequence_params *params); 1869 1870 void hwss_hpo_frl_stream_enc_update_hdmi_info_packets(union block_sequence_params *params); 1871 1872 void hwss_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num(union block_sequence_params *params); 1873 1874 void hwss_hpo_dp_stream_enc_update_dp_info_packets(union block_sequence_params *params); 1875 1876 void hwss_stream_enc_update_dp_info_packets_sdp_line_num(union block_sequence_params *params); 1877 1878 void hwss_stream_enc_update_dp_info_packets(union block_sequence_params *params); 1879 1880 void hwss_stream_enc_dp_set_dsc_config(union block_sequence_params *params); 1881 1882 void hwss_hpo_dp_stream_enc_dp_set_dsc_pps_info_packet(union block_sequence_params *params); 1883 1884 void hwss_stream_enc_dp_set_dsc_pps_info_packet(union block_sequence_params *params); 1885 1886 void hwss_hpo_frl_stream_enc_set_dsc_config(union block_sequence_params *params); 1887 1888 void hwss_set_dmdata_attributes(union block_sequence_params *params); 1889 1890 void hwss_dp_trace_source_sequence(union block_sequence_params *params); 1891 1892 void hwss_link_increase_mst_payload(union block_sequence_params *params); 1893 1894 void hwss_link_reduce_mst_payload(union block_sequence_params *params); 1895 1896 void hwss_dp_set_test_pattern(union block_sequence_params *params); 1897 1898 void hwss_link_set_dpms_off(union block_sequence_params *params); 1899 1900 void hwss_prepare_bandwidth(struct dc *dc, union block_sequence_params *params); 1901 1902 void hwss_link_set_dpms_on(union block_sequence_params *params); 1903 1904 void hwss_program_tg(union block_sequence_params *params); 1905 1906 void hwss_tg_program_global_sync(union block_sequence_params *params); 1907 1908 void hwss_tg_wait_for_state(union block_sequence_params *params); 1909 1910 void hwss_tg_set_vtg_params(union block_sequence_params *params); 1911 1912 void hwss_hubp_enable_3dlut_fl(union block_sequence_params *params); 1913 1914 void hwss_update_info_frame(struct dc *dc, union block_sequence_params *params); 1915 1916 void hwss_tg_setup_vertical_interrupt0(union block_sequence_params *params); 1917 1918 void hwss_tg_setup_vertical_interrupt2(union block_sequence_params *params); 1919 1920 void hwss_dpp_set_hdr_multiplier(union block_sequence_params *params); 1921 1922 void hwss_program_det_size(union block_sequence_params *params); 1923 1924 void hwss_program_det_segments(union block_sequence_params *params); 1925 1926 void hwss_opp_set_dyn_expansion(union block_sequence_params *params); 1927 1928 void hwss_opp_program_fmt(union block_sequence_params *params); 1929 1930 void hwss_opp_program_bit_depth_reduction(union block_sequence_params *params); 1931 1932 void hwss_opp_set_disp_pattern_generator(union block_sequence_params *params); 1933 1934 void hwss_set_abm_pipe(union block_sequence_params *params); 1935 1936 void hwss_set_abm_level(union block_sequence_params *params); 1937 1938 void hwss_set_abm_immediate_disable(union block_sequence_params *params); 1939 1940 void hwss_mpc_remove_mpcc(union block_sequence_params *params); 1941 1942 void hwss_opp_set_mpcc_disconnect_pending(union block_sequence_params *params); 1943 1944 void hwss_dc_set_optimized_required(union block_sequence_params *params); 1945 1946 void hwss_hubp_disconnect(union block_sequence_params *params); 1947 1948 void hwss_hubbub_force_pstate_change_control(union block_sequence_params *params); 1949 1950 void hwss_tg_enable_crtc(union block_sequence_params *params); 1951 1952 void hwss_tg_set_gsl(union block_sequence_params *params); 1953 1954 void hwss_tg_set_gsl_source_select(union block_sequence_params *params); 1955 1956 void hwss_hubp_wait_flip_pending(union block_sequence_params *params); 1957 1958 void hwss_tg_wait_double_buffer_pending(union block_sequence_params *params); 1959 1960 void hwss_update_force_pstate(union block_sequence_params *params); 1961 1962 void hwss_hubbub_apply_dedcn21_147_wa(union block_sequence_params *params); 1963 1964 void hwss_hubbub_allow_self_refresh_control(union block_sequence_params *params); 1965 1966 void hwss_tg_get_frame_count(union block_sequence_params *params); 1967 1968 void hwss_mpc_set_dwb_mux(union block_sequence_params *params); 1969 1970 void hwss_mpc_disable_dwb_mux(union block_sequence_params *params); 1971 1972 void hwss_mcif_wb_config_buf(union block_sequence_params *params); 1973 1974 void hwss_mcif_wb_config_arb(union block_sequence_params *params); 1975 1976 void hwss_mcif_wb_enable(union block_sequence_params *params); 1977 1978 void hwss_mcif_wb_disable(union block_sequence_params *params); 1979 1980 void hwss_dwbc_enable(union block_sequence_params *params); 1981 1982 void hwss_dwbc_disable(union block_sequence_params *params); 1983 1984 void hwss_dwbc_update(union block_sequence_params *params); 1985 1986 void hwss_hubp_update_mall_sel(union block_sequence_params *params); 1987 1988 void hwss_hubp_prepare_subvp_buffering(union block_sequence_params *params); 1989 1990 void hwss_hubp_set_blank_en(union block_sequence_params *params); 1991 1992 void hwss_hubp_disable_control(union block_sequence_params *params); 1993 1994 void hwss_hubbub_soft_reset(union block_sequence_params *params); 1995 1996 void hwss_hubbub_perfmon_reset(union block_sequence_params *params); 1997 1998 void hwss_hubbub_perfmon_arm_out_of_order_bw(union block_sequence_params *params); 1999 2000 void hwss_hubbub_perfmon_start_out_of_order_bw(union block_sequence_params *params); 2001 2002 void hwss_hubbub_perfmon_start_in_order_bw(union block_sequence_params *params); 2003 2004 void hwss_hubbub_perfmon_start_memory_latencies(union block_sequence_params *params); 2005 2006 void hwss_hubbub_perfmon_start_urgent_assertion_count(union block_sequence_params *params); 2007 2008 void hwss_hubbub_perfmon_start_urgent_ramp_latency(union block_sequence_params *params); 2009 2010 void hwss_hubbub_perfmon_start_prefetch_data_size(union block_sequence_params *params); 2011 2012 void hwss_hubbub_perfmon_get_out_of_order_bw(union block_sequence_params *params); 2013 2014 void hwss_hubbub_perfmon_get_in_order_bw(union block_sequence_params *params); 2015 2016 void hwss_hubbub_perfmon_get_memory_latencies(union block_sequence_params *params); 2017 2018 void hwss_hubbub_perfmon_get_urgent_assertion_count(union block_sequence_params *params); 2019 2020 void hwss_hubbub_perfmon_get_prefetch_data_size(union block_sequence_params *params); 2021 2022 void hwss_hubbub_perfmon_get_urgent_ramp_latency(union block_sequence_params *params); 2023 2024 void hwss_hubp_clk_cntl(union block_sequence_params *params); 2025 2026 void hwss_hubp_init(union block_sequence_params *params); 2027 2028 void hwss_hubp_set_vm_system_aperture_settings(union block_sequence_params *params); 2029 2030 void hwss_hubp_set_flip_int(union block_sequence_params *params); 2031 2032 void hwss_dpp_dppclk_control(union block_sequence_params *params); 2033 2034 void hwss_disable_phantom_crtc(union block_sequence_params *params); 2035 2036 void hwss_dsc_pg_status(union block_sequence_params *params); 2037 2038 void hwss_dsc_wait_disconnect_pending_clear(union block_sequence_params *params); 2039 2040 void hwss_dsc_disable(union block_sequence_params *params); 2041 2042 void hwss_dccg_set_ref_dscclk(union block_sequence_params *params); 2043 2044 void hwss_dpp_pg_control(union block_sequence_params *params); 2045 2046 void hwss_hubp_pg_control(union block_sequence_params *params); 2047 2048 void hwss_hubp_reset(union block_sequence_params *params); 2049 2050 void hwss_dpp_reset(union block_sequence_params *params); 2051 2052 void hwss_dpp_root_clock_control(union block_sequence_params *params); 2053 2054 void hwss_dc_ip_request_cntl(union block_sequence_params *params); 2055 2056 void hwss_dccg_update_dpp_dto(union block_sequence_params *params); 2057 2058 void hwss_hubp_vtg_sel(union block_sequence_params *params); 2059 2060 void hwss_hubp_setup2(union block_sequence_params *params); 2061 2062 void hwss_hubp_setup(union block_sequence_params *params); 2063 2064 void hwss_hubp_set_unbounded_requesting(union block_sequence_params *params); 2065 2066 void hwss_hubp_setup_interdependent2(union block_sequence_params *params); 2067 2068 void hwss_hubp_setup_interdependent(union block_sequence_params *params); 2069 2070 void hwss_dpp_set_cursor_matrix(union block_sequence_params *params); 2071 2072 void hwss_mpc_update_mpcc(union block_sequence_params *params); 2073 2074 void hwss_mpc_update_blending(union block_sequence_params *params); 2075 2076 void hwss_mpc_assert_idle_mpcc(union block_sequence_params *params); 2077 2078 void hwss_mpc_insert_plane(union block_sequence_params *params); 2079 2080 void hwss_dpp_set_scaler(union block_sequence_params *params); 2081 2082 void hwss_hubp_mem_program_viewport(union block_sequence_params *params); 2083 2084 void hwss_abort_cursor_offload_update(union block_sequence_params *params); 2085 2086 void hwss_send_cursor_info_to_dmu(union block_sequence_params *params); 2087 2088 void hwss_set_cursor_attribute(union block_sequence_params *params); 2089 2090 void hwss_hubp_set_cursor_attributes(union block_sequence_params *params); 2091 2092 void hwss_dpp_set_cursor_attributes(union block_sequence_params *params); 2093 2094 void hwss_set_cursor_position(union block_sequence_params *params); 2095 2096 void hwss_set_cursor_sdr_white_level(union block_sequence_params *params); 2097 2098 void hwss_program_gamut_remap(struct pipe_ctx *pipe_ctx); 2099 2100 void hwss_program_output_csc(union block_sequence_params *params); 2101 2102 void hwss_hubp_set_legacy_tiling_compat_level(union block_sequence_params *params); 2103 2104 void hwss_hubp_set_blank(union block_sequence_params *params); 2105 2106 void hwss_phantom_hubp_post_enable(union block_sequence_params *params); 2107 2108 void hwss_cursor_lock(union block_sequence_params *params); 2109 2110 void hwss_begin_cursor_offload_update(union block_sequence_params *params); 2111 2112 void hwss_commit_cursor_offload_update(union block_sequence_params *params); 2113 2114 void hwss_update_cursor_offload_pipe(union block_sequence_params *params); 2115 2116 void hwss_setup_periodic_interrupt(struct dc *dc, union block_sequence_params *params); 2117 2118 void hwss_disable_audio_stream(struct dc *dc, union block_sequence_params *params); 2119 2120 void hwss_add_optc_pipe_control_lock(struct block_sequence_state *seq_state, 2121 struct dc *dc, struct pipe_ctx *pipe_ctx, bool lock); 2122 2123 void hwss_add_hubp_set_flip_control_gsl(struct block_sequence_state *seq_state, 2124 struct hubp *hubp, bool flip_immediate); 2125 2126 void hwss_add_hubp_program_triplebuffer(struct block_sequence_state *seq_state, 2127 struct dc *dc, struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 2128 2129 void hwss_add_hubp_update_plane_addr(struct block_sequence_state *seq_state, 2130 struct dc *dc, struct pipe_ctx *pipe_ctx); 2131 2132 void hwss_add_dpp_set_input_transfer_func(struct block_sequence_state *seq_state, 2133 struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state); 2134 2135 void hwss_add_dpp_program_gamut_remap(struct block_sequence_state *seq_state, 2136 struct pipe_ctx *pipe_ctx); 2137 2138 void hwss_add_dpp_program_bias_and_scale(struct block_sequence_state *seq_state, 2139 struct pipe_ctx *pipe_ctx); 2140 2141 void hwss_add_optc_program_manual_trigger(struct block_sequence_state *seq_state, 2142 struct pipe_ctx *pipe_ctx); 2143 2144 void hwss_add_dpp_set_output_transfer_func(struct block_sequence_state *seq_state, 2145 struct dc *dc, struct pipe_ctx *pipe_ctx); 2146 2147 void hwss_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx); 2148 2149 void hwss_add_mpc_update_visual_confirm(struct block_sequence_state *seq_state, 2150 struct dc *dc, struct pipe_ctx *pipe_ctx, int mpcc_id); 2151 2152 void hwss_add_mpc_power_on_mpc_mem_pwr(struct block_sequence_state *seq_state, 2153 struct mpc *mpc, int mpcc_id, bool power_on); 2154 2155 void hwss_add_mpc_set_output_csc(struct block_sequence_state *seq_state, 2156 struct mpc *mpc, int opp_id, const uint16_t *regval, enum mpc_output_csc_mode ocsc_mode); 2157 2158 void hwss_add_mpc_set_ocsc_default(struct block_sequence_state *seq_state, 2159 struct mpc *mpc, int opp_id, enum dc_color_space colorspace, enum mpc_output_csc_mode ocsc_mode); 2160 2161 void hwss_add_dmub_send_dmcub_cmd(struct block_sequence_state *seq_state, 2162 struct dc_context *ctx, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type); 2163 2164 void hwss_add_dmub_subvp_save_surf_addr(struct block_sequence_state *seq_state, 2165 struct dc_dmub_srv *dc_dmub_srv, struct dc_plane_address *addr, uint8_t subvp_index); 2166 2167 void hwss_add_hubp_wait_for_dcc_meta_prop(struct block_sequence_state *seq_state, 2168 struct dc *dc, struct pipe_ctx *top_pipe_to_program); 2169 2170 void hwss_add_hubp_wait_pipe_read_start(struct block_sequence_state *seq_state, 2171 struct hubp *hubp); 2172 2173 void hwss_add_hws_apply_update_flags_for_phantom(struct block_sequence_state *seq_state, 2174 struct pipe_ctx *pipe_ctx); 2175 2176 void hwss_add_hws_update_phantom_vp_position(struct block_sequence_state *seq_state, 2177 struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx); 2178 2179 void hwss_add_optc_set_odm_combine(struct block_sequence_state *seq_state, 2180 struct timing_generator *tg, int opp_inst[MAX_PIPES], int opp_head_count, 2181 int odm_slice_width, int last_odm_slice_width); 2182 2183 void hwss_add_optc_set_odm_bypass(struct block_sequence_state *seq_state, 2184 struct timing_generator *optc, struct dc_crtc_timing *timing); 2185 2186 void hwss_add_tg_program_global_sync(struct block_sequence_state *seq_state, 2187 struct timing_generator *tg, 2188 int vready_offset, 2189 unsigned int vstartup_lines, 2190 unsigned int vupdate_offset_pixels, 2191 unsigned int vupdate_vupdate_width_pixels, 2192 unsigned int pstate_keepout_start_lines); 2193 2194 void hwss_add_tg_wait_for_state(struct block_sequence_state *seq_state, 2195 struct timing_generator *tg, enum crtc_state state); 2196 2197 void hwss_add_tg_set_vtg_params(struct block_sequence_state *seq_state, 2198 struct timing_generator *tg, struct dc_crtc_timing *dc_crtc_timing, bool program_fp2); 2199 2200 void hwss_add_vertical_interrupt_setup(struct block_sequence_state *seq_state, 2201 struct timing_generator *tg, uint32_t start_line, uint32_t end_line); 2202 2203 void hwss_add_tg_setup_vertical_interrupt2(struct block_sequence_state *seq_state, 2204 struct timing_generator *tg, int start_line); 2205 2206 void hwss_add_dpp_set_hdr_multiplier(struct block_sequence_state *seq_state, 2207 struct dpp *dpp, uint32_t hw_mult); 2208 2209 void hwss_add_hubp_program_det_size(struct block_sequence_state *seq_state, 2210 struct hubbub *hubbub, unsigned int hubp_inst, unsigned int det_buffer_size_kb); 2211 2212 void hwss_add_hubp_program_mcache_id(struct block_sequence_state *seq_state, 2213 struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs); 2214 2215 void hwss_add_hubbub_force_pstate_change_control(struct block_sequence_state *seq_state, 2216 struct hubbub *hubbub, bool enable, bool wait); 2217 2218 void hwss_add_hubp_program_det_segments(struct block_sequence_state *seq_state, 2219 struct hubbub *hubbub, unsigned int hubp_inst, unsigned int det_size); 2220 2221 void hwss_add_opp_set_dyn_expansion(struct block_sequence_state *seq_state, 2222 struct output_pixel_processor *opp, enum dc_color_space color_sp, 2223 enum dc_color_depth color_dpth, enum signal_type signal); 2224 2225 void hwss_add_opp_program_fmt(struct block_sequence_state *seq_state, 2226 struct output_pixel_processor *opp, struct bit_depth_reduction_params *fmt_bit_depth, 2227 struct clamping_and_pixel_encoding_params *clamping); 2228 2229 void hwss_add_abm_set_pipe(struct block_sequence_state *seq_state, 2230 struct dc *dc, struct pipe_ctx *pipe_ctx); 2231 2232 void hwss_add_abm_set_level(struct block_sequence_state *seq_state, 2233 struct abm *abm, uint32_t abm_level); 2234 2235 void hwss_add_tg_enable_crtc(struct block_sequence_state *seq_state, 2236 struct timing_generator *tg); 2237 2238 void hwss_add_hubp_wait_flip_pending(struct block_sequence_state *seq_state, 2239 struct hubp *hubp, unsigned int timeout_us, unsigned int polling_interval_us); 2240 2241 void hwss_add_tg_wait_double_buffer_pending(struct block_sequence_state *seq_state, 2242 struct timing_generator *tg, unsigned int timeout_us, unsigned int polling_interval_us); 2243 2244 void hwss_add_dccg_set_dto_dscclk(struct block_sequence_state *seq_state, 2245 struct dccg *dccg, int inst, int num_slices_h); 2246 2247 void hwss_add_dsc_calculate_and_set_config(struct block_sequence_state *seq_state, 2248 struct pipe_ctx *pipe_ctx, bool enable, int opp_cnt); 2249 2250 void hwss_add_mpc_remove_mpcc(struct block_sequence_state *seq_state, 2251 struct mpc *mpc, struct mpc_tree *mpc_tree_params, struct mpcc *mpcc_to_remove); 2252 2253 void hwss_add_opp_set_mpcc_disconnect_pending(struct block_sequence_state *seq_state, 2254 struct output_pixel_processor *opp, int mpcc_inst, bool pending); 2255 2256 void hwss_add_hubp_disconnect(struct block_sequence_state *seq_state, 2257 struct hubp *hubp); 2258 2259 void hwss_add_dsc_enable_with_opp(struct block_sequence_state *seq_state, 2260 struct pipe_ctx *pipe_ctx); 2261 2262 void hwss_add_dsc_disconnect(struct block_sequence_state *seq_state, 2263 struct display_stream_compressor *dsc); 2264 2265 void hwss_add_dc_set_optimized_required(struct block_sequence_state *seq_state, 2266 struct dc *dc, bool optimized_required); 2267 2268 void hwss_add_abm_set_immediate_disable(struct block_sequence_state *seq_state, 2269 struct dc *dc, struct pipe_ctx *pipe_ctx); 2270 2271 void hwss_add_opp_set_disp_pattern_generator(struct block_sequence_state *seq_state, 2272 struct output_pixel_processor *opp, 2273 enum controller_dp_test_pattern test_pattern, 2274 enum controller_dp_color_space color_space, 2275 enum dc_color_depth color_depth, 2276 struct tg_color solid_color, 2277 bool use_solid_color, 2278 int width, 2279 int height, 2280 int offset); 2281 2282 void hwss_add_opp_program_bit_depth_reduction(struct block_sequence_state *seq_state, 2283 struct output_pixel_processor *opp, 2284 bool use_default_params, 2285 struct pipe_ctx *pipe_ctx); 2286 2287 void hwss_add_dpp_program_cm_hist(struct block_sequence_state *seq_state, 2288 struct dpp *dpp, 2289 struct cm_hist_control cm_hist_control, 2290 enum dc_color_space color_space); 2291 2292 void hwss_add_dc_ip_request_cntl(struct block_sequence_state *seq_state, 2293 struct dc *dc, 2294 bool enable); 2295 2296 void hwss_add_dwbc_update(struct block_sequence_state *seq_state, 2297 struct dwbc *dwb, 2298 struct dc_dwb_params *dwb_params); 2299 2300 void hwss_add_mcif_wb_config_buf(struct block_sequence_state *seq_state, 2301 struct mcif_wb *mcif_wb, 2302 struct mcif_buf_params *mcif_buf_params, 2303 unsigned int dest_height); 2304 2305 void hwss_add_mcif_wb_config_arb(struct block_sequence_state *seq_state, 2306 struct mcif_wb *mcif_wb, 2307 struct mcif_arb_params *mcif_arb_params); 2308 2309 void hwss_add_mcif_wb_enable(struct block_sequence_state *seq_state, 2310 struct mcif_wb *mcif_wb); 2311 2312 void hwss_add_mcif_wb_disable(struct block_sequence_state *seq_state, 2313 struct mcif_wb *mcif_wb); 2314 2315 void hwss_add_mpc_set_dwb_mux(struct block_sequence_state *seq_state, 2316 struct mpc *mpc, 2317 int dwb_id, 2318 int mpcc_id); 2319 2320 void hwss_add_mpc_disable_dwb_mux(struct block_sequence_state *seq_state, 2321 struct mpc *mpc, 2322 unsigned int dwb_id); 2323 2324 void hwss_add_dwbc_enable(struct block_sequence_state *seq_state, 2325 struct dwbc *dwb, 2326 struct dc_dwb_params *dwb_params); 2327 2328 void hwss_add_dwbc_disable(struct block_sequence_state *seq_state, 2329 struct dwbc *dwb); 2330 2331 void hwss_add_tg_set_gsl(struct block_sequence_state *seq_state, 2332 struct timing_generator *tg, 2333 struct gsl_params gsl); 2334 2335 void hwss_add_tg_set_gsl_source_select(struct block_sequence_state *seq_state, 2336 struct timing_generator *tg, 2337 int group_idx, 2338 uint32_t gsl_ready_signal); 2339 2340 void hwss_add_hubp_update_mall_sel(struct block_sequence_state *seq_state, 2341 struct hubp *hubp, 2342 uint32_t mall_sel, 2343 bool cache_cursor); 2344 2345 void hwss_add_hubp_prepare_subvp_buffering(struct block_sequence_state *seq_state, 2346 struct hubp *hubp, 2347 bool enable); 2348 2349 void hwss_add_hubp_set_blank_en(struct block_sequence_state *seq_state, 2350 struct hubp *hubp, 2351 bool enable); 2352 2353 void hwss_add_hubp_disable_control(struct block_sequence_state *seq_state, 2354 struct hubp *hubp, 2355 bool disable); 2356 2357 void hwss_add_hubbub_soft_reset(struct block_sequence_state *seq_state, 2358 struct hubbub *hubbub, 2359 void (*hubbub_soft_reset)(struct hubbub *hubbub, bool reset), 2360 bool reset); 2361 2362 void hwss_add_hubbub_perfmon_reset(struct block_sequence_state *seq_state, 2363 struct hubbub *hubbub); 2364 2365 void hwss_add_hubbub_perfmon_arm_out_of_order_bw(struct block_sequence_state *seq_state, 2366 struct hubbub *hubbub); 2367 2368 void hwss_add_hubbub_perfmon_start_out_of_order_bw(struct block_sequence_state *seq_state, 2369 struct hubbub *hubbub); 2370 2371 void hwss_add_hubbub_perfmon_start_in_order_bw(struct block_sequence_state *seq_state, 2372 struct hubbub *hubbub); 2373 2374 void hwss_add_hubbub_perfmon_start_memory_latencies(struct block_sequence_state *seq_state, 2375 struct hubbub *hubbub); 2376 2377 void hwss_add_hubbub_perfmon_start_urgent_assertion_count(struct block_sequence_state *seq_state, 2378 struct hubbub *hubbub); 2379 2380 void hwss_add_hubbub_perfmon_start_urgent_ramp_latency(struct block_sequence_state *seq_state, 2381 struct hubbub *hubbub, 2382 const struct hubbub_urgent_latency_params *latency_params); 2383 2384 void hwss_add_hubbub_perfmon_start_prefetch_data_size(struct block_sequence_state *seq_state, 2385 struct hubbub *hubbub); 2386 2387 void hwss_add_hubbub_perfmon_get_out_of_order_bw(struct block_sequence_state *seq_state, 2388 struct hubbub *hubbub, uint32_t refclk_mhz, 2389 uint32_t *bandwidth_mbps, uint32_t *duration_ns); 2390 2391 void hwss_add_hubbub_perfmon_get_in_order_bw(struct block_sequence_state *seq_state, 2392 struct hubbub *hubbub, uint32_t refclk_mhz, uint32_t min_duration_ns, 2393 uint32_t *bandwidth_mbps, uint32_t *duration_ns); 2394 2395 void hwss_add_hubbub_perfmon_get_memory_latencies(struct block_sequence_state *seq_state, 2396 struct hubbub *hubbub, uint32_t refclk_mhz, 2397 struct dc_probe_latencies *result); 2398 2399 void hwss_add_hubbub_perfmon_get_urgent_assertion_count(struct block_sequence_state *seq_state, 2400 struct hubbub *hubbub, uint32_t refclk_mhz, 2401 uint32_t *assertion_count); 2402 2403 void hwss_add_hubbub_perfmon_get_prefetch_data_size(struct block_sequence_state *seq_state, 2404 struct hubbub *hubbub, uint32_t *prefetch_data_size); 2405 2406 void hwss_add_hubbub_perfmon_get_urgent_ramp_latency(struct block_sequence_state *seq_state, 2407 struct hubbub *hubbub, uint32_t refclk_mhz, 2408 uint32_t *latency_ns); 2409 2410 void hwss_add_hubp_clk_cntl(struct block_sequence_state *seq_state, 2411 struct hubp *hubp, 2412 bool enable); 2413 2414 void hwss_add_dpp_dppclk_control(struct block_sequence_state *seq_state, 2415 struct dpp *dpp, 2416 bool dppclk_div, 2417 bool enable); 2418 2419 void hwss_add_disable_phantom_crtc(struct block_sequence_state *seq_state, 2420 struct timing_generator *tg); 2421 2422 void hwss_add_dsc_pg_status(struct block_sequence_state *seq_state, 2423 struct dce_hwseq *hws, 2424 int dsc_inst, 2425 bool is_ungated); 2426 2427 void hwss_add_dsc_wait_disconnect_pending_clear(struct block_sequence_state *seq_state, 2428 struct display_stream_compressor *dsc, 2429 bool *is_ungated); 2430 2431 void hwss_add_dsc_disable(struct block_sequence_state *seq_state, 2432 struct display_stream_compressor *dsc, 2433 bool *is_ungated); 2434 2435 void hwss_add_dccg_set_ref_dscclk(struct block_sequence_state *seq_state, 2436 struct dccg *dccg, 2437 int dsc_inst, 2438 bool *is_ungated); 2439 2440 void hwss_add_dpp_root_clock_control(struct block_sequence_state *seq_state, 2441 struct dce_hwseq *hws, 2442 unsigned int dpp_inst, 2443 bool clock_on); 2444 2445 void hwss_add_dpp_pg_control(struct block_sequence_state *seq_state, 2446 struct dce_hwseq *hws, 2447 unsigned int dpp_inst, 2448 bool power_on); 2449 2450 void hwss_add_hubp_pg_control(struct block_sequence_state *seq_state, 2451 struct dce_hwseq *hws, 2452 unsigned int hubp_inst, 2453 bool power_on); 2454 2455 void hwss_add_hubp_set_blank(struct block_sequence_state *seq_state, 2456 struct hubp *hubp, 2457 bool blank); 2458 2459 void hwss_add_hubp_init(struct block_sequence_state *seq_state, 2460 struct hubp *hubp); 2461 2462 void hwss_add_hubp_reset(struct block_sequence_state *seq_state, 2463 struct hubp *hubp); 2464 2465 void hwss_add_dpp_reset(struct block_sequence_state *seq_state, 2466 struct dpp *dpp); 2467 2468 void hwss_add_opp_pipe_clock_control(struct block_sequence_state *seq_state, 2469 struct output_pixel_processor *opp, 2470 bool enable); 2471 2472 void hwss_add_hubp_set_vm_system_aperture_settings(struct block_sequence_state *seq_state, 2473 struct hubp *hubp, 2474 uint64_t sys_default, 2475 uint64_t sys_low, 2476 uint64_t sys_high); 2477 2478 void hwss_add_hubp_set_flip_int(struct block_sequence_state *seq_state, 2479 struct hubp *hubp); 2480 2481 void hwss_add_dccg_update_dpp_dto(struct block_sequence_state *seq_state, 2482 struct dccg *dccg, 2483 int dpp_inst, 2484 int dppclk_khz); 2485 2486 void hwss_add_hubp_vtg_sel(struct block_sequence_state *seq_state, 2487 struct hubp *hubp, 2488 uint32_t otg_inst); 2489 2490 void hwss_add_hubp_setup2(struct block_sequence_state *seq_state, 2491 struct hubp *hubp, 2492 struct dml2_dchub_per_pipe_register_set *hubp_regs, 2493 union dml2_global_sync_programming *global_sync, 2494 struct dc_crtc_timing *timing); 2495 2496 void hwss_add_hubp_setup(struct block_sequence_state *seq_state, 2497 struct hubp *hubp, 2498 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 2499 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, 2500 struct _vcs_dpi_display_rq_regs_st *rq_regs, 2501 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest); 2502 2503 void hwss_add_hubp_set_unbounded_requesting(struct block_sequence_state *seq_state, 2504 struct hubp *hubp, 2505 bool unbounded_req); 2506 2507 void hwss_add_hubp_setup_interdependent2(struct block_sequence_state *seq_state, 2508 struct hubp *hubp, 2509 struct dml2_dchub_per_pipe_register_set *hubp_regs); 2510 2511 void hwss_add_hubp_setup_interdependent(struct block_sequence_state *seq_state, 2512 struct hubp *hubp, 2513 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 2514 struct _vcs_dpi_display_ttu_regs_st *ttu_regs); 2515 void hwss_add_hubp_program_surface_config(struct block_sequence_state *seq_state, 2516 struct hubp *hubp, 2517 enum surface_pixel_format format, 2518 struct dc_tiling_info *tiling_info, 2519 struct plane_size plane_size, 2520 enum dc_rotation_angle rotation, 2521 struct dc_plane_dcc_param *dcc, 2522 bool horizontal_mirror, 2523 int compat_level); 2524 2525 void hwss_add_dpp_setup_dpp(struct block_sequence_state *seq_state, 2526 struct pipe_ctx *pipe_ctx); 2527 2528 void hwss_add_dpp_set_cursor_matrix(struct block_sequence_state *seq_state, 2529 struct dpp *dpp, 2530 enum dc_color_space color_space, 2531 struct dc_csc_transform *cursor_csc_color_matrix); 2532 2533 void hwss_add_mpc_update_blending(struct block_sequence_state *seq_state, 2534 struct mpc *mpc, 2535 struct mpcc_blnd_cfg blnd_cfg, 2536 int mpcc_id); 2537 2538 void hwss_add_mpc_assert_idle_mpcc(struct block_sequence_state *seq_state, 2539 struct mpc *mpc, 2540 int mpcc_id); 2541 2542 void hwss_add_mpc_insert_plane(struct block_sequence_state *seq_state, 2543 struct mpc *mpc, 2544 struct mpc_tree *mpc_tree_params, 2545 struct mpcc_blnd_cfg blnd_cfg, 2546 struct mpcc_sm_cfg *sm_cfg, 2547 struct mpcc *insert_above_mpcc, 2548 int dpp_id, 2549 int mpcc_id); 2550 2551 void hwss_add_dpp_set_scaler(struct block_sequence_state *seq_state, 2552 struct dpp *dpp, 2553 const struct scaler_data *scl_data); 2554 2555 void hwss_add_hubp_mem_program_viewport(struct block_sequence_state *seq_state, 2556 struct hubp *hubp, 2557 const struct rect *viewport, 2558 const struct rect *viewport_c); 2559 2560 void hwss_add_abort_cursor_offload_update(struct block_sequence_state *seq_state, 2561 struct dc *dc, 2562 struct pipe_ctx *pipe_ctx); 2563 2564 void hwss_add_set_cursor_attribute(struct block_sequence_state *seq_state, 2565 struct dc *dc, 2566 struct pipe_ctx *pipe_ctx); 2567 2568 void hwss_add_hubp_set_cursor_attributes(struct block_sequence_state *seq_state, 2569 struct hubp *hubp, 2570 const struct dc_cursor_attributes *attributes); 2571 2572 void hwss_add_dpp_set_cursor_attributes(struct block_sequence_state *seq_state, 2573 struct dpp *dpp, 2574 struct dc_cursor_attributes *attributes); 2575 2576 void hwss_add_set_cursor_position(struct block_sequence_state *seq_state, 2577 struct dc *dc, 2578 struct pipe_ctx *pipe_ctx); 2579 2580 void hwss_add_set_cursor_sdr_white_level(struct block_sequence_state *seq_state, 2581 struct dc *dc, 2582 struct pipe_ctx *pipe_ctx); 2583 2584 void hwss_add_program_output_csc(struct block_sequence_state *seq_state, 2585 struct dc *dc, 2586 struct pipe_ctx *pipe_ctx, 2587 enum dc_color_space colorspace, 2588 uint16_t *matrix, 2589 int opp_id); 2590 2591 void hwss_add_phantom_hubp_post_enable(struct block_sequence_state *seq_state, 2592 struct hubp *hubp); 2593 2594 void hwss_add_update_force_pstate(struct block_sequence_state *seq_state, 2595 struct dc *dc, 2596 struct dc_state *context); 2597 2598 void hwss_add_hubbub_apply_dedcn21_147_wa(struct block_sequence_state *seq_state, 2599 struct hubbub *hubbub); 2600 2601 void hwss_add_hubbub_allow_self_refresh_control(struct block_sequence_state *seq_state, 2602 struct hubbub *hubbub, 2603 bool allow, 2604 bool *disallow_self_refresh_applied); 2605 2606 void hwss_add_tg_get_frame_count(struct block_sequence_state *seq_state, 2607 struct timing_generator *tg, 2608 unsigned int *frame_count); 2609 2610 void hwss_add_tg_set_dsc_config(struct block_sequence_state *seq_state, 2611 struct timing_generator *tg, 2612 struct dsc_optc_config *dsc_optc_cfg, 2613 bool enable); 2614 2615 void hwss_add_opp_program_left_edge_extra_pixel(struct block_sequence_state *seq_state, 2616 struct output_pixel_processor *opp, 2617 enum dc_pixel_encoding pixel_encoding, 2618 bool is_otg_master); 2619 2620 void hwss_add_hubp_enable_3dlut_fl(struct block_sequence_state *seq_state, 2621 struct hubp *hubp); 2622 2623 void hwss_add_begin_cursor_offload_update(struct block_sequence_state *seq_state, 2624 struct dc *dc, 2625 struct pipe_ctx *pipe_ctx); 2626 2627 void hwss_add_cursor_lock(struct block_sequence_state *seq_state, 2628 struct dc *dc, 2629 struct pipe_ctx *pipe_ctx, 2630 bool lock); 2631 2632 void hwss_add_send_update_cursor_info_to_dmu(struct block_sequence_state *seq_state, 2633 struct pipe_ctx *pipe_ctx, 2634 int index); 2635 2636 void hwss_add_update_cursor_offload_pipe(struct block_sequence_state *seq_state, 2637 struct dc *dc, 2638 struct pipe_ctx *pipe_ctx); 2639 2640 void hwss_add_commit_cursor_offload_update(struct block_sequence_state *seq_state, 2641 struct dc *dc, 2642 struct pipe_ctx *pipe_ctx); 2643 2644 void hwss_add_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state, 2645 struct pipe_ctx *pipe_ctx); 2646 2647 void hwss_add_hpo_frl_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state, 2648 struct pipe_ctx *pipe_ctx); 2649 2650 void hwss_add_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state, 2651 struct pipe_ctx *pipe_ctx); 2652 2653 void hwss_add_hpo_dp_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state, 2654 struct pipe_ctx *pipe_ctx); 2655 2656 void hwss_add_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state, 2657 struct pipe_ctx *pipe_ctx); 2658 2659 void hwss_add_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state, 2660 struct pipe_ctx *pipe_ctx); 2661 2662 void hwss_add_dsc_set_config(struct block_sequence_state *seq_state, 2663 struct display_stream_compressor *dsc, 2664 const struct dsc_config *dsc_cfg, 2665 const struct dsc_optc_config *dsc_optc_cfg); 2666 2667 void hwss_add_stream_enc_dp_set_dsc_config(struct block_sequence_state *seq_state, 2668 struct stream_encoder *stream_enc, 2669 const struct dsc_optc_config *dsc_optc_cfg); 2670 2671 void hwss_add_hpo_dp_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state, 2672 struct hpo_dp_stream_encoder *hpo_dp_stream_enc, 2673 bool immediate_update, 2674 uint8_t *dsc_packed_pps, 2675 bool pps_sdp_stream); 2676 2677 void hwss_add_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state, 2678 struct stream_encoder *stream_enc, 2679 bool immediate_update, 2680 uint8_t *dsc_packed_pps, 2681 bool pps_sdp_stream); 2682 2683 void hwss_add_hpo_frl_stream_enc_set_dsc_config(struct block_sequence_state *seq_state, 2684 struct hpo_frl_stream_encoder *hpo_frl_stream_enc, 2685 const struct dc_crtc_timing *timing, 2686 uint8_t *dsc_packed_pps); 2687 2688 void hwss_add_setup_periodic_interrupt(struct block_sequence_state *seq_state, 2689 struct dc *dc, 2690 struct pipe_ctx *pipe_ctx); 2691 2692 void hwss_add_dp_trace_source_sequence(struct block_sequence_state *seq_state, 2693 struct dc_link *link, 2694 enum dpcd_source_sequence source); 2695 2696 void hwss_add_set_dmdata_attributes(struct block_sequence_state *seq_state, 2697 struct pipe_ctx *pipe_ctx); 2698 2699 void hwss_add_link_increase_mst_payload(struct block_sequence_state *seq_state, 2700 struct pipe_ctx *pipe_ctx, 2701 uint32_t mst_stream_bw); 2702 2703 void hwss_add_link_reduce_mst_payload(struct block_sequence_state *seq_state, 2704 struct pipe_ctx *pipe_ctx, 2705 uint32_t mst_stream_bw); 2706 2707 void hwss_add_dp_set_test_pattern(struct block_sequence_state *seq_state, 2708 struct dc_link *link, 2709 enum dp_test_pattern test_pattern, 2710 enum dp_test_pattern_color_space test_pattern_color_space, 2711 const struct link_training_settings *p_link_settings, 2712 const unsigned char *p_custom_pattern, 2713 unsigned int cust_pattern_size); 2714 2715 void hwss_add_link_set_dpms_off(struct block_sequence_state *seq_state, 2716 struct pipe_ctx *pipe_ctx); 2717 2718 void hwss_add_disable_audio_stream(struct block_sequence_state *seq_state, 2719 struct pipe_ctx *pipe_ctx); 2720 2721 void hwss_add_prepare_bandwidth(struct block_sequence_state *seq_state, 2722 struct dc *dc, 2723 struct dc_state *context); 2724 2725 void hwss_add_link_set_dpms_on(struct block_sequence_state *seq_state, 2726 struct dc_state *state, 2727 struct pipe_ctx *pipe_ctx); 2728 2729 /* Clock manager BLS executor functions */ 2730 void hwss_clk_mgr_set_max_memclk(union block_sequence_params *params); 2731 void hwss_clk_mgr_update_clocks(union block_sequence_params *params); 2732 2733 void hwss_hubbub_program_watermarks(union block_sequence_params *params); 2734 2735 void hwss_hubbub_program_arbiter(union block_sequence_params *params); 2736 2737 void hwss_hubbub_program_compbuf_segments(union block_sequence_params *params); 2738 2739 /* Clock manager BLS add-helper functions */ 2740 void hwss_add_clk_mgr_set_max_memclk(struct block_sequence_state *seq_state, 2741 struct clk_mgr *clk_mgr, 2742 unsigned int memclk_mhz); 2743 2744 void hwss_add_clk_mgr_update_clocks(struct block_sequence_state *seq_state, 2745 struct clk_mgr *clk_mgr); 2746 2747 void hwss_add_hubbub_program_watermarks(struct block_sequence_state *seq_state, 2748 struct dc *dc, 2749 struct hubbub *hubbub, 2750 union dcn_watermark_set *watermarks, 2751 unsigned int refclk_mhz, 2752 bool safe_to_lower); 2753 2754 void hwss_add_hubbub_program_arbiter(struct block_sequence_state *seq_state, 2755 struct dc *dc, 2756 struct hubbub *hubbub, 2757 struct dml2_display_arb_regs *arb_regs, 2758 bool safe_to_lower); 2759 2760 void hwss_add_hubbub_program_compbuf_segments(struct block_sequence_state *seq_state, 2761 struct hubbub *hubbub, 2762 unsigned int compbuf_size, 2763 bool safe_to_lower); 2764 2765 #endif /* __DC_HW_SEQUENCER_H__ */ 2766