| 7e756671 | 21-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.
Signed-off-by: Emil Renner Berth
riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[drew: change apb registers from syscon to second reg of gmac node,
add phy reset delay properties for beaglev ahead]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
show more ...
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| 2a3bf75a | 14-Oct-2024 |
Drew Fustini <dfustini@tenstorrent.com> |
riscv: dts: thead: remove enabled property for spi0
There are currently no nodes that use spi0 so remove the enabled
property for it in the beaglev ahead and lpi4a dts files. It can be
re-enabled in
riscv: dts: thead: remove enabled property for spi0
There are currently no nodes that use spi0 so remove the enabled
property for it in the beaglev ahead and lpi4a dts files. It can be
re-enabled in the future if any peripherals will use it. The definition
of spi0 remains in the th1520.dtsi file.
Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
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| bcec43a0 | 14-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dts: thead: Add missing GPIO clock-names
The gpio-dwapb looks for clock named "bus" so add clock-names property
for the gpio controller nodes.
Signed-off-by: Emil Renner Berthing <emil.renne
riscv: dts: thead: Add missing GPIO clock-names
The gpio-dwapb looks for clock named "bus" so add clock-names property
for the gpio controller nodes.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[dfustini: add two more lines to the commit message]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
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| cce219d3 | 14-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dtb: thead: Add BeagleV Ahead LEDs
Add nodes for the 5 user controllable LEDs on the BeagleV Ahead board.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <tho
riscv: dtb: thead: Add BeagleV Ahead LEDs
Add nodes for the 5 user controllable LEDs on the BeagleV Ahead board.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
show more ...
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| d7252a07 | 14-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dts: thead: Add TH1520 pinctrl settings for UART0
Add pinctrl settings for UART0 used as the default debug console on
both the Lichee Pi 4A and BeagleV Ahead boards.
Acked-by: Linus Walleij
riscv: dts: thead: Add TH1520 pinctrl settings for UART0
Add pinctrl settings for UART0 used as the default debug console on
both the Lichee Pi 4A and BeagleV Ahead boards.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
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| 3893d1bf | 14-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dts: thead: Add Lichee Pi 4M GPIO line names
Add names for the GPIO00-GPIO14 lines of the SO-DIMM module.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <tho
riscv: dts: thead: Add Lichee Pi 4M GPIO line names
Add names for the GPIO00-GPIO14 lines of the SO-DIMM module.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
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| 33d3a63f | 14-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dts: thead: Adjust TH1520 GPIO labels
Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.
GPIO0_X -> <&gpio0 X Y>
GPI
riscv: dts: thead: Adjust TH1520 GPIO labels
Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.
GPIO0_X -> <&gpio0 X Y>
GPIO1_X -> <&gpio1 X Y>
GPIO2_X -> <&gpio2 X Y>
GPIO3_X -> <&gpio3 X Y>
GPIO4_X -> <&gpio4 X Y>
AOGPIO_X -> <&aogpio X Y>
Remove labels for the parent GPIO devices that shouldn't need to be
referenced.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
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| 5ec423d1 | 14-Oct-2024 |
Emil Renner Berthing <emil.renner.berthing@canonical.com> |
riscv: dts: thead: Add TH1520 GPIO ranges
Add gpio-ranges properties to the TH1520 device tree, so user space can
change basic pinconf settings for GPIOs and are not allowed to use pads
already used
riscv: dts: thead: Add TH1520 GPIO ranges
Add gpio-ranges properties to the TH1520 device tree, so user space can
change basic pinconf settings for GPIOs and are not allowed to use pads
already used by other functions.
Adjust number of GPIOs available for the different controllers.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
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| 7f5b2821 | 01-Aug-2024 |
Drew Fustini <dfustini@tenstorrent.com> |
riscv: dts: thead: add clock to TH1520 gpio nodes
Add clock property to TH1520 gpio controller nodes. These clock gates
refer to corresponding enable bits in the peripheral clock gate control
regist
riscv: dts: thead: add clock to TH1520 gpio nodes
Add clock property to TH1520 gpio controller nodes. These clock gates
refer to corresponding enable bits in the peripheral clock gate control
register. Refer to register PERI_CLK_CFG in section 4.4.2.2.52 of the
TH1520 System User Manual.
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
show more ...
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| e919fe03 | 01-Aug-2024 |
Drew Fustini <dfustini@tenstorrent.com> |
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC.
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/d
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC.
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
show more ...
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| b6b50284 | 06-Dec-2023 |
Drew Fustini <dfustini@baylibre.com> |
riscv: dts: thead: Enable LicheePi 4A eMMC and microSD
Add emmc node properties for the eMMC device and add sdio0 node
properties for the microSD slot. Set the frequency for the sdhci
reference cloc
riscv: dts: thead: Enable LicheePi 4A eMMC and microSD
Add emmc node properties for the eMMC device and add sdio0 node
properties for the microSD slot. Set the frequency for the sdhci
reference clock.
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
show more ...
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| 18d92a03 | 06-Dec-2023 |
Drew Fustini <dfustini@baylibre.com> |
riscv: dts: thead: Enable BeagleV Ahead eMMC and microSD
Add emmc node properties for the eMMC device and add sdio0 node
properties for the microSD slot. Set the frequency for the sdhci
reference cl
riscv: dts: thead: Enable BeagleV Ahead eMMC and microSD
Add emmc node properties for the eMMC device and add sdio0 node
properties for the microSD slot. Set the frequency for the sdhci
reference clock.
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
show more ...
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