xref: /linux/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml (revision 566ab427f827b0256d3e8ce0235d088e6a9c28bd) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DWC AHCI SATA controller for Rockchip devices
8
9maintainers:
10  - Serge Semin <fancer.lancer@gmail.com>
11
12description:
13  This document defines device tree bindings for the Synopsys DWC
14  implementation of the AHCI SATA controller found in Rockchip
15  devices.
16
17select:
18  properties:
19    compatible:
20      contains:
21        enum:
22          - rockchip,rk3568-dwc-ahci
23          - rockchip,rk3588-dwc-ahci
24  required:
25    - compatible
26
27properties:
28  compatible:
29    items:
30      - enum:
31          - rockchip,rk3568-dwc-ahci
32          - rockchip,rk3588-dwc-ahci
33      - const: snps,dwc-ahci
34
35  ports-implemented:
36    const: 1
37
38  power-domains:
39    maxItems: 1
40
41  sata-port@0:
42    $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
43
44    properties:
45      reg:
46        const: 0
47
48    unevaluatedProperties: false
49
50patternProperties:
51  "^sata-port@[1-9a-e]$": false
52
53required:
54  - compatible
55  - reg
56  - interrupts
57  - clocks
58  - clock-names
59  - ports-implemented
60
61allOf:
62  - $ref: snps,dwc-ahci-common.yaml#
63  - if:
64      properties:
65        compatible:
66          contains:
67            enum:
68              - rockchip,rk3588-dwc-ahci
69    then:
70      properties:
71        clocks:
72          maxItems: 5
73        clock-names:
74          items:
75            - const: sata
76            - const: pmalive
77            - const: rxoob
78            - const: ref
79            - const: asic
80  - if:
81      properties:
82        compatible:
83          contains:
84            enum:
85              - rockchip,rk3568-dwc-ahci
86    then:
87      properties:
88        clocks:
89          maxItems: 3
90        clock-names:
91          items:
92            - const: sata
93            - const: pmalive
94            - const: rxoob
95
96unevaluatedProperties: false
97
98examples:
99  - |
100    #include <dt-bindings/clock/rockchip,rk3588-cru.h>
101    #include <dt-bindings/interrupt-controller/arm-gic.h>
102    #include <dt-bindings/ata/ahci.h>
103    #include <dt-bindings/phy/phy.h>
104
105    sata@fe210000 {
106      compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
107      reg = <0xfe210000 0x1000>;
108      clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>,
109               <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>,
110               <&cru CLK_PIPEPHY0_PIPE_ASIC_G>;
111      clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
112      interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>;
113      ports-implemented = <0x1>;
114      #address-cells = <1>;
115      #size-cells = <0>;
116
117      sata-port@0 {
118        reg = <0>;
119        hba-port-cap = <HBA_PORT_FBSCP>;
120        phys = <&combphy0_ps PHY_TYPE_SATA>;
121        phy-names = "sata-phy";
122        snps,rx-ts-max = <32>;
123        snps,tx-ts-max = <32>;
124      };
125    };
126
127...
128