1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek DPI and DP_INTF Controller 8 9maintainers: 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 12 13description: | 14 The MediaTek DPI and DP_INTF function blocks are a sink of the display 15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a 16 parallel output bus. 17 18properties: 19 compatible: 20 oneOf: 21 - enum: 22 - mediatek,mt2701-dpi 23 - mediatek,mt7623-dpi 24 - mediatek,mt8173-dpi 25 - mediatek,mt8183-dpi 26 - mediatek,mt8186-dpi 27 - mediatek,mt8188-dp-intf 28 - mediatek,mt8192-dpi 29 - mediatek,mt8195-dp-intf 30 - items: 31 - enum: 32 - mediatek,mt6795-dpi 33 - const: mediatek,mt8183-dpi 34 - items: 35 - enum: 36 - mediatek,mt8365-dpi 37 - const: mediatek,mt8192-dpi 38 39 reg: 40 maxItems: 1 41 42 interrupts: 43 maxItems: 1 44 45 clocks: 46 items: 47 - description: Pixel Clock 48 - description: Engine Clock 49 - description: DPI PLL 50 51 clock-names: 52 items: 53 - const: pixel 54 - const: engine 55 - const: pll 56 57 pinctrl-0: true 58 pinctrl-1: true 59 60 pinctrl-names: 61 items: 62 - const: default 63 - const: sleep 64 65 power-domains: 66 maxItems: 1 67 68 port: 69 $ref: /schemas/graph.yaml#/properties/port 70 description: 71 Output port node. This port should be connected to the input port of an 72 attached HDMI, LVDS or DisplayPort encoder chip. 73 74required: 75 - compatible 76 - reg 77 - interrupts 78 - clocks 79 - clock-names 80 - port 81 82allOf: 83 - if: 84 not: 85 properties: 86 compatible: 87 contains: 88 enum: 89 - mediatek,mt6795-dpi 90 - mediatek,mt8173-dpi 91 - mediatek,mt8186-dpi 92 then: 93 properties: 94 power-domains: false 95 96additionalProperties: false 97 98examples: 99 - | 100 #include <dt-bindings/interrupt-controller/arm-gic.h> 101 #include <dt-bindings/clock/mt8173-clk.h> 102 103 dpi0: dpi@1401d000 { 104 compatible = "mediatek,mt8173-dpi"; 105 reg = <0x1401d000 0x1000>; 106 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; 107 clocks = <&mmsys CLK_MM_DPI_PIXEL>, 108 <&mmsys CLK_MM_DPI_ENGINE>, 109 <&apmixedsys CLK_APMIXED_TVDPLL>; 110 clock-names = "pixel", "engine", "pll"; 111 pinctrl-names = "default", "sleep"; 112 pinctrl-0 = <&dpi_pin_func>; 113 pinctrl-1 = <&dpi_pin_idle>; 114 115 port { 116 dpi0_out: endpoint { 117 remote-endpoint = <&hdmi0_in>; 118 }; 119 }; 120 }; 121 122... 123