xref: /linux/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts (revision 566ab427f827b0256d3e8ce0235d088e6a9c28bd)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 BayLibre SAS. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include "meson-g12a.dtsi"
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/gpio/meson-g12a-gpio.h>
11#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12
13/ {
14	compatible = "amediatech,x96-max", "amlogic,g12a";
15	model = "Shenzhen Amediatech Technology Co., Ltd X96 Max";
16
17	aliases {
18		serial0 = &uart_AO;
19		ethernet0 = &ethmac;
20	};
21
22	spdif_dit: audio-codec-1 {
23		#sound-dai-cells = <0>;
24		compatible = "linux,spdif-dit";
25		sound-name-prefix = "DIT";
26	};
27
28	chosen {
29		stdout-path = "serial0:115200n8";
30	};
31	memory@0 {
32		device_type = "memory";
33		reg = <0x0 0x0 0x0 0x40000000>;
34	};
35
36	cvbs-connector {
37		compatible = "composite-video-connector";
38
39		port {
40			cvbs_connector_in: endpoint {
41				remote-endpoint = <&cvbs_vdac_out>;
42			};
43		};
44	};
45
46	hdmi-connector {
47		compatible = "hdmi-connector";
48		type = "a";
49
50		port {
51			hdmi_connector_in: endpoint {
52				remote-endpoint = <&hdmi_tx_tmds_out>;
53			};
54		};
55	};
56
57	emmc_pwrseq: emmc-pwrseq {
58		compatible = "mmc-pwrseq-emmc";
59		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
60	};
61
62	sdio_pwrseq: sdio-pwrseq {
63		compatible = "mmc-pwrseq-simple";
64		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
65		clocks = <&wifi32k>;
66		clock-names = "ext_clock";
67	};
68
69	flash_1v8: regulator-flash-1v8 {
70		compatible = "regulator-fixed";
71		regulator-name = "FLASH_1V8";
72		regulator-min-microvolt = <1800000>;
73		regulator-max-microvolt = <1800000>;
74		vin-supply = <&vcc_3v3>;
75		regulator-always-on;
76	};
77
78	dc_in: regulator-dc-in {
79		compatible = "regulator-fixed";
80		regulator-name = "DC_IN";
81		regulator-min-microvolt = <5000000>;
82		regulator-max-microvolt = <5000000>;
83		regulator-always-on;
84	};
85
86	vcc_1v8: regulator-vcc-1v8 {
87		compatible = "regulator-fixed";
88		regulator-name = "VCC_1V8";
89		regulator-min-microvolt = <1800000>;
90		regulator-max-microvolt = <1800000>;
91		vin-supply = <&vcc_3v3>;
92		regulator-always-on;
93	};
94
95	vcc_3v3: regulator-vcc-3v3 {
96		compatible = "regulator-fixed";
97		regulator-name = "VCC_3V3";
98		regulator-min-microvolt = <3300000>;
99		regulator-max-microvolt = <3300000>;
100		vin-supply = <&vddao_3v3>;
101		regulator-always-on;
102		/* FIXME: actually controlled by VDDCPU_B_EN */
103	};
104
105	vcc_5v: regulator-vcc-5v {
106		compatible = "regulator-fixed";
107		regulator-name = "VCC_5V";
108		regulator-min-microvolt = <5000000>;
109		regulator-max-microvolt = <5000000>;
110		vin-supply = <&dc_in>;
111
112		gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
113	};
114
115	vddao_1v8: regulator-vddao-1v8 {
116		compatible = "regulator-fixed";
117		regulator-name = "VDDAO_1V8";
118		regulator-min-microvolt = <1800000>;
119		regulator-max-microvolt = <1800000>;
120		vin-supply = <&vddao_3v3>;
121		regulator-always-on;
122	};
123
124	vddao_3v3: regulator-vddao-3v3 {
125		compatible = "regulator-fixed";
126		regulator-name = "VDDAO_3V3";
127		regulator-min-microvolt = <3300000>;
128		regulator-max-microvolt = <3300000>;
129		vin-supply = <&dc_in>;
130		regulator-always-on;
131	};
132
133	vddcpu: regulator-vddcpu {
134		compatible = "pwm-regulator";
135
136		regulator-name = "VDDCPU";
137		regulator-min-microvolt = <721000>;
138		regulator-max-microvolt = <1022000>;
139
140		pwm-supply = <&dc_in>;
141
142		pwms = <&pwm_AO_cd 1 1250 0>;
143		pwm-dutycycle-range = <100 0>;
144
145		regulator-boot-on;
146		regulator-always-on;
147	};
148
149	sound {
150		compatible = "amlogic,axg-sound-card";
151		model = "X96-MAX";
152		audio-aux-devs = <&tdmout_b>;
153		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
154				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
155				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
156				"TDM_B Playback", "TDMOUT_B OUT",
157				"SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
158				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
159				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
160
161		clocks = <&clkc CLKID_MPLL2>,
162			 <&clkc CLKID_MPLL0>,
163			 <&clkc CLKID_MPLL1>;
164
165		assigned-clocks = <&clkc CLKID_MPLL2>,
166				  <&clkc CLKID_MPLL0>,
167				  <&clkc CLKID_MPLL1>;
168		assigned-clock-parents = <0>, <0>, <0>;
169		assigned-clock-rates = <294912000>,
170				       <270950400>,
171				       <393216000>;
172
173		dai-link-0 {
174			sound-dai = <&frddr_a>;
175		};
176
177		dai-link-1 {
178			sound-dai = <&frddr_b>;
179		};
180
181		dai-link-2 {
182			sound-dai = <&frddr_c>;
183		};
184
185		/* 8ch hdmi interface */
186		dai-link-3 {
187			sound-dai = <&tdmif_b>;
188			dai-format = "i2s";
189			dai-tdm-slot-tx-mask-0 = <1 1>;
190			dai-tdm-slot-tx-mask-1 = <1 1>;
191			dai-tdm-slot-tx-mask-2 = <1 1>;
192			dai-tdm-slot-tx-mask-3 = <1 1>;
193			mclk-fs = <256>;
194
195			codec {
196				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
197			};
198		};
199
200		/* spdif hdmi or toslink interface */
201		dai-link-4 {
202			sound-dai = <&spdifout_a>;
203
204			codec-0 {
205				sound-dai = <&spdif_dit>;
206			};
207
208			codec-1 {
209				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
210			};
211		};
212
213		/* spdif hdmi interface */
214		dai-link-5 {
215			sound-dai = <&spdifout_b>;
216
217			codec {
218				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
219			};
220		};
221
222		/* hdmi glue */
223		dai-link-6 {
224			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
225
226			codec {
227				sound-dai = <&hdmi_tx>;
228			};
229		};
230	};
231
232	wifi32k: wifi32k {
233		compatible = "pwm-clock";
234		#clock-cells = <0>;
235		clock-frequency = <32768>;
236		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
237	};
238};
239
240&arb {
241	status = "okay";
242};
243
244&cec_AO {
245	pinctrl-0 = <&cec_ao_a_h_pins>;
246	pinctrl-names = "default";
247	status = "disabled";
248	hdmi-phandle = <&hdmi_tx>;
249};
250
251&cecb_AO {
252	pinctrl-0 = <&cec_ao_b_h_pins>;
253	pinctrl-names = "default";
254	status = "okay";
255	hdmi-phandle = <&hdmi_tx>;
256};
257
258&clkc_audio {
259	status = "okay";
260};
261
262&cpu0 {
263	cpu-supply = <&vddcpu>;
264	operating-points-v2 = <&cpu_opp_table>;
265	clocks = <&clkc CLKID_CPU_CLK>;
266	clock-latency = <50000>;
267};
268
269&cpu1 {
270	cpu-supply = <&vddcpu>;
271	operating-points-v2 = <&cpu_opp_table>;
272	clocks = <&clkc CLKID_CPU_CLK>;
273	clock-latency = <50000>;
274};
275
276&cpu2 {
277	cpu-supply = <&vddcpu>;
278	operating-points-v2 = <&cpu_opp_table>;
279	clocks = <&clkc CLKID_CPU_CLK>;
280	clock-latency = <50000>;
281};
282
283&cpu3 {
284	cpu-supply = <&vddcpu>;
285	operating-points-v2 = <&cpu_opp_table>;
286	clocks = <&clkc CLKID_CPU_CLK>;
287	clock-latency = <50000>;
288};
289
290&cvbs_vdac_port {
291	cvbs_vdac_out: endpoint {
292		remote-endpoint = <&cvbs_connector_in>;
293	};
294};
295
296&frddr_a {
297	status = "okay";
298};
299
300&frddr_b {
301	status = "okay";
302};
303
304&frddr_c {
305	status = "okay";
306};
307
308&hdmi_tx {
309	status = "okay";
310	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
311	pinctrl-names = "default";
312	hdmi-supply = <&vcc_5v>;
313};
314
315&hdmi_tx_tmds_port {
316	hdmi_tx_tmds_out: endpoint {
317		remote-endpoint = <&hdmi_connector_in>;
318	};
319};
320
321&ir {
322	status = "okay";
323	pinctrl-0 = <&remote_input_ao_pins>;
324	pinctrl-names = "default";
325	linux,rc-map-name = "rc-x96max";
326};
327
328&pwm_AO_cd {
329	pinctrl-0 = <&pwm_ao_d_e_pins>;
330	pinctrl-names = "default";
331	clocks = <&xtal>;
332	clock-names = "clkin1";
333	status = "okay";
334};
335
336&ext_mdio {
337	external_phy: ethernet-phy@0 {
338		/* Realtek RTL8211F (0x001cc916) */
339		reg = <0>;
340		max-speed = <1000>;
341		eee-broken-1000t;
342
343		reset-assert-us = <10000>;
344		reset-deassert-us = <80000>;
345		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
346
347		interrupt-parent = <&gpio_intc>;
348		/* MAC_INTR on GPIOZ_14 */
349		interrupts = <IRQID_GPIOZ_14 IRQ_TYPE_LEVEL_LOW>;
350	};
351};
352
353&ethmac {
354	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
355	pinctrl-names = "default";
356	status = "okay";
357	phy-mode = "rgmii";
358	phy-handle = <&external_phy>;
359	amlogic,tx-delay-ns = <2>;
360};
361
362&pwm_ef {
363	status = "okay";
364	pinctrl-0 = <&pwm_e_pins>;
365	pinctrl-names = "default";
366	clocks = <&xtal>;
367	clock-names = "clkin0";
368};
369
370&uart_A {
371	status = "okay";
372	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
373	pinctrl-names = "default";
374	uart-has-rtscts;
375
376	bluetooth {
377		compatible = "brcm,bcm43438-bt";
378		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
379		max-speed = <2000000>;
380		clocks = <&wifi32k>;
381		clock-names = "lpo";
382	};
383};
384
385&uart_AO {
386	status = "okay";
387	pinctrl-0 = <&uart_ao_a_pins>;
388	pinctrl-names = "default";
389};
390
391&usb {
392	status = "okay";
393	dr_mode = "host";
394};
395
396/* SDIO */
397&sd_emmc_a {
398	status = "okay";
399	pinctrl-0 = <&sdio_pins>;
400	pinctrl-1 = <&sdio_clk_gate_pins>;
401	pinctrl-names = "default", "clk-gate";
402	#address-cells = <1>;
403	#size-cells = <0>;
404
405	bus-width = <4>;
406	cap-sd-highspeed;
407	sd-uhs-sdr50;
408	max-frequency = <100000000>;
409
410	non-removable;
411	disable-wp;
412
413	/* WiFi firmware requires power to be kept while in suspend */
414	keep-power-in-suspend;
415
416	mmc-pwrseq = <&sdio_pwrseq>;
417
418	vmmc-supply = <&vddao_3v3>;
419	vqmmc-supply = <&vddao_1v8>;
420
421	brcmf: wifi@1 {
422		reg = <1>;
423		compatible = "brcm,bcm4329-fmac";
424	};
425};
426
427/* SD card */
428&sd_emmc_b {
429	status = "okay";
430	pinctrl-0 = <&sdcard_c_pins>;
431	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
432	pinctrl-names = "default", "clk-gate";
433
434	bus-width = <4>;
435	cap-sd-highspeed;
436	max-frequency = <100000000>;
437	disable-wp;
438
439	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
440	vmmc-supply = <&vddao_3v3>;
441	vqmmc-supply = <&vddao_3v3>;
442};
443
444/* eMMC */
445&sd_emmc_c {
446	status = "okay";
447	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
448	pinctrl-1 = <&emmc_clk_gate_pins>;
449	pinctrl-names = "default", "clk-gate";
450
451	bus-width = <8>;
452	cap-mmc-highspeed;
453	max-frequency = <100000000>;
454	non-removable;
455	disable-wp;
456
457	mmc-pwrseq = <&emmc_pwrseq>;
458	vmmc-supply = <&vcc_3v3>;
459	vqmmc-supply = <&flash_1v8>;
460};
461
462&spdifout_a {
463	pinctrl-0 = <&spdif_out_h_pins>;
464	pinctrl-names = "default";
465	status = "okay";
466};
467
468&spdifout_b {
469	status = "okay";
470};
471
472&tdmif_b {
473	status = "okay";
474};
475
476&tdmout_b {
477	status = "okay";
478};
479
480&tohdmitx {
481	status = "okay";
482};
483