1# SPDX-License-Identifier: GPL-2.0-only 2config CSKY 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAS_DMA_PREP_COHERENT 7 select ARCH_HAS_GCOV_PROFILE_ALL 8 select ARCH_HAS_SYNC_DMA_FOR_CPU 9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 10 select ARCH_USE_BUILTIN_BSWAP 11 select ARCH_USE_QUEUED_RWLOCKS 12 select ARCH_USE_QUEUED_SPINLOCKS 13 select ARCH_HAS_CURRENT_STACK_POINTER 14 select ARCH_INLINE_READ_LOCK if !PREEMPTION 15 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 16 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 17 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 18 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 19 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 20 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 21 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 22 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 23 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 24 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 25 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 26 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 27 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 28 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 29 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 30 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 31 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 32 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 33 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 34 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 35 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 36 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 37 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 38 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 39 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 40 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace) 41 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 42 select COMMON_CLK 43 select CLKSRC_MMIO 44 select CSKY_MPINTC if CPU_CK860 45 select CSKY_MP_TIMER if CPU_CK860 46 select CSKY_APB_INTC 47 select DMA_DIRECT_REMAP 48 select IRQ_DOMAIN 49 select DW_APB_TIMER_OF 50 select GENERIC_IOREMAP 51 select GENERIC_LIB_ASHLDI3 52 select GENERIC_LIB_ASHRDI3 53 select GENERIC_LIB_LSHRDI3 54 select GENERIC_LIB_MULDI3 55 select GENERIC_LIB_CMPDI2 56 select GENERIC_LIB_UCMPDI2 57 select GENERIC_ALLOCATOR 58 select GENERIC_ATOMIC64 59 select GENERIC_CPU_DEVICES 60 select GENERIC_IRQ_CHIP 61 select GENERIC_IRQ_PROBE 62 select GENERIC_IRQ_SHOW 63 select GENERIC_IRQ_MULTI_HANDLER 64 select GENERIC_SCHED_CLOCK 65 select GENERIC_SMP_IDLE_THREAD 66 select GENERIC_TIME_VSYSCALL 67 select GENERIC_VDSO_32 68 select GENERIC_GETTIMEOFDAY 69 select GX6605S_TIMER if CPU_CK610 70 select HAVE_ARCH_TRACEHOOK 71 select HAVE_ARCH_AUDITSYSCALL 72 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610 73 select HAVE_ARCH_JUMP_LABEL_RELATIVE 74 select HAVE_ARCH_MMAP_RND_BITS 75 select HAVE_ARCH_SECCOMP_FILTER 76 select HAVE_CONTEXT_TRACKING_USER 77 select HAVE_VIRT_CPU_ACCOUNTING_GEN 78 select HAVE_DEBUG_BUGVERBOSE 79 select HAVE_DEBUG_KMEMLEAK 80 select HAVE_DYNAMIC_FTRACE 81 select HAVE_DYNAMIC_FTRACE_WITH_REGS 82 select HAVE_GENERIC_VDSO 83 select HAVE_FUNCTION_TRACER 84 select HAVE_FUNCTION_GRAPH_TRACER 85 select HAVE_FUNCTION_ERROR_INJECTION 86 select HAVE_FTRACE_MCOUNT_RECORD 87 select HAVE_KERNEL_GZIP 88 select HAVE_KERNEL_LZO 89 select HAVE_KERNEL_LZMA 90 select HAVE_KPROBES if !CPU_CK610 91 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610 92 select HAVE_KRETPROBES if !CPU_CK610 93 select HAVE_PAGE_SIZE_4KB 94 select HAVE_PERF_EVENTS 95 select HAVE_PERF_REGS 96 select HAVE_PERF_USER_STACK_DUMP 97 select HAVE_DMA_CONTIGUOUS 98 select HAVE_REGS_AND_STACK_ACCESS_API 99 select HAVE_STACKPROTECTOR 100 select HAVE_SYSCALL_TRACEPOINTS 101 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU 102 select LOCK_MM_AND_FIND_VMA 103 select MAY_HAVE_SPARSE_IRQ 104 select MODULES_USE_ELF_RELA if MODULES 105 select OF 106 select OF_EARLY_FLATTREE 107 select PERF_USE_VMALLOC if CPU_CK610 108 select RTC_LIB 109 select TIMER_OF 110 select GENERIC_PCI_IOMAP 111 select HAVE_PCI 112 select PCI_DOMAINS_GENERIC if PCI 113 select PCI_SYSCALL if PCI 114 select PCI_MSI if PCI 115 select TRACE_IRQFLAGS_SUPPORT 116 117config LOCKDEP_SUPPORT 118 def_bool y 119 120config ARCH_SUPPORTS_UPROBES 121 def_bool y if !CPU_CK610 122 123config CPU_HAS_CACHEV2 124 bool 125 126config CPU_HAS_FPUV2 127 bool 128 129config CPU_HAS_HILO 130 bool 131 132config CPU_HAS_TLBI 133 bool 134 135config CPU_HAS_LDSTEX 136 bool 137 help 138 For SMP, CPU needs "ldex&stex" instructions for atomic operations. 139 140config CPU_NEED_TLBSYNC 141 bool 142 143config CPU_NEED_SOFTALIGN 144 bool 145 146config CPU_NO_USER_BKPT 147 bool 148 help 149 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because 150 abiv2 is 16/32bit instruction set and "trap 1" is 32bit. 151 So we need a 16bit instruction as user space bkpt, and it will cause an illegal 152 instruction exception. 153 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. 154 155config GENERIC_CALIBRATE_DELAY 156 def_bool y 157 158config GENERIC_CSUM 159 def_bool y 160 161config GENERIC_HWEIGHT 162 def_bool y 163 164config MMU 165 def_bool y 166 167config STACKTRACE_SUPPORT 168 def_bool y 169 170config TIME_LOW_RES 171 def_bool y 172 173config CPU_ASID_BITS 174 int 175 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 176 default "12" if (CPU_CK860) 177 178config L1_CACHE_SHIFT 179 int 180 default "4" if (CPU_CK610) 181 default "5" if (CPU_CK807 || CPU_CK810) 182 default "6" if (CPU_CK860) 183 184config ARCH_MMAP_RND_BITS_MIN 185 default 8 186 187# max bits determined by the following formula: 188# VA_BITS - PAGE_SHIFT - 3 189config ARCH_MMAP_RND_BITS_MAX 190 default 17 191 192menu "Processor type and features" 193 194choice 195 prompt "CPU MODEL" 196 default CPU_CK807 197 198config CPU_CK610 199 bool "CSKY CPU ck610" 200 select CPU_NEED_TLBSYNC 201 select CPU_NEED_SOFTALIGN 202 select CPU_NO_USER_BKPT 203 204config CPU_CK810 205 bool "CSKY CPU ck810" 206 select CPU_HAS_HILO 207 select CPU_NEED_TLBSYNC 208 209config CPU_CK807 210 bool "CSKY CPU ck807" 211 select CPU_HAS_HILO 212 213config CPU_CK860 214 bool "CSKY CPU ck860" 215 select CPU_HAS_TLBI 216 select CPU_HAS_CACHEV2 217 select CPU_HAS_LDSTEX 218 select CPU_HAS_FPUV2 219endchoice 220 221choice 222 prompt "PAGE OFFSET" 223 default PAGE_OFFSET_80000000 224 225config PAGE_OFFSET_80000000 226 bool "PAGE OFFSET 2G (user:kernel = 2:2)" 227 228config PAGE_OFFSET_A0000000 229 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)" 230endchoice 231 232config PAGE_OFFSET 233 hex 234 default 0x80000000 if PAGE_OFFSET_80000000 235 default 0xa0000000 if PAGE_OFFSET_A0000000 236choice 237 238 prompt "C-SKY PMU type" 239 depends on PERF_EVENTS 240 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 241 242config CPU_PMU_NONE 243 bool "None" 244 245config CSKY_PMU_V1 246 bool "Performance Monitoring Unit Ver.1" 247 248endchoice 249 250choice 251 prompt "Power Manager Instruction (wait/doze/stop)" 252 default CPU_PM_NONE 253 254config CPU_PM_NONE 255 bool "None" 256 257config CPU_PM_WAIT 258 bool "wait" 259 260config CPU_PM_DOZE 261 bool "doze" 262 263config CPU_PM_STOP 264 bool "stop" 265endchoice 266 267menuconfig HAVE_TCM 268 bool "Tightly-Coupled/Sram Memory" 269 depends on !COMPILE_TEST 270 help 271 The implementation are not only used by TCM (Tightly-Coupled Memory) 272 but also used by sram on SOC bus. It follow existed linux tcm 273 software interface, so that old tcm application codes could be 274 re-used directly. 275 276if HAVE_TCM 277config ITCM_RAM_BASE 278 hex "ITCM ram base" 279 default 0xffffffff 280 281config ITCM_NR_PAGES 282 int "Page count of ITCM size: NR*4KB" 283 range 1 256 284 default 32 285 286config HAVE_DTCM 287 bool "DTCM Support" 288 289config DTCM_RAM_BASE 290 hex "DTCM ram base" 291 depends on HAVE_DTCM 292 default 0xffffffff 293 294config DTCM_NR_PAGES 295 int "Page count of DTCM size: NR*4KB" 296 depends on HAVE_DTCM 297 range 1 256 298 default 32 299endif 300 301config CPU_HAS_VDSP 302 bool "CPU has VDSP coprocessor" 303 depends on CPU_HAS_FPU && CPU_HAS_FPUV2 304 305config CPU_HAS_FPU 306 bool "CPU has FPU coprocessor" 307 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 308 309config CPU_HAS_ICACHE_INS 310 bool "CPU has Icache invalidate instructions" 311 depends on CPU_HAS_CACHEV2 312 313config CPU_HAS_TEE 314 bool "CPU has Trusted Execution Environment" 315 depends on CPU_CK810 316 317config SMP 318 bool "Symmetric Multi-Processing (SMP) support for C-SKY" 319 depends on CPU_CK860 320 default n 321 322config NR_CPUS 323 int "Maximum number of CPUs (2-32)" 324 range 2 32 325 depends on SMP 326 default "4" 327 328config HIGHMEM 329 bool "High Memory Support" 330 depends on !CPU_CK610 331 select KMAP_LOCAL 332 default y 333 334config DRAM_BASE 335 hex "DRAM start addr (the same with memory-section in dts)" 336 default 0x0 337 338config HOTPLUG_CPU 339 bool "Support for hot-pluggable CPUs" 340 select GENERIC_IRQ_MIGRATION 341 depends on SMP 342 help 343 Say Y here to allow turning CPUs off and on. CPUs can be 344 controlled through /sys/devices/system/cpu/cpu1/hotplug/target. 345 346 Say N if you want to disable CPU hotplug. 347 348config HAVE_EFFICIENT_UNALIGNED_STRING_OPS 349 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2" 350 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 351 help 352 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could 353 deal with unaligned access by hardware. 354 355endmenu 356 357source "arch/csky/Kconfig.platforms" 358 359source "kernel/Kconfig.hz" 360