1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/gpio-keys.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 13#include "x1e80100.dtsi" 14#include "x1e80100-pmics.dtsi" 15 16/ { 17 model = "Qualcomm Technologies, Inc. X1E80100 CRD"; 18 compatible = "qcom,x1e80100-crd", "qcom,x1e80100"; 19 20 aliases { 21 serial0 = &uart21; 22 }; 23 24 wcd938x: audio-codec { 25 compatible = "qcom,wcd9385-codec"; 26 27 pinctrl-names = "default"; 28 pinctrl-0 = <&wcd_default>; 29 30 qcom,micbias1-microvolt = <1800000>; 31 qcom,micbias2-microvolt = <1800000>; 32 qcom,micbias3-microvolt = <1800000>; 33 qcom,micbias4-microvolt = <1800000>; 34 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 35 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 36 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 37 qcom,rx-device = <&wcd_rx>; 38 qcom,tx-device = <&wcd_tx>; 39 40 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; 41 42 vdd-buck-supply = <&vreg_l15b_1p8>; 43 vdd-rxtx-supply = <&vreg_l15b_1p8>; 44 vdd-io-supply = <&vreg_l15b_1p8>; 45 vdd-mic-bias-supply = <&vreg_bob1>; 46 47 #sound-dai-cells = <1>; 48 }; 49 50 chosen { 51 stdout-path = "serial0:115200n8"; 52 }; 53 54 gpio-keys { 55 compatible = "gpio-keys"; 56 57 pinctrl-0 = <&hall_int_n_default>; 58 pinctrl-names = "default"; 59 60 switch-lid { 61 gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; 62 linux,input-type = <EV_SW>; 63 linux,code = <SW_LID>; 64 wakeup-source; 65 wakeup-event-action = <EV_ACT_DEASSERTED>; 66 }; 67 }; 68 69 pmic-glink { 70 compatible = "qcom,x1e80100-pmic-glink", 71 "qcom,sm8550-pmic-glink", 72 "qcom,pmic-glink"; 73 #address-cells = <1>; 74 #size-cells = <0>; 75 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 76 <&tlmm 123 GPIO_ACTIVE_HIGH>, 77 <&tlmm 125 GPIO_ACTIVE_HIGH>; 78 79 /* Left-side rear port */ 80 connector@0 { 81 compatible = "usb-c-connector"; 82 reg = <0>; 83 power-role = "dual"; 84 data-role = "dual"; 85 86 ports { 87 #address-cells = <1>; 88 #size-cells = <0>; 89 90 port@0 { 91 reg = <0>; 92 93 pmic_glink_ss0_hs_in: endpoint { 94 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 95 }; 96 }; 97 98 port@1 { 99 reg = <1>; 100 101 pmic_glink_ss0_ss_in: endpoint { 102 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 103 }; 104 }; 105 }; 106 }; 107 108 /* Left-side front port */ 109 connector@1 { 110 compatible = "usb-c-connector"; 111 reg = <1>; 112 power-role = "dual"; 113 data-role = "dual"; 114 115 ports { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 119 port@0 { 120 reg = <0>; 121 122 pmic_glink_ss1_hs_in: endpoint { 123 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 124 }; 125 }; 126 127 port@1 { 128 reg = <1>; 129 130 pmic_glink_ss1_ss_in: endpoint { 131 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 132 }; 133 }; 134 }; 135 }; 136 137 /* Right-side port */ 138 connector@2 { 139 compatible = "usb-c-connector"; 140 reg = <2>; 141 power-role = "dual"; 142 data-role = "dual"; 143 144 ports { 145 #address-cells = <1>; 146 #size-cells = <0>; 147 148 port@0 { 149 reg = <0>; 150 151 pmic_glink_ss2_hs_in: endpoint { 152 remote-endpoint = <&usb_1_ss2_dwc3_hs>; 153 }; 154 }; 155 156 port@1 { 157 reg = <1>; 158 159 pmic_glink_ss2_ss_in: endpoint { 160 remote-endpoint = <&usb_1_ss2_qmpphy_out>; 161 }; 162 }; 163 }; 164 }; 165 }; 166 167 reserved-memory { 168 linux,cma { 169 compatible = "shared-dma-pool"; 170 size = <0x0 0x8000000>; 171 reusable; 172 linux,cma-default; 173 }; 174 }; 175 176 sound { 177 compatible = "qcom,x1e80100-sndcard"; 178 model = "X1E80100-CRD"; 179 audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT", 180 "TwitterLeft IN", "WSA WSA_SPK2 OUT", 181 "WooferRight IN", "WSA2 WSA_SPK2 OUT", 182 "TwitterRight IN", "WSA2 WSA_SPK2 OUT", 183 "IN1_HPHL", "HPHL_OUT", 184 "IN2_HPHR", "HPHR_OUT", 185 "AMIC2", "MIC BIAS2", 186 "VA DMIC0", "MIC BIAS3", 187 "VA DMIC1", "MIC BIAS3", 188 "VA DMIC2", "MIC BIAS1", 189 "VA DMIC3", "MIC BIAS1", 190 "VA DMIC0", "VA MIC BIAS3", 191 "VA DMIC1", "VA MIC BIAS3", 192 "VA DMIC2", "VA MIC BIAS1", 193 "VA DMIC3", "VA MIC BIAS1", 194 "TX SWR_INPUT1", "ADC2_OUTPUT"; 195 196 wcd-playback-dai-link { 197 link-name = "WCD Playback"; 198 199 cpu { 200 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 201 }; 202 203 codec { 204 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 205 }; 206 207 platform { 208 sound-dai = <&q6apm>; 209 }; 210 }; 211 212 wcd-capture-dai-link { 213 link-name = "WCD Capture"; 214 215 cpu { 216 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 217 }; 218 219 codec { 220 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 221 }; 222 223 platform { 224 sound-dai = <&q6apm>; 225 }; 226 }; 227 228 wsa-dai-link { 229 link-name = "WSA Playback"; 230 231 cpu { 232 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 233 }; 234 235 codec { 236 sound-dai = <&left_woofer>, <&left_tweeter>, 237 <&swr0 0>, <&lpass_wsamacro 0>, 238 <&right_woofer>, <&right_tweeter>, 239 <&swr3 0>, <&lpass_wsa2macro 0>; 240 }; 241 242 platform { 243 sound-dai = <&q6apm>; 244 }; 245 }; 246 247 va-dai-link { 248 link-name = "VA Capture"; 249 250 cpu { 251 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 252 }; 253 254 codec { 255 sound-dai = <&lpass_vamacro 0>; 256 }; 257 258 platform { 259 sound-dai = <&q6apm>; 260 }; 261 }; 262 }; 263 264 vph_pwr: vph-pwr-regulator { 265 compatible = "regulator-fixed"; 266 267 regulator-name = "vph_pwr"; 268 regulator-min-microvolt = <3700000>; 269 regulator-max-microvolt = <3700000>; 270 271 regulator-always-on; 272 regulator-boot-on; 273 }; 274 275 vreg_edp_3p3: regulator-edp-3p3 { 276 compatible = "regulator-fixed"; 277 278 regulator-name = "VREG_EDP_3P3"; 279 regulator-min-microvolt = <3300000>; 280 regulator-max-microvolt = <3300000>; 281 282 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 283 enable-active-high; 284 285 pinctrl-0 = <&edp_reg_en>; 286 pinctrl-names = "default"; 287 288 regulator-boot-on; 289 }; 290 291 vreg_nvme: regulator-nvme { 292 compatible = "regulator-fixed"; 293 294 regulator-name = "VREG_NVME_3P3"; 295 regulator-min-microvolt = <3300000>; 296 regulator-max-microvolt = <3300000>; 297 298 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 299 enable-active-high; 300 301 pinctrl-names = "default"; 302 pinctrl-0 = <&nvme_reg_en>; 303 }; 304 305 vreg_wwan: regulator-wwan { 306 compatible = "regulator-fixed"; 307 308 regulator-name = "SDX_VPH_PWR"; 309 regulator-min-microvolt = <3300000>; 310 regulator-max-microvolt = <3300000>; 311 312 gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; 313 enable-active-high; 314 315 pinctrl-0 = <&wwan_sw_en>; 316 pinctrl-names = "default"; 317 318 regulator-boot-on; 319 }; 320}; 321 322&apps_rsc { 323 regulators-0 { 324 compatible = "qcom,pm8550-rpmh-regulators"; 325 qcom,pmic-id = "b"; 326 327 vdd-bob1-supply = <&vph_pwr>; 328 vdd-bob2-supply = <&vph_pwr>; 329 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 330 vdd-l2-l13-l14-supply = <&vreg_bob1>; 331 vdd-l5-l16-supply = <&vreg_bob1>; 332 vdd-l6-l7-supply = <&vreg_bob2>; 333 vdd-l8-l9-supply = <&vreg_bob1>; 334 vdd-l12-supply = <&vreg_s5j_1p2>; 335 vdd-l15-supply = <&vreg_s4c_1p8>; 336 vdd-l17-supply = <&vreg_bob2>; 337 338 vreg_bob1: bob1 { 339 regulator-name = "vreg_bob1"; 340 regulator-min-microvolt = <3008000>; 341 regulator-max-microvolt = <3960000>; 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 343 }; 344 345 vreg_bob2: bob2 { 346 regulator-name = "vreg_bob2"; 347 regulator-min-microvolt = <2504000>; 348 regulator-max-microvolt = <3008000>; 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 350 }; 351 352 vreg_l1b_1p8: ldo1 { 353 regulator-name = "vreg_l1b_1p8"; 354 regulator-min-microvolt = <1800000>; 355 regulator-max-microvolt = <1800000>; 356 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 357 }; 358 359 vreg_l2b_3p0: ldo2 { 360 regulator-name = "vreg_l2b_3p0"; 361 regulator-min-microvolt = <3072000>; 362 regulator-max-microvolt = <3100000>; 363 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 364 }; 365 366 vreg_l4b_1p8: ldo4 { 367 regulator-name = "vreg_l4b_1p8"; 368 regulator-min-microvolt = <1800000>; 369 regulator-max-microvolt = <1800000>; 370 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 371 }; 372 373 vreg_l5b_3p0: ldo5 { 374 regulator-name = "vreg_l5b_3p0"; 375 regulator-min-microvolt = <3000000>; 376 regulator-max-microvolt = <3000000>; 377 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 378 }; 379 380 vreg_l6b_1p8: ldo6 { 381 regulator-name = "vreg_l6b_1p8"; 382 regulator-min-microvolt = <1800000>; 383 regulator-max-microvolt = <2960000>; 384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 385 }; 386 387 vreg_l7b_2p8: ldo7 { 388 regulator-name = "vreg_l7b_2p8"; 389 regulator-min-microvolt = <2800000>; 390 regulator-max-microvolt = <2800000>; 391 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 392 }; 393 394 vreg_l8b_3p0: ldo8 { 395 regulator-name = "vreg_l8b_3p0"; 396 regulator-min-microvolt = <3072000>; 397 regulator-max-microvolt = <3072000>; 398 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 399 }; 400 401 vreg_l9b_2p9: ldo9 { 402 regulator-name = "vreg_l9b_2p9"; 403 regulator-min-microvolt = <2960000>; 404 regulator-max-microvolt = <2960000>; 405 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 406 }; 407 408 vreg_l10b_1p8: ldo10 { 409 regulator-name = "vreg_l10b_1p8"; 410 regulator-min-microvolt = <1800000>; 411 regulator-max-microvolt = <1800000>; 412 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 413 }; 414 415 vreg_l12b_1p2: ldo12 { 416 regulator-name = "vreg_l12b_1p2"; 417 regulator-min-microvolt = <1200000>; 418 regulator-max-microvolt = <1200000>; 419 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 420 }; 421 422 vreg_l13b_3p0: ldo13 { 423 regulator-name = "vreg_l13b_3p0"; 424 regulator-min-microvolt = <3072000>; 425 regulator-max-microvolt = <3100000>; 426 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 427 }; 428 429 vreg_l14b_3p0: ldo14 { 430 regulator-name = "vreg_l14b_3p0"; 431 regulator-min-microvolt = <3072000>; 432 regulator-max-microvolt = <3072000>; 433 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 434 }; 435 436 vreg_l15b_1p8: ldo15 { 437 regulator-name = "vreg_l15b_1p8"; 438 regulator-min-microvolt = <1800000>; 439 regulator-max-microvolt = <1800000>; 440 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 441 }; 442 443 vreg_l16b_2p9: ldo16 { 444 regulator-name = "vreg_l16b_2p9"; 445 regulator-min-microvolt = <2912000>; 446 regulator-max-microvolt = <2912000>; 447 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 448 }; 449 450 vreg_l17b_2p5: ldo17 { 451 regulator-name = "vreg_l17b_2p5"; 452 regulator-min-microvolt = <2504000>; 453 regulator-max-microvolt = <2504000>; 454 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 455 }; 456 }; 457 458 regulators-1 { 459 compatible = "qcom,pm8550ve-rpmh-regulators"; 460 qcom,pmic-id = "c"; 461 462 vdd-l1-supply = <&vreg_s5j_1p2>; 463 vdd-l2-supply = <&vreg_s1f_0p7>; 464 vdd-l3-supply = <&vreg_s1f_0p7>; 465 vdd-s4-supply = <&vph_pwr>; 466 467 vreg_s4c_1p8: smps4 { 468 regulator-name = "vreg_s4c_1p8"; 469 regulator-min-microvolt = <1856000>; 470 regulator-max-microvolt = <2000000>; 471 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 472 }; 473 474 vreg_l1c_1p2: ldo1 { 475 regulator-name = "vreg_l1c_1p2"; 476 regulator-min-microvolt = <1200000>; 477 regulator-max-microvolt = <1200000>; 478 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 479 }; 480 481 vreg_l2c_0p8: ldo2 { 482 regulator-name = "vreg_l2c_0p8"; 483 regulator-min-microvolt = <880000>; 484 regulator-max-microvolt = <920000>; 485 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 486 }; 487 488 vreg_l3c_0p8: ldo3 { 489 regulator-name = "vreg_l3c_0p8"; 490 regulator-min-microvolt = <880000>; 491 regulator-max-microvolt = <920000>; 492 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 493 }; 494 }; 495 496 regulators-2 { 497 compatible = "qcom,pmc8380-rpmh-regulators"; 498 qcom,pmic-id = "d"; 499 500 vdd-l1-supply = <&vreg_s1f_0p7>; 501 vdd-l2-supply = <&vreg_s1f_0p7>; 502 vdd-l3-supply = <&vreg_s4c_1p8>; 503 vdd-s1-supply = <&vph_pwr>; 504 505 vreg_l1d_0p8: ldo1 { 506 regulator-name = "vreg_l1d_0p8"; 507 regulator-min-microvolt = <880000>; 508 regulator-max-microvolt = <920000>; 509 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 510 }; 511 512 vreg_l2d_0p9: ldo2 { 513 regulator-name = "vreg_l2d_0p9"; 514 regulator-min-microvolt = <912000>; 515 regulator-max-microvolt = <920000>; 516 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 517 }; 518 519 vreg_l3d_1p8: ldo3 { 520 regulator-name = "vreg_l3d_1p8"; 521 regulator-min-microvolt = <1800000>; 522 regulator-max-microvolt = <1800000>; 523 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 524 }; 525 }; 526 527 regulators-3 { 528 compatible = "qcom,pmc8380-rpmh-regulators"; 529 qcom,pmic-id = "e"; 530 531 vdd-l2-supply = <&vreg_s1f_0p7>; 532 vdd-l3-supply = <&vreg_s5j_1p2>; 533 534 vreg_l2e_0p8: ldo2 { 535 regulator-name = "vreg_l2e_0p8"; 536 regulator-min-microvolt = <880000>; 537 regulator-max-microvolt = <920000>; 538 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 539 }; 540 541 vreg_l3e_1p2: ldo3 { 542 regulator-name = "vreg_l3e_1p2"; 543 regulator-min-microvolt = <1200000>; 544 regulator-max-microvolt = <1200000>; 545 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 546 }; 547 }; 548 549 regulators-4 { 550 compatible = "qcom,pmc8380-rpmh-regulators"; 551 qcom,pmic-id = "f"; 552 553 vdd-l1-supply = <&vreg_s5j_1p2>; 554 vdd-l2-supply = <&vreg_s5j_1p2>; 555 vdd-l3-supply = <&vreg_s5j_1p2>; 556 vdd-s1-supply = <&vph_pwr>; 557 558 vreg_s1f_0p7: smps1 { 559 regulator-name = "vreg_s1f_0p7"; 560 regulator-min-microvolt = <700000>; 561 regulator-max-microvolt = <1100000>; 562 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 563 }; 564 565 vreg_l1f_1p0: ldo1 { 566 regulator-name = "vreg_l1f_1p0"; 567 regulator-min-microvolt = <1024000>; 568 regulator-max-microvolt = <1024000>; 569 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 570 }; 571 572 vreg_l2f_1p0: ldo2 { 573 regulator-name = "vreg_l2f_1p0"; 574 regulator-min-microvolt = <1024000>; 575 regulator-max-microvolt = <1024000>; 576 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 577 }; 578 579 vreg_l3f_1p0: ldo3 { 580 regulator-name = "vreg_l3f_1p0"; 581 regulator-min-microvolt = <1024000>; 582 regulator-max-microvolt = <1024000>; 583 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 584 }; 585 }; 586 587 regulators-6 { 588 compatible = "qcom,pm8550ve-rpmh-regulators"; 589 qcom,pmic-id = "i"; 590 591 vdd-l1-supply = <&vreg_s4c_1p8>; 592 vdd-l2-supply = <&vreg_s5j_1p2>; 593 vdd-l3-supply = <&vreg_s1f_0p7>; 594 vdd-s1-supply = <&vph_pwr>; 595 vdd-s2-supply = <&vph_pwr>; 596 597 vreg_s1i_0p9: smps1 { 598 regulator-name = "vreg_s1i_0p9"; 599 regulator-min-microvolt = <900000>; 600 regulator-max-microvolt = <920000>; 601 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 602 }; 603 604 vreg_s2i_1p0: smps2 { 605 regulator-name = "vreg_s2i_1p0"; 606 regulator-min-microvolt = <1000000>; 607 regulator-max-microvolt = <1100000>; 608 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 609 }; 610 611 vreg_l1i_1p8: ldo1 { 612 regulator-name = "vreg_l1i_1p8"; 613 regulator-min-microvolt = <1800000>; 614 regulator-max-microvolt = <1800000>; 615 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 616 }; 617 618 vreg_l2i_1p2: ldo2 { 619 regulator-name = "vreg_l2i_1p2"; 620 regulator-min-microvolt = <1200000>; 621 regulator-max-microvolt = <1200000>; 622 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 623 }; 624 625 vreg_l3i_0p8: ldo3 { 626 regulator-name = "vreg_l3i_0p8"; 627 regulator-min-microvolt = <880000>; 628 regulator-max-microvolt = <920000>; 629 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 630 }; 631 }; 632 633 regulators-7 { 634 compatible = "qcom,pm8550ve-rpmh-regulators"; 635 qcom,pmic-id = "j"; 636 637 vdd-l1-supply = <&vreg_s1f_0p7>; 638 vdd-l2-supply = <&vreg_s5j_1p2>; 639 vdd-l3-supply = <&vreg_s1f_0p7>; 640 vdd-s5-supply = <&vph_pwr>; 641 642 vreg_s5j_1p2: smps5 { 643 regulator-name = "vreg_s5j_1p2"; 644 regulator-min-microvolt = <1256000>; 645 regulator-max-microvolt = <1304000>; 646 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 647 }; 648 649 vreg_l1j_0p8: ldo1 { 650 regulator-name = "vreg_l1j_0p8"; 651 regulator-min-microvolt = <880000>; 652 regulator-max-microvolt = <920000>; 653 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 654 }; 655 656 vreg_l2j_1p2: ldo2 { 657 regulator-name = "vreg_l2j_1p2"; 658 regulator-min-microvolt = <1200000>; 659 regulator-max-microvolt = <1200000>; 660 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 661 }; 662 663 vreg_l3j_0p8: ldo3 { 664 regulator-name = "vreg_l3j_0p8"; 665 regulator-min-microvolt = <880000>; 666 regulator-max-microvolt = <920000>; 667 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 668 }; 669 }; 670}; 671 672&gpu { 673 status = "okay"; 674 675 zap-shader { 676 firmware-name = "qcom/x1e80100/gen70500_zap.mbn"; 677 }; 678}; 679 680&i2c0 { 681 clock-frequency = <400000>; 682 683 status = "okay"; 684 685 touchpad@15 { 686 compatible = "hid-over-i2c"; 687 reg = <0x15>; 688 689 hid-descr-addr = <0x1>; 690 interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; 691 692 pinctrl-0 = <&tpad_default>; 693 pinctrl-names = "default"; 694 695 wakeup-source; 696 }; 697 698 keyboard@3a { 699 compatible = "hid-over-i2c"; 700 reg = <0x3a>; 701 702 hid-descr-addr = <0x1>; 703 interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; 704 705 pinctrl-0 = <&kybd_default>; 706 pinctrl-names = "default"; 707 708 wakeup-source; 709 }; 710}; 711 712&i2c8 { 713 clock-frequency = <400000>; 714 715 status = "okay"; 716 717 touchscreen@10 { 718 compatible = "hid-over-i2c"; 719 reg = <0x10>; 720 721 hid-descr-addr = <0x1>; 722 interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; 723 724 pinctrl-0 = <&ts0_default>; 725 pinctrl-names = "default"; 726 }; 727}; 728 729&lpass_tlmm { 730 spkr_01_sd_n_active: spkr-01-sd-n-active-state { 731 pins = "gpio12"; 732 function = "gpio"; 733 drive-strength = <16>; 734 bias-disable; 735 output-low; 736 }; 737 738 spkr_23_sd_n_active: spkr-23-sd-n-active-state { 739 pins = "gpio13"; 740 function = "gpio"; 741 drive-strength = <16>; 742 bias-disable; 743 output-low; 744 }; 745}; 746 747&lpass_vamacro { 748 pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 749 pinctrl-names = "default"; 750 751 vdd-micb-supply = <&vreg_l1b_1p8>; 752 qcom,dmic-sample-rate = <4800000>; 753}; 754 755&mdss { 756 status = "okay"; 757}; 758 759&mdss_dp3 { 760 compatible = "qcom,x1e80100-dp"; 761 /delete-property/ #sound-dai-cells; 762 763 status = "okay"; 764 765 aux-bus { 766 panel { 767 compatible = "samsung,atna45af01", "samsung,atna33xc20"; 768 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; 769 power-supply = <&vreg_edp_3p3>; 770 771 pinctrl-0 = <&edp_bl_en>; 772 pinctrl-names = "default"; 773 774 port { 775 edp_panel_in: endpoint { 776 remote-endpoint = <&mdss_dp3_out>; 777 }; 778 }; 779 }; 780 }; 781 782 ports { 783 port@1 { 784 reg = <1>; 785 mdss_dp3_out: endpoint { 786 data-lanes = <0 1 2 3>; 787 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 788 789 remote-endpoint = <&edp_panel_in>; 790 }; 791 }; 792 }; 793}; 794 795&mdss_dp3_phy { 796 vdda-phy-supply = <&vreg_l3j_0p8>; 797 vdda-pll-supply = <&vreg_l2j_1p2>; 798 799 status = "okay"; 800}; 801 802&pcie4 { 803 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; 804 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; 805 806 pinctrl-0 = <&pcie4_default>; 807 pinctrl-names = "default"; 808 809 status = "okay"; 810}; 811 812&pcie4_phy { 813 vdda-phy-supply = <&vreg_l3i_0p8>; 814 vdda-pll-supply = <&vreg_l3e_1p2>; 815 816 status = "okay"; 817}; 818 819&pcie5 { 820 perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; 821 wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; 822 823 vddpe-3v3-supply = <&vreg_wwan>; 824 825 pinctrl-0 = <&pcie5_default>; 826 pinctrl-names = "default"; 827 828 status = "okay"; 829}; 830 831&pcie5_phy { 832 vdda-phy-supply = <&vreg_l3i_0p8>; 833 vdda-pll-supply = <&vreg_l3e_1p2>; 834 835 status = "okay"; 836}; 837 838&pcie6a { 839 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 840 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 841 842 vddpe-3v3-supply = <&vreg_nvme>; 843 844 pinctrl-names = "default"; 845 pinctrl-0 = <&pcie6a_default>; 846 847 status = "okay"; 848}; 849 850&pcie6a_phy { 851 vdda-phy-supply = <&vreg_l1d_0p8>; 852 vdda-pll-supply = <&vreg_l2j_1p2>; 853 854 status = "okay"; 855}; 856 857&pmc8380_3_gpios { 858 edp_bl_en: edp-bl-en-state { 859 pins = "gpio4"; 860 function = "normal"; 861 power-source = <1>; /* 1.8V */ 862 input-disable; 863 output-enable; 864 }; 865}; 866 867&qupv3_0 { 868 status = "okay"; 869}; 870 871&qupv3_1 { 872 status = "okay"; 873}; 874 875&qupv3_2 { 876 status = "okay"; 877}; 878 879&remoteproc_adsp { 880 firmware-name = "qcom/x1e80100/adsp.mbn", 881 "qcom/x1e80100/adsp_dtb.mbn"; 882 883 status = "okay"; 884}; 885 886&remoteproc_cdsp { 887 firmware-name = "qcom/x1e80100/cdsp.mbn", 888 "qcom/x1e80100/cdsp_dtb.mbn"; 889 890 status = "okay"; 891}; 892 893&smb2360_0_eusb2_repeater { 894 vdd18-supply = <&vreg_l3d_1p8>; 895 vdd3-supply = <&vreg_l2b_3p0>; 896}; 897 898&smb2360_1_eusb2_repeater { 899 vdd18-supply = <&vreg_l3d_1p8>; 900 vdd3-supply = <&vreg_l14b_3p0>; 901}; 902 903&smb2360_2 { 904 status = "okay"; 905}; 906 907&smb2360_2_eusb2_repeater { 908 vdd18-supply = <&vreg_l3d_1p8>; 909 vdd3-supply = <&vreg_l8b_3p0>; 910}; 911 912&swr0 { 913 status = "okay"; 914 915 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 916 pinctrl-names = "default"; 917 918 /* WSA8845, Left Woofer */ 919 left_woofer: speaker@0,0 { 920 compatible = "sdw20217020400"; 921 reg = <0 0>; 922 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 923 #sound-dai-cells = <0>; 924 sound-name-prefix = "WooferLeft"; 925 vdd-1p8-supply = <&vreg_l15b_1p8>; 926 vdd-io-supply = <&vreg_l12b_1p2>; 927 qcom,port-mapping = <1 2 3 7 10 13>; 928 }; 929 930 /* WSA8845, Left Tweeter */ 931 left_tweeter: speaker@0,1 { 932 compatible = "sdw20217020400"; 933 reg = <0 1>; 934 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 935 #sound-dai-cells = <0>; 936 sound-name-prefix = "TwitterLeft"; 937 vdd-1p8-supply = <&vreg_l15b_1p8>; 938 vdd-io-supply = <&vreg_l12b_1p2>; 939 qcom,port-mapping = <4 5 6 7 11 13>; 940 }; 941}; 942 943&swr1 { 944 status = "okay"; 945 946 /* WCD9385 RX */ 947 wcd_rx: codec@0,4 { 948 compatible = "sdw20217010d00"; 949 reg = <0 4>; 950 qcom,rx-port-mapping = <1 2 3 4 5>; 951 }; 952}; 953 954&swr2 { 955 status = "okay"; 956 957 /* WCD9385 TX */ 958 wcd_tx: codec@0,3 { 959 compatible = "sdw20217010d00"; 960 reg = <0 3>; 961 qcom,tx-port-mapping = <2 2 3 4>; 962 }; 963}; 964 965&swr3 { 966 status = "okay"; 967 968 pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>; 969 pinctrl-names = "default"; 970 971 /* WSA8845, Right Woofer */ 972 right_woofer: speaker@0,0 { 973 compatible = "sdw20217020400"; 974 reg = <0 0>; 975 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; 976 #sound-dai-cells = <0>; 977 sound-name-prefix = "WooferRight"; 978 vdd-1p8-supply = <&vreg_l15b_1p8>; 979 vdd-io-supply = <&vreg_l12b_1p2>; 980 qcom,port-mapping = <1 2 3 7 10 13>; 981 }; 982 983 /* WSA8845, Right Tweeter */ 984 right_tweeter: speaker@0,1 { 985 compatible = "sdw20217020400"; 986 reg = <0 1>; 987 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; 988 #sound-dai-cells = <0>; 989 sound-name-prefix = "TwitterRight"; 990 vdd-1p8-supply = <&vreg_l15b_1p8>; 991 vdd-io-supply = <&vreg_l12b_1p2>; 992 qcom,port-mapping = <4 5 6 7 11 13>; 993 }; 994}; 995 996&tlmm { 997 gpio-reserved-ranges = <34 2>, /* Unused */ 998 <44 4>, /* SPI (TPM) */ 999 <238 1>; /* UFS Reset */ 1000 1001 edp_reg_en: edp-reg-en-state { 1002 pins = "gpio70"; 1003 function = "gpio"; 1004 drive-strength = <16>; 1005 bias-disable; 1006 }; 1007 1008 hall_int_n_default: hall-int-n-state { 1009 pins = "gpio92"; 1010 function = "gpio"; 1011 bias-disable; 1012 }; 1013 1014 kybd_default: kybd-default-state { 1015 pins = "gpio67"; 1016 function = "gpio"; 1017 bias-disable; 1018 }; 1019 1020 nvme_reg_en: nvme-reg-en-state { 1021 pins = "gpio18"; 1022 function = "gpio"; 1023 drive-strength = <2>; 1024 bias-disable; 1025 }; 1026 1027 pcie4_default: pcie4-default-state { 1028 clkreq-n-pins { 1029 pins = "gpio147"; 1030 function = "pcie4_clk"; 1031 drive-strength = <2>; 1032 bias-pull-up; 1033 }; 1034 1035 perst-n-pins { 1036 pins = "gpio146"; 1037 function = "gpio"; 1038 drive-strength = <2>; 1039 bias-disable; 1040 }; 1041 1042 wake-n-pins { 1043 pins = "gpio148"; 1044 function = "gpio"; 1045 drive-strength = <2>; 1046 bias-pull-up; 1047 }; 1048 }; 1049 1050 pcie5_default: pcie5-default-state { 1051 clkreq-n-pins { 1052 pins = "gpio150"; 1053 function = "pcie5_clk"; 1054 drive-strength = <2>; 1055 bias-pull-up; 1056 }; 1057 1058 perst-n-pins { 1059 pins = "gpio149"; 1060 function = "gpio"; 1061 drive-strength = <2>; 1062 bias-disable; 1063 }; 1064 1065 wake-n-pins { 1066 pins = "gpio151"; 1067 function = "gpio"; 1068 drive-strength = <2>; 1069 bias-pull-up; 1070 }; 1071 }; 1072 1073 pcie6a_default: pcie6a-default-state { 1074 clkreq-n-pins { 1075 pins = "gpio153"; 1076 function = "pcie6a_clk"; 1077 drive-strength = <2>; 1078 bias-pull-up; 1079 }; 1080 1081 perst-n-pins { 1082 pins = "gpio152"; 1083 function = "gpio"; 1084 drive-strength = <2>; 1085 bias-disable; 1086 }; 1087 1088 wake-n-pins { 1089 pins = "gpio154"; 1090 function = "gpio"; 1091 drive-strength = <2>; 1092 bias-pull-up; 1093 }; 1094 }; 1095 1096 tpad_default: tpad-default-state { 1097 pins = "gpio3"; 1098 function = "gpio"; 1099 bias-disable; 1100 }; 1101 1102 ts0_default: ts0-default-state { 1103 int-n-pins { 1104 pins = "gpio51"; 1105 function = "gpio"; 1106 bias-disable; 1107 }; 1108 1109 reset-n-pins { 1110 pins = "gpio48"; 1111 function = "gpio"; 1112 output-high; 1113 drive-strength = <16>; 1114 }; 1115 }; 1116 1117 wcd_default: wcd-reset-n-active-state { 1118 pins = "gpio191"; 1119 function = "gpio"; 1120 drive-strength = <16>; 1121 bias-disable; 1122 output-low; 1123 }; 1124 1125 wwan_sw_en: wwan-sw-en-state { 1126 pins = "gpio221"; 1127 function = "gpio"; 1128 drive-strength = <4>; 1129 bias-disable; 1130 }; 1131}; 1132 1133&uart21 { 1134 compatible = "qcom,geni-debug-uart"; 1135 status = "okay"; 1136}; 1137 1138&usb_1_ss0_hsphy { 1139 vdd-supply = <&vreg_l3j_0p8>; 1140 vdda12-supply = <&vreg_l2j_1p2>; 1141 1142 phys = <&smb2360_0_eusb2_repeater>; 1143 1144 status = "okay"; 1145}; 1146 1147&usb_1_ss0_qmpphy { 1148 vdda-phy-supply = <&vreg_l3e_1p2>; 1149 vdda-pll-supply = <&vreg_l1j_0p8>; 1150 1151 status = "okay"; 1152}; 1153 1154&usb_1_ss0 { 1155 status = "okay"; 1156}; 1157 1158&usb_1_ss0_dwc3 { 1159 dr_mode = "host"; 1160}; 1161 1162&usb_1_ss0_dwc3_hs { 1163 remote-endpoint = <&pmic_glink_ss0_hs_in>; 1164}; 1165 1166&usb_1_ss0_qmpphy_out { 1167 remote-endpoint = <&pmic_glink_ss0_ss_in>; 1168}; 1169 1170&usb_1_ss1_hsphy { 1171 vdd-supply = <&vreg_l3j_0p8>; 1172 vdda12-supply = <&vreg_l2j_1p2>; 1173 1174 phys = <&smb2360_1_eusb2_repeater>; 1175 1176 status = "okay"; 1177}; 1178 1179&usb_1_ss1_qmpphy { 1180 vdda-phy-supply = <&vreg_l3e_1p2>; 1181 vdda-pll-supply = <&vreg_l2d_0p9>; 1182 1183 status = "okay"; 1184}; 1185 1186&usb_1_ss1 { 1187 status = "okay"; 1188}; 1189 1190&usb_1_ss1_dwc3 { 1191 dr_mode = "host"; 1192}; 1193 1194&usb_1_ss1_dwc3_hs { 1195 remote-endpoint = <&pmic_glink_ss1_hs_in>; 1196}; 1197 1198&usb_1_ss1_qmpphy_out { 1199 remote-endpoint = <&pmic_glink_ss1_ss_in>; 1200}; 1201 1202&usb_1_ss2_hsphy { 1203 vdd-supply = <&vreg_l3j_0p8>; 1204 vdda12-supply = <&vreg_l2j_1p2>; 1205 1206 phys = <&smb2360_2_eusb2_repeater>; 1207 1208 status = "okay"; 1209}; 1210 1211&usb_1_ss2_qmpphy { 1212 vdda-phy-supply = <&vreg_l3e_1p2>; 1213 vdda-pll-supply = <&vreg_l2d_0p9>; 1214 1215 status = "okay"; 1216}; 1217 1218&usb_1_ss2 { 1219 status = "okay"; 1220}; 1221 1222&usb_1_ss2_dwc3 { 1223 dr_mode = "host"; 1224}; 1225 1226&usb_1_ss2_dwc3_hs { 1227 remote-endpoint = <&pmic_glink_ss2_hs_in>; 1228}; 1229 1230&usb_1_ss2_qmpphy_out { 1231 remote-endpoint = <&pmic_glink_ss2_ss_in>; 1232}; 1233