xref: /linux/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml (revision 566ab427f827b0256d3e8ce0235d088e6a9c28bd)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car CAN FD Controller
8
9maintainers:
10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - renesas,r8a774a1-canfd     # RZ/G2M
18              - renesas,r8a774b1-canfd     # RZ/G2N
19              - renesas,r8a774c0-canfd     # RZ/G2E
20              - renesas,r8a774e1-canfd     # RZ/G2H
21              - renesas,r8a7795-canfd      # R-Car H3
22              - renesas,r8a7796-canfd      # R-Car M3-W
23              - renesas,r8a77961-canfd     # R-Car M3-W+
24              - renesas,r8a77965-canfd     # R-Car M3-N
25              - renesas,r8a77970-canfd     # R-Car V3M
26              - renesas,r8a77980-canfd     # R-Car V3H
27              - renesas,r8a77990-canfd     # R-Car E3
28              - renesas,r8a77995-canfd     # R-Car D3
29          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
30
31      - items:
32          - enum:
33              - renesas,r8a779a0-canfd     # R-Car V3U
34              - renesas,r8a779g0-canfd     # R-Car V4H
35              - renesas,r8a779h0-canfd     # R-Car V4M
36          - const: renesas,rcar-gen4-canfd # R-Car Gen4
37
38      - items:
39          - enum:
40              - renesas,r9a07g043-canfd    # RZ/G2UL and RZ/Five
41              - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
42              - renesas,r9a07g054-canfd    # RZ/V2L
43          - const: renesas,rzg2l-canfd     # RZ/G2L family
44
45  reg:
46    maxItems: 1
47
48  interrupts: true
49
50  clocks:
51    maxItems: 3
52
53  clock-names:
54    items:
55      - const: fck
56      - const: canfd
57      - const: can_clk
58
59  power-domains:
60    maxItems: 1
61
62  resets: true
63
64  renesas,no-can-fd:
65    $ref: /schemas/types.yaml#/definitions/flag
66    description:
67      The controller can operate in either CAN FD only mode (default) or
68      Classical CAN only mode.  The mode is global to all channels.
69      Specify this property to put the controller in Classical CAN only mode.
70
71  assigned-clocks:
72    description:
73      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
74      used by both CAN (if present) and CAN FD controllers at the same time.
75      It needs to be scaled to maximum frequency if any of these controllers
76      use it.
77
78  assigned-clock-rates:
79    description: Maximum frequency of the CANFD clock.
80
81patternProperties:
82  "^channel[0-7]$":
83    type: object
84    description:
85      The controller supports multiple channels and each is represented as a
86      child node.  Each channel can be enabled/disabled individually.
87
88    properties:
89      phys:
90        maxItems: 1
91
92    additionalProperties: false
93
94required:
95  - compatible
96  - reg
97  - interrupts
98  - interrupt-names
99  - clocks
100  - clock-names
101  - power-domains
102  - resets
103  - assigned-clocks
104  - assigned-clock-rates
105  - channel0
106  - channel1
107
108allOf:
109  - $ref: can-controller.yaml#
110
111  - if:
112      properties:
113        compatible:
114          contains:
115            enum:
116              - renesas,rzg2l-canfd
117    then:
118      properties:
119        interrupts:
120          items:
121            - description: CAN global error interrupt
122            - description: CAN receive FIFO interrupt
123            - description: CAN0 error interrupt
124            - description: CAN0 transmit interrupt
125            - description: CAN0 transmit/receive FIFO receive completion interrupt
126            - description: CAN1 error interrupt
127            - description: CAN1 transmit interrupt
128            - description: CAN1 transmit/receive FIFO receive completion interrupt
129
130        interrupt-names:
131          items:
132            - const: g_err
133            - const: g_recc
134            - const: ch0_err
135            - const: ch0_rec
136            - const: ch0_trx
137            - const: ch1_err
138            - const: ch1_rec
139            - const: ch1_trx
140
141        resets:
142          maxItems: 2
143
144        reset-names:
145          items:
146            - const: rstp_n
147            - const: rstc_n
148
149      required:
150        - reset-names
151    else:
152      properties:
153        interrupts:
154          items:
155            - description: Channel interrupt
156            - description: Global interrupt
157
158        interrupt-names:
159          items:
160            - const: ch_int
161            - const: g_int
162
163        resets:
164          maxItems: 1
165
166  - if:
167      properties:
168        compatible:
169          contains:
170            const: renesas,r8a779h0-canfd
171    then:
172      patternProperties:
173        "^channel[5-7]$": false
174    else:
175      if:
176        not:
177          properties:
178            compatible:
179              contains:
180                const: renesas,rcar-gen4-canfd
181      then:
182        patternProperties:
183          "^channel[2-7]$": false
184
185unevaluatedProperties: false
186
187examples:
188  - |
189    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
190    #include <dt-bindings/interrupt-controller/arm-gic.h>
191    #include <dt-bindings/power/r8a7795-sysc.h>
192
193    canfd: can@e66c0000 {
194            compatible = "renesas,r8a7795-canfd",
195                         "renesas,rcar-gen3-canfd";
196            reg = <0xe66c0000 0x8000>;
197            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
198                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
199            interrupt-names = "ch_int", "g_int";
200            clocks = <&cpg CPG_MOD 914>,
201                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
202                     <&can_clk>;
203            clock-names = "fck", "canfd", "can_clk";
204            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
205            assigned-clock-rates = <40000000>;
206            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
207            resets = <&cpg 914>;
208
209            channel0 {
210            };
211
212            channel1 {
213            };
214    };
215