drm/amdgpu/display: Update kdoc for 'optc35_set_odm_combine'The parameters segment_width and last_segment_width are used to controlthe configuration of the Output Plane Processor (OPP), specifical
drm/amdgpu/display: Update kdoc for 'optc35_set_odm_combine'The parameters segment_width and last_segment_width are used to controlthe configuration of the Output Plane Processor (OPP), specifically thewidth of each segment that the display is divided into and the width ofthe last segmentFixes the below with gcc W=1:drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c:59: warning: Function parameter or struct member 'segment_width' not described in 'optc35_set_odm_combine'drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c:59: warning: Function parameter or struct member 'last_segment_width' not described in 'optc35_set_odm_combine'drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c:59: warning: Excess function parameter 'timing' description in 'optc35_set_odm_combine'Cc: Tom Chung <chiahsuan.chung@amd.com>Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Cc: Roman Li <roman.li@amd.com>Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>Reviewed-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drm/amd/display: Add left edge pixel for YCbCr422/420 + ODM pipe split[WHY]Currently 3-tap chroma subsampling is used for YCbCr422/420. When ODMpipesplit is used, pixels on the left edge of ODM s
drm/amd/display: Add left edge pixel for YCbCr422/420 + ODM pipe split[WHY]Currently 3-tap chroma subsampling is used for YCbCr422/420. When ODMpipesplit is used, pixels on the left edge of ODM slices need one extrapixel from the right edge of the previous slice to calculate the correctchroma value.Without this change, the chroma value is slightly different thanexpected. This is usually imperceptible visually, but it impacts testpattern CRCs for compliance test automation.[HOW]Update logic to use the register for adding extra left edge pixel forYCbCr422/420 ODM cases.Reviewed-by: George Shen <george.shen@amd.com>Acked-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: use even ODM slice width for two pixels per container[why]When optc uses two pixel per container, each ODM slice width must be aneven number.[how]If ODM slice width is odd num
drm/amd/display: use even ODM slice width for two pixels per container[why]When optc uses two pixel per container, each ODM slice width must be aneven number.[how]If ODM slice width is odd number increase it by 1.Reviewed-by: Dillon Varone <dillon.varone@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Support long vblank feature[WHY]We want to support low hz case, but the originalvtotal/vtotal_min/vtotal_max can't support morethan 0x7FFF.[HOW]We use the 2 HW reg to contorl
drm/amd/display: Support long vblank feature[WHY]We want to support low hz case, but the originalvtotal/vtotal_min/vtotal_max can't support morethan 0x7FFF.[HOW]We use the 2 HW reg to contorl long vblank case.1. OTG_V_COUNT_STOP_CONTROL -> vcount_stop2. OTG_V_COUNT_STOP_CONTROL2 -> vcount_stop_timervcount_stop define from which line we stop using vcountand start using vcount2.vcount_stop_timer define how long we use vcount2.Ex:Vtotal = 7OTG_V_COUNT_STOP_CONTROL = 4OTG_V_COUNT_STOP_CONTROL2 = 5time : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11vcount : 0, 1, 2, 3, - - - - - 4, 5, 6vcount2 : 0, 1, 2, 3, 4,Reviewed-by: Jun Lei <jun.lei@amd.com>Acked-by: Alex Hung <alex.hung@amd.com>Signed-off-by: ChunTao Tso <chuntao.tso@amd.com>Signed-off-by: Robin Chen<robin.chen@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Clear OPTC mem select on disable[Why]Not clearing the memory select bits prior to OPTC disable can cause DSCcorruption issues when attempting to reuse a memory instance for anoth
drm/amd/display: Clear OPTC mem select on disable[Why]Not clearing the memory select bits prior to OPTC disable can cause DSCcorruption issues when attempting to reuse a memory instance for anotherOPTC that enables ODM.[How]Clear the memory select bits prior to disabling an OPTC.Cc: Mario Limonciello <mario.limonciello@amd.com>Cc: Alex Deucher <alexander.deucher@amd.com>Cc: stable@vger.kernel.orgReviewed-by: Charlene Liu <charlene.liu@amd.com>Acked-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Disconnect phantom pipe OPP from OPTC being disabled[Why]If an OPP is used for a different OPTC without first being disconnectedfrom the previous OPTC, unexpected behaviour can o
drm/amd/display: Disconnect phantom pipe OPP from OPTC being disabled[Why]If an OPP is used for a different OPTC without first being disconnectedfrom the previous OPTC, unexpected behaviour can occur. This alsoapplies to phantom pipes, which is what the current logic missed.[How]Disconnect OPPs from OPTC for phantom pipes before disabling OTG master.Also move the disconnection to before the OTG master disable, since theregister is double buffered.Reviewed-by: Dillon Varone <dillon.varone@amd.com>Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>Signed-off-by: George Shen <george.shen@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix hang/underflow when transitioning to ODM4:1[Why]Under some circumstances, disabling an OPTC and attempting to reclaimits OPP(s) for a different OPTC could cause a hang/underf
drm/amd/display: Fix hang/underflow when transitioning to ODM4:1[Why]Under some circumstances, disabling an OPTC and attempting to reclaimits OPP(s) for a different OPTC could cause a hang/underflow due to OPPsnot being properly disconnected from the disabled OPTC.[How]Ensure that all OPPs are unassigned from an OPTC when it gets disabled.Reviewed-by: Alvin Lee <alvin.lee2@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Refactor OPTC into component folder[why]Move all optc files to uniquefolder optc.[how]creating optc repo in dc, and moved the dcnxx_optc.c and .h files intocorresponding new
drm/amd/display: Refactor OPTC into component folder[why]Move all optc files to uniquefolder optc.[how]creating optc repo in dc, and moved the dcnxx_optc.c and .h files intocorresponding new folders inside the optc and cleared the linkageerrors by adding relative paths in the Makefile.template.Reviewed-by: Martin Leung <martin.leung@amd.com>Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Parandhaman K <parandhaman.k@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>