1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Genmai board 4 * 5 * Copyright (C) 2013-14 Renesas Solutions Corp. 6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> 7 */ 8 9/dts-v1/; 10#include "r7s72100.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/pinctrl/r7s72100-pinctrl.h> 13 14/ { 15 model = "Genmai"; 16 compatible = "renesas,genmai", "renesas,r7s72100"; 17 18 aliases { 19 serial0 = &scif2; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 memory@8000000 { 28 device_type = "memory"; 29 reg = <0x08000000 0x08000000>; 30 }; 31 32 flash@18000000 { 33 compatible = "mtd-rom"; 34 reg = <0x18000000 0x08000000>; 35 bank-width = <4>; 36 device-width = <1>; 37 38 clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>; 39 power-domains = <&cpg_clocks>; 40 41 #address-cells = <1>; 42 #size-cells = <1>; 43 44 partitions { 45 compatible = "fixed-partitions"; 46 #address-cells = <1>; 47 #size-cells = <1>; 48 49 partition@0 { 50 label = "user"; 51 reg = <0x00000000 0x04000000>; 52 }; 53 54 partition@4000000 { 55 label = "user1"; 56 reg = <0x04000000 0x40000000>; 57 }; 58 }; 59 }; 60 61 leds { 62 status = "okay"; 63 compatible = "gpio-leds"; 64 65 led1 { 66 gpios = <&port4 10 GPIO_ACTIVE_LOW>; 67 }; 68 69 led2 { 70 gpios = <&port4 11 GPIO_ACTIVE_LOW>; 71 }; 72 }; 73}; 74 75&pinctrl { 76 77 scif2_pins: serial2 { 78 /* P3_0 as TxD2; P3_2 as RxD2 */ 79 pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>; 80 }; 81 82 i2c2_pins: i2c2 { 83 /* RIIC2: P1_4 as SCL, P1_5 as SDA */ 84 pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>; 85 }; 86 87 ether_pins: ether { 88 /* Ethernet on Ports 1,2,3,5 */ 89 pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */ 90 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */ 91 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */ 92 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */ 93 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */ 94 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */ 95 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */ 96 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */ 97 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */ 98 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */ 99 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */ 100 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */ 101 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */ 102 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */ 103 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */ 104 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */ 105 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */ 106 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */ 107 }; 108}; 109 110&extal_clk { 111 clock-frequency = <13330000>; 112}; 113 114&bsc { 115 flash@0 { 116 compatible = "cfi-flash"; 117 reg = <0x00000000 0x04000000>; 118 bank-width = <2>; 119 120 partitions { 121 compatible = "fixed-partitions"; 122 #address-cells = <1>; 123 #size-cells = <1>; 124 125 partition@0 { 126 label = "uboot"; 127 reg = <0x00000000 0x00040000>; 128 }; 129 130 partition@40000 { 131 label = "uboot-env"; 132 reg = <0x00040000 0x00020000>; 133 }; 134 135 partition@60000 { 136 label = "flash"; 137 reg = <0x00060000 0x03fa0000>; 138 }; 139 }; 140 }; 141 142 flash@4000000 { 143 compatible = "cfi-flash"; 144 reg = <0x04000000 0x04000000>; 145 bank-width = <2>; 146 147 partitions { 148 compatible = "fixed-partitions"; 149 #address-cells = <1>; 150 #size-cells = <1>; 151 152 partition@0 { 153 label = "uboot1"; 154 reg = <0x00000000 0x00040000>; 155 }; 156 157 partition@40000 { 158 label = "uboot-env1"; 159 reg = <0x00040000 0x00020000>; 160 }; 161 162 partition@60000 { 163 label = "flash1"; 164 reg = <0x00060000 0x03fa0000>; 165 }; 166 }; 167 }; 168}; 169 170&usb_x1_clk { 171 clock-frequency = <48000000>; 172}; 173 174&rtc_x1_clk { 175 clock-frequency = <32768>; 176}; 177 178&mtu2 { 179 status = "okay"; 180}; 181 182ðer { 183 pinctrl-names = "default"; 184 pinctrl-0 = <ðer_pins>; 185 186 status = "okay"; 187 188 renesas,no-ether-link; 189 phy-handle = <&phy0>; 190 phy0: ethernet-phy@0 { 191 compatible = "ethernet-phy-idb824.2814", 192 "ethernet-phy-ieee802.3-c22"; 193 reg = <0>; 194 }; 195}; 196 197&i2c2 { 198 status = "okay"; 199 clock-frequency = <400000>; 200 201 pinctrl-names = "default"; 202 pinctrl-0 = <&i2c2_pins>; 203 204 eeprom@50 { 205 compatible = "renesas,r1ex24128", "atmel,24c128"; 206 reg = <0x50>; 207 pagesize = <64>; 208 }; 209}; 210 211&rtc { 212 status = "okay"; 213}; 214 215&scif2 { 216 pinctrl-names = "default"; 217 pinctrl-0 = <&scif2_pins>; 218 219 status = "okay"; 220}; 221 222&spi4 { 223 status = "okay"; 224 225 codec: codec@0 { 226 compatible = "wlf,wm8978"; 227 reg = <0>; 228 spi-max-frequency = <5000000>; 229 }; 230}; 231