1# SPDX-License-Identifier: GPL-2.0-only 2 3menuconfig CRYPTO_HW 4 bool "Hardware crypto devices" 5 default y 6 help 7 Say Y here to get to see options for hardware crypto devices and 8 processors. This option alone does not add any kernel code. 9 10 If you say N, all options in this submenu will be skipped and disabled. 11 12if CRYPTO_HW 13 14source "drivers/crypto/allwinner/Kconfig" 15 16config CRYPTO_DEV_PADLOCK 17 tristate "Support for VIA PadLock ACE" 18 depends on X86 && !UML 19 help 20 Some VIA processors come with an integrated crypto engine 21 (so called VIA PadLock ACE, Advanced Cryptography Engine) 22 that provides instructions for very fast cryptographic 23 operations with supported algorithms. 24 25 The instructions are used only when the CPU supports them. 26 Otherwise software encryption is used. 27 28config CRYPTO_DEV_PADLOCK_AES 29 tristate "PadLock driver for AES algorithm" 30 depends on CRYPTO_DEV_PADLOCK 31 select CRYPTO_SKCIPHER 32 select CRYPTO_LIB_AES 33 help 34 Use VIA PadLock for AES algorithm. 35 36 Available in VIA C3 and newer CPUs. 37 38 If unsure say M. The compiled module will be 39 called padlock-aes. 40 41config CRYPTO_DEV_PADLOCK_SHA 42 tristate "PadLock driver for SHA1 and SHA256 algorithms" 43 depends on CRYPTO_DEV_PADLOCK 44 select CRYPTO_HASH 45 select CRYPTO_SHA1 46 select CRYPTO_SHA256 47 help 48 Use VIA PadLock for SHA1/SHA256 algorithms. 49 50 Available in VIA C7 and newer processors. 51 52 If unsure say M. The compiled module will be 53 called padlock-sha. 54 55config CRYPTO_DEV_GEODE 56 tristate "Support for the Geode LX AES engine" 57 depends on X86_32 && PCI 58 select CRYPTO_ALGAPI 59 select CRYPTO_SKCIPHER 60 help 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 62 engine for the CryptoAPI AES algorithm. 63 64 To compile this driver as a module, choose M here: the module 65 will be called geode-aes. 66 67config ZCRYPT 68 tristate "Support for s390 cryptographic adapters" 69 depends on S390 70 select HW_RANDOM 71 help 72 Select this option if you want to enable support for 73 s390 cryptographic adapters like Crypto Express 4 up 74 to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP) 75 or Accelerator (CEXxA) mode. 76 77config ZCRYPT_DEBUG 78 bool "Enable debug features for s390 cryptographic adapters" 79 default n 80 depends on DEBUG_KERNEL 81 depends on ZCRYPT 82 help 83 Say 'Y' here to enable some additional debug features on the 84 s390 cryptographic adapters driver. 85 86 There will be some more sysfs attributes displayed for ap cards 87 and queues and some flags on crypto requests are interpreted as 88 debugging messages to force error injection. 89 90 Do not enable on production level kernel build. 91 92 If unsure, say N. 93 94config PKEY 95 tristate "Kernel API for protected key handling" 96 depends on S390 97 depends on ZCRYPT 98 help 99 With this option enabled the pkey kernel module provides an API 100 for creation and handling of protected keys. Other parts of the 101 kernel or userspace applications may use these functions. 102 103 Select this option if you want to enable the kernel and userspace 104 API for proteced key handling. 105 106 Please note that creation of protected keys from secure keys 107 requires to have at least one CEX card in coprocessor mode 108 available at runtime. 109 110config CRYPTO_PAES_S390 111 tristate "PAES cipher algorithms" 112 depends on S390 113 depends on ZCRYPT 114 depends on PKEY 115 select CRYPTO_ALGAPI 116 select CRYPTO_SKCIPHER 117 help 118 This is the s390 hardware accelerated implementation of the 119 AES cipher algorithms for use with protected key. 120 121 Select this option if you want to use the paes cipher 122 for example to use protected key encrypted devices. 123 124config S390_PRNG 125 tristate "Pseudo random number generator device driver" 126 depends on S390 127 default "m" 128 help 129 Select this option if you want to use the s390 pseudo random number 130 generator. The PRNG is part of the cryptographic processor functions 131 and uses triple-DES to generate secure random numbers like the 132 ANSI X9.17 standard. User-space programs access the 133 pseudo-random-number device through the char device /dev/prandom. 134 135 It is available as of z9. 136 137config CRYPTO_DEV_NIAGARA2 138 tristate "Niagara2 Stream Processing Unit driver" 139 select CRYPTO_LIB_DES 140 select CRYPTO_SKCIPHER 141 select CRYPTO_HASH 142 select CRYPTO_MD5 143 select CRYPTO_SHA1 144 select CRYPTO_SHA256 145 depends on SPARC64 146 help 147 Each core of a Niagara2 processor contains a Stream 148 Processing Unit, which itself contains several cryptographic 149 sub-units. One set provides the Modular Arithmetic Unit, 150 used for SSL offload. The other set provides the Cipher 151 Group, which can perform encryption, decryption, hashing, 152 checksumming, and raw copies. 153 154config CRYPTO_DEV_SL3516 155 tristate "Storlink SL3516 crypto offloader" 156 depends on ARCH_GEMINI || COMPILE_TEST 157 depends on HAS_IOMEM && PM 158 select CRYPTO_SKCIPHER 159 select CRYPTO_ENGINE 160 select CRYPTO_ECB 161 select CRYPTO_AES 162 select HW_RANDOM 163 help 164 This option allows you to have support for SL3516 crypto offloader. 165 166config CRYPTO_DEV_SL3516_DEBUG 167 bool "Enable SL3516 stats" 168 depends on CRYPTO_DEV_SL3516 169 depends on DEBUG_FS 170 help 171 Say y to enable SL3516 debug stats. 172 This will create /sys/kernel/debug/sl3516/stats for displaying 173 the number of requests per algorithm and other internal stats. 174 175config CRYPTO_DEV_HIFN_795X 176 tristate "Driver HIFN 795x crypto accelerator chips" 177 select CRYPTO_LIB_DES 178 select CRYPTO_SKCIPHER 179 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 180 depends on PCI 181 depends on !ARCH_DMA_ADDR_T_64BIT 182 help 183 This option allows you to have support for HIFN 795x crypto adapters. 184 185config CRYPTO_DEV_HIFN_795X_RNG 186 bool "HIFN 795x random number generator" 187 depends on CRYPTO_DEV_HIFN_795X 188 help 189 Select this option if you want to enable the random number generator 190 on the HIFN 795x crypto adapters. 191 192source "drivers/crypto/caam/Kconfig" 193 194config CRYPTO_DEV_TALITOS 195 tristate "Talitos Freescale Security Engine (SEC)" 196 select CRYPTO_AEAD 197 select CRYPTO_AUTHENC 198 select CRYPTO_SKCIPHER 199 select CRYPTO_HASH 200 select CRYPTO_LIB_DES 201 select HW_RANDOM 202 depends on FSL_SOC 203 help 204 Say 'Y' here to use the Freescale Security Engine (SEC) 205 to offload cryptographic algorithm computation. 206 207 The Freescale SEC is present on PowerQUICC 'E' processors, such 208 as the MPC8349E and MPC8548E. 209 210 To compile this driver as a module, choose M here: the module 211 will be called talitos. 212 213config CRYPTO_DEV_TALITOS1 214 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 215 depends on CRYPTO_DEV_TALITOS 216 depends on PPC_8xx || PPC_82xx 217 default y 218 help 219 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 220 found on MPC82xx or the Freescale Security Engine (SEC Lite) 221 version 1.2 found on MPC8xx 222 223config CRYPTO_DEV_TALITOS2 224 bool "SEC2+ (SEC version 2.0 or upper)" 225 depends on CRYPTO_DEV_TALITOS 226 default y if !PPC_8xx 227 help 228 Say 'Y' here to use the Freescale Security Engine (SEC) 229 version 2 and following as found on MPC83xx, MPC85xx, etc ... 230 231config CRYPTO_DEV_PPC4XX 232 tristate "Driver AMCC PPC4xx crypto accelerator" 233 depends on PPC && 4xx 234 select CRYPTO_HASH 235 select CRYPTO_AEAD 236 select CRYPTO_AES 237 select CRYPTO_LIB_AES 238 select CRYPTO_CCM 239 select CRYPTO_CTR 240 select CRYPTO_GCM 241 select CRYPTO_SKCIPHER 242 help 243 This option allows you to have support for AMCC crypto acceleration. 244 245config HW_RANDOM_PPC4XX 246 bool "PowerPC 4xx generic true random number generator support" 247 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y 248 default y 249 help 250 This option provides the kernel-side support for the TRNG hardware 251 found in the security function of some PowerPC 4xx SoCs. 252 253config CRYPTO_DEV_OMAP 254 tristate "Support for OMAP crypto HW accelerators" 255 depends on ARCH_OMAP2PLUS 256 help 257 OMAP processors have various crypto HW accelerators. Select this if 258 you want to use the OMAP modules for any of the crypto algorithms. 259 260if CRYPTO_DEV_OMAP 261 262config CRYPTO_DEV_OMAP_SHAM 263 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 264 depends on ARCH_OMAP2PLUS 265 select CRYPTO_ENGINE 266 select CRYPTO_SHA1 267 select CRYPTO_MD5 268 select CRYPTO_SHA256 269 select CRYPTO_SHA512 270 select CRYPTO_HMAC 271 help 272 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 273 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 274 275config CRYPTO_DEV_OMAP_AES 276 tristate "Support for OMAP AES hw engine" 277 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 278 select CRYPTO_AES 279 select CRYPTO_SKCIPHER 280 select CRYPTO_ENGINE 281 select CRYPTO_CBC 282 select CRYPTO_ECB 283 select CRYPTO_CTR 284 select CRYPTO_AEAD 285 help 286 OMAP processors have AES module accelerator. Select this if you 287 want to use the OMAP module for AES algorithms. 288 289config CRYPTO_DEV_OMAP_DES 290 tristate "Support for OMAP DES/3DES hw engine" 291 depends on ARCH_OMAP2PLUS 292 select CRYPTO_LIB_DES 293 select CRYPTO_SKCIPHER 294 select CRYPTO_ENGINE 295 help 296 OMAP processors have DES/3DES module accelerator. Select this if you 297 want to use the OMAP module for DES and 3DES algorithms. Currently 298 the ECB and CBC modes of operation are supported by the driver. Also 299 accesses made on unaligned boundaries are supported. 300 301endif # CRYPTO_DEV_OMAP 302 303config CRYPTO_DEV_SAHARA 304 tristate "Support for SAHARA crypto accelerator" 305 depends on ARCH_MXC && OF 306 select CRYPTO_SKCIPHER 307 select CRYPTO_AES 308 select CRYPTO_ECB 309 help 310 This option enables support for the SAHARA HW crypto accelerator 311 found in some Freescale i.MX chips. 312 313config CRYPTO_DEV_EXYNOS_RNG 314 tristate "Exynos HW pseudo random number generator support" 315 depends on ARCH_EXYNOS || COMPILE_TEST 316 depends on HAS_IOMEM 317 select CRYPTO_RNG 318 help 319 This driver provides kernel-side support through the 320 cryptographic API for the pseudo random number generator hardware 321 found on Exynos SoCs. 322 323 To compile this driver as a module, choose M here: the 324 module will be called exynos-rng. 325 326 If unsure, say Y. 327 328config CRYPTO_DEV_S5P 329 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 330 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 331 depends on HAS_IOMEM 332 select CRYPTO_AES 333 select CRYPTO_SKCIPHER 334 help 335 This option allows you to have support for S5P crypto acceleration. 336 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 337 algorithms execution. 338 339config CRYPTO_DEV_EXYNOS_HASH 340 bool "Support for Samsung Exynos HASH accelerator" 341 depends on CRYPTO_DEV_S5P 342 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 343 select CRYPTO_SHA1 344 select CRYPTO_MD5 345 select CRYPTO_SHA256 346 help 347 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 348 This will select software SHA1, MD5 and SHA256 as they are 349 needed for small and zero-size messages. 350 HASH algorithms will be disabled if EXYNOS_RNG 351 is enabled due to hw conflict. 352 353config CRYPTO_DEV_NX 354 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 355 depends on PPC64 356 help 357 This enables support for the NX hardware cryptographic accelerator 358 coprocessor that is in IBM PowerPC P7+ or later processors. This 359 does not actually enable any drivers, it only allows you to select 360 which acceleration type (encryption and/or compression) to enable. 361 362if CRYPTO_DEV_NX 363 source "drivers/crypto/nx/Kconfig" 364endif 365 366config CRYPTO_DEV_ATMEL_AUTHENC 367 bool "Support for Atmel IPSEC/SSL hw accelerator" 368 depends on ARCH_AT91 || COMPILE_TEST 369 depends on CRYPTO_DEV_ATMEL_AES 370 help 371 Some Atmel processors can combine the AES and SHA hw accelerators 372 to enhance support of IPSEC/SSL. 373 Select this if you want to use the Atmel modules for 374 authenc(hmac(shaX),Y(cbc)) algorithms. 375 376config CRYPTO_DEV_ATMEL_AES 377 tristate "Support for Atmel AES hw accelerator" 378 depends on ARCH_AT91 || COMPILE_TEST 379 select CRYPTO_AES 380 select CRYPTO_AEAD 381 select CRYPTO_SKCIPHER 382 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC 383 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC 384 help 385 Some Atmel processors have AES hw accelerator. 386 Select this if you want to use the Atmel module for 387 AES algorithms. 388 389 To compile this driver as a module, choose M here: the module 390 will be called atmel-aes. 391 392config CRYPTO_DEV_ATMEL_TDES 393 tristate "Support for Atmel DES/TDES hw accelerator" 394 depends on ARCH_AT91 || COMPILE_TEST 395 select CRYPTO_LIB_DES 396 select CRYPTO_SKCIPHER 397 help 398 Some Atmel processors have DES/TDES hw accelerator. 399 Select this if you want to use the Atmel module for 400 DES/TDES algorithms. 401 402 To compile this driver as a module, choose M here: the module 403 will be called atmel-tdes. 404 405config CRYPTO_DEV_ATMEL_SHA 406 tristate "Support for Atmel SHA hw accelerator" 407 depends on ARCH_AT91 || COMPILE_TEST 408 select CRYPTO_HASH 409 help 410 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 411 hw accelerator. 412 Select this if you want to use the Atmel module for 413 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 414 415 To compile this driver as a module, choose M here: the module 416 will be called atmel-sha. 417 418config CRYPTO_DEV_ATMEL_I2C 419 tristate 420 select BITREVERSE 421 422config CRYPTO_DEV_ATMEL_ECC 423 tristate "Support for Microchip / Atmel ECC hw accelerator" 424 depends on I2C 425 select CRYPTO_DEV_ATMEL_I2C 426 select CRYPTO_ECDH 427 select CRC16 428 help 429 Microhip / Atmel ECC hw accelerator. 430 Select this if you want to use the Microchip / Atmel module for 431 ECDH algorithm. 432 433 To compile this driver as a module, choose M here: the module 434 will be called atmel-ecc. 435 436config CRYPTO_DEV_ATMEL_SHA204A 437 tristate "Support for Microchip / Atmel SHA accelerator and RNG" 438 depends on I2C 439 select CRYPTO_DEV_ATMEL_I2C 440 select HW_RANDOM 441 select CRC16 442 help 443 Microhip / Atmel SHA accelerator and RNG. 444 Select this if you want to use the Microchip / Atmel SHA204A 445 module as a random number generator. (Other functions of the 446 chip are currently not exposed by this driver) 447 448 To compile this driver as a module, choose M here: the module 449 will be called atmel-sha204a. 450 451config CRYPTO_DEV_CCP 452 bool "Support for AMD Secure Processor" 453 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 454 help 455 The AMD Secure Processor provides support for the Cryptographic Coprocessor 456 (CCP) and the Platform Security Processor (PSP) devices. 457 458if CRYPTO_DEV_CCP 459 source "drivers/crypto/ccp/Kconfig" 460endif 461 462config CRYPTO_DEV_MXS_DCP 463 tristate "Support for Freescale MXS DCP" 464 depends on (ARCH_MXS || ARCH_MXC) 465 select STMP_DEVICE 466 select CRYPTO_CBC 467 select CRYPTO_ECB 468 select CRYPTO_AES 469 select CRYPTO_SKCIPHER 470 select CRYPTO_HASH 471 help 472 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 473 co-processor on the die. 474 475 To compile this driver as a module, choose M here: the module 476 will be called mxs-dcp. 477 478source "drivers/crypto/cavium/cpt/Kconfig" 479source "drivers/crypto/cavium/nitrox/Kconfig" 480source "drivers/crypto/marvell/Kconfig" 481source "drivers/crypto/intel/Kconfig" 482 483config CRYPTO_DEV_CAVIUM_ZIP 484 tristate "Cavium ZIP driver" 485 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 486 help 487 Select this option if you want to enable compression/decompression 488 acceleration on Cavium's ARM based SoCs 489 490config CRYPTO_DEV_QCE 491 tristate "Qualcomm crypto engine accelerator" 492 depends on ARCH_QCOM || COMPILE_TEST 493 depends on HAS_IOMEM 494 help 495 This driver supports Qualcomm crypto engine accelerator 496 hardware. To compile this driver as a module, choose M here. The 497 module will be called qcrypto. 498 499config CRYPTO_DEV_QCE_SKCIPHER 500 bool 501 depends on CRYPTO_DEV_QCE 502 select CRYPTO_AES 503 select CRYPTO_LIB_DES 504 select CRYPTO_ECB 505 select CRYPTO_CBC 506 select CRYPTO_XTS 507 select CRYPTO_CTR 508 select CRYPTO_SKCIPHER 509 510config CRYPTO_DEV_QCE_SHA 511 bool 512 depends on CRYPTO_DEV_QCE 513 select CRYPTO_SHA1 514 select CRYPTO_SHA256 515 516config CRYPTO_DEV_QCE_AEAD 517 bool 518 depends on CRYPTO_DEV_QCE 519 select CRYPTO_AUTHENC 520 select CRYPTO_LIB_DES 521 522choice 523 prompt "Algorithms enabled for QCE acceleration" 524 default CRYPTO_DEV_QCE_ENABLE_ALL 525 depends on CRYPTO_DEV_QCE 526 help 527 This option allows to choose whether to build support for all algorithms 528 (default), hashes-only, or skciphers-only. 529 530 The QCE engine does not appear to scale as well as the CPU to handle 531 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the 532 QCE handles only 2 requests in parallel. 533 534 Ipsec throughput seems to improve when disabling either family of 535 algorithms, sharing the load with the CPU. Enabling skciphers-only 536 appears to work best. 537 538 config CRYPTO_DEV_QCE_ENABLE_ALL 539 bool "All supported algorithms" 540 select CRYPTO_DEV_QCE_SKCIPHER 541 select CRYPTO_DEV_QCE_SHA 542 select CRYPTO_DEV_QCE_AEAD 543 help 544 Enable all supported algorithms: 545 - AES (CBC, CTR, ECB, XTS) 546 - 3DES (CBC, ECB) 547 - DES (CBC, ECB) 548 - SHA1, HMAC-SHA1 549 - SHA256, HMAC-SHA256 550 551 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER 552 bool "Symmetric-key ciphers only" 553 select CRYPTO_DEV_QCE_SKCIPHER 554 help 555 Enable symmetric-key ciphers only: 556 - AES (CBC, CTR, ECB, XTS) 557 - 3DES (ECB, CBC) 558 - DES (ECB, CBC) 559 560 config CRYPTO_DEV_QCE_ENABLE_SHA 561 bool "Hash/HMAC only" 562 select CRYPTO_DEV_QCE_SHA 563 help 564 Enable hashes/HMAC algorithms only: 565 - SHA1, HMAC-SHA1 566 - SHA256, HMAC-SHA256 567 568 config CRYPTO_DEV_QCE_ENABLE_AEAD 569 bool "AEAD algorithms only" 570 select CRYPTO_DEV_QCE_AEAD 571 help 572 Enable AEAD algorithms only: 573 - authenc() 574 - ccm(aes) 575 - rfc4309(ccm(aes)) 576endchoice 577 578config CRYPTO_DEV_QCE_SW_MAX_LEN 579 int "Default maximum request size to use software for AES" 580 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER 581 default 512 582 help 583 This sets the default maximum request size to perform AES requests 584 using software instead of the crypto engine. It can be changed by 585 setting the aes_sw_max_len parameter. 586 587 Small blocks are processed faster in software than hardware. 588 Considering the 256-bit ciphers, software is 2-3 times faster than 589 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. 590 With 128-bit keys, the break-even point would be around 1024-bytes. 591 592 The default is set a little lower, to 512 bytes, to balance the 593 cost in CPU usage. The minimum recommended setting is 16-bytes 594 (1 AES block), since AES-GCM will fail if you set it lower. 595 Setting this to zero will send all requests to the hardware. 596 597 Note that 192-bit keys are not supported by the hardware and are 598 always processed by the software fallback, and all DES requests 599 are done by the hardware. 600 601config CRYPTO_DEV_QCOM_RNG 602 tristate "Qualcomm Random Number Generator Driver" 603 depends on ARCH_QCOM || COMPILE_TEST 604 depends on HW_RANDOM 605 select CRYPTO_RNG 606 help 607 This driver provides support for the Random Number 608 Generator hardware found on Qualcomm SoCs. 609 610 To compile this driver as a module, choose M here. The 611 module will be called qcom-rng. If unsure, say N. 612 613config CRYPTO_DEV_VMX 614 bool "Support for VMX cryptographic acceleration instructions" 615 depends on PPC64 && VSX 616 help 617 Support for VMX cryptographic acceleration instructions. 618 619source "drivers/crypto/vmx/Kconfig" 620 621config CRYPTO_DEV_IMGTEC_HASH 622 tristate "Imagination Technologies hardware hash accelerator" 623 depends on MIPS || COMPILE_TEST 624 select CRYPTO_MD5 625 select CRYPTO_SHA1 626 select CRYPTO_SHA256 627 select CRYPTO_HASH 628 help 629 This driver interfaces with the Imagination Technologies 630 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 631 hashing algorithms. 632 633config CRYPTO_DEV_ROCKCHIP 634 tristate "Rockchip's Cryptographic Engine driver" 635 depends on OF && ARCH_ROCKCHIP 636 depends on PM 637 select CRYPTO_ECB 638 select CRYPTO_CBC 639 select CRYPTO_DES 640 select CRYPTO_AES 641 select CRYPTO_ENGINE 642 select CRYPTO_LIB_DES 643 select CRYPTO_MD5 644 select CRYPTO_SHA1 645 select CRYPTO_SHA256 646 select CRYPTO_HASH 647 select CRYPTO_SKCIPHER 648 649 help 650 This driver interfaces with the hardware crypto accelerator. 651 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 652 653config CRYPTO_DEV_ROCKCHIP_DEBUG 654 bool "Enable Rockchip crypto stats" 655 depends on CRYPTO_DEV_ROCKCHIP 656 depends on DEBUG_FS 657 help 658 Say y to enable Rockchip crypto debug stats. 659 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying 660 the number of requests per algorithm and other internal stats. 661 662 663config CRYPTO_DEV_ZYNQMP_AES 664 tristate "Support for Xilinx ZynqMP AES hw accelerator" 665 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 666 select CRYPTO_AES 667 select CRYPTO_ENGINE 668 select CRYPTO_AEAD 669 help 670 Xilinx ZynqMP has AES-GCM engine used for symmetric key 671 encryption and decryption. This driver interfaces with AES hw 672 accelerator. Select this if you want to use the ZynqMP module 673 for AES algorithms. 674 675config CRYPTO_DEV_ZYNQMP_SHA3 676 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator" 677 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 678 select CRYPTO_SHA3 679 help 680 Xilinx ZynqMP has SHA3 engine used for secure hash calculation. 681 This driver interfaces with SHA3 hardware engine. 682 Select this if you want to use the ZynqMP module 683 for SHA3 hash computation. 684 685source "drivers/crypto/chelsio/Kconfig" 686 687source "drivers/crypto/virtio/Kconfig" 688 689config CRYPTO_DEV_BCM_SPU 690 tristate "Broadcom symmetric crypto/hash acceleration support" 691 depends on ARCH_BCM_IPROC 692 depends on MAILBOX 693 default m 694 select CRYPTO_AUTHENC 695 select CRYPTO_LIB_DES 696 select CRYPTO_MD5 697 select CRYPTO_SHA1 698 select CRYPTO_SHA256 699 select CRYPTO_SHA512 700 help 701 This driver provides support for Broadcom crypto acceleration using the 702 Secure Processing Unit (SPU). The SPU driver registers skcipher, 703 ahash, and aead algorithms with the kernel cryptographic API. 704 705source "drivers/crypto/stm32/Kconfig" 706 707config CRYPTO_DEV_SAFEXCEL 708 tristate "Inside Secure's SafeXcel cryptographic engine driver" 709 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM 710 select CRYPTO_LIB_AES 711 select CRYPTO_AUTHENC 712 select CRYPTO_SKCIPHER 713 select CRYPTO_LIB_DES 714 select CRYPTO_HASH 715 select CRYPTO_HMAC 716 select CRYPTO_MD5 717 select CRYPTO_SHA1 718 select CRYPTO_SHA256 719 select CRYPTO_SHA512 720 select CRYPTO_CHACHA20POLY1305 721 select CRYPTO_SHA3 722 help 723 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic 724 engines designed by Inside Secure. It currently accelerates DES, 3DES and 725 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, 726 SHA384 and SHA512 hash algorithms for both basic hash and HMAC. 727 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. 728 729config CRYPTO_DEV_ARTPEC6 730 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 731 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 732 depends on OF 733 select CRYPTO_AEAD 734 select CRYPTO_AES 735 select CRYPTO_ALGAPI 736 select CRYPTO_SKCIPHER 737 select CRYPTO_CTR 738 select CRYPTO_HASH 739 select CRYPTO_SHA1 740 select CRYPTO_SHA256 741 select CRYPTO_SHA512 742 help 743 Enables the driver for the on-chip crypto accelerator 744 of Axis ARTPEC SoCs. 745 746 To compile this driver as a module, choose M here. 747 748config CRYPTO_DEV_CCREE 749 tristate "Support for ARM TrustZone CryptoCell family of security processors" 750 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 751 depends on HAS_IOMEM 752 select CRYPTO_HASH 753 select CRYPTO_SKCIPHER 754 select CRYPTO_LIB_DES 755 select CRYPTO_AEAD 756 select CRYPTO_AUTHENC 757 select CRYPTO_SHA1 758 select CRYPTO_MD5 759 select CRYPTO_SHA256 760 select CRYPTO_SHA512 761 select CRYPTO_HMAC 762 select CRYPTO_AES 763 select CRYPTO_CBC 764 select CRYPTO_ECB 765 select CRYPTO_CTR 766 select CRYPTO_XTS 767 select CRYPTO_SM4_GENERIC 768 select CRYPTO_SM3_GENERIC 769 help 770 Say 'Y' to enable a driver for the REE interface of the Arm 771 TrustZone CryptoCell family of processors. Currently the 772 CryptoCell 713, 703, 712, 710 and 630 are supported. 773 Choose this if you wish to use hardware acceleration of 774 cryptographic operations on the system REE. 775 If unsure say Y. 776 777source "drivers/crypto/hisilicon/Kconfig" 778 779source "drivers/crypto/amlogic/Kconfig" 780 781config CRYPTO_DEV_SA2UL 782 tristate "Support for TI security accelerator" 783 depends on ARCH_K3 || COMPILE_TEST 784 select CRYPTO_AES 785 select CRYPTO_ALGAPI 786 select CRYPTO_AUTHENC 787 select CRYPTO_DES 788 select CRYPTO_SHA1 789 select CRYPTO_SHA256 790 select CRYPTO_SHA512 791 select HW_RANDOM 792 select SG_SPLIT 793 help 794 K3 devices include a security accelerator engine that may be 795 used for crypto offload. Select this if you want to use hardware 796 acceleration for cryptographic algorithms on these devices. 797 798source "drivers/crypto/aspeed/Kconfig" 799source "drivers/crypto/starfive/Kconfig" 800 801endif # CRYPTO_HW 802