1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * RK3399-based FriendlyElec boards device tree source 4 * 5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 6 * 7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. 8 * (http://www.friendlyarm.com) 9 * 10 * Copyright (c) 2018 Collabora Ltd. 11 * Copyright (c) 2019 Arm Ltd. 12 */ 13 14/dts-v1/; 15#include <dt-bindings/input/linux-event-codes.h> 16#include "rk3399.dtsi" 17#include "rk3399-opp.dtsi" 18 19/ { 20 aliases { 21 ethernet0 = &gmac; 22 mmc0 = &sdio0; 23 mmc1 = &sdmmc; 24 mmc2 = &sdhci; 25 }; 26 27 chosen { 28 stdout-path = "serial2:1500000n8"; 29 }; 30 31 clkin_gmac: external-gmac-clock { 32 compatible = "fixed-clock"; 33 clock-frequency = <125000000>; 34 clock-output-names = "clkin_gmac"; 35 #clock-cells = <0>; 36 }; 37 38 vcc3v3_sys: vcc3v3-sys { 39 compatible = "regulator-fixed"; 40 regulator-always-on; 41 regulator-boot-on; 42 regulator-min-microvolt = <3300000>; 43 regulator-max-microvolt = <3300000>; 44 regulator-name = "vcc3v3_sys"; 45 }; 46 47 vcc5v0_sys: vcc5v0-sys { 48 compatible = "regulator-fixed"; 49 regulator-always-on; 50 regulator-boot-on; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 regulator-name = "vcc5v0_sys"; 54 vin-supply = <&vdd_5v>; 55 }; 56 57 /* switched by pmic_sleep */ 58 vcc1v8_s3: vcc1v8-s3 { 59 compatible = "regulator-fixed"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <1800000>; 63 regulator-max-microvolt = <1800000>; 64 regulator-name = "vcc1v8_s3"; 65 vin-supply = <&vcc_1v8>; 66 }; 67 68 vcc3v0_sd: vcc3v0-sd { 69 compatible = "regulator-fixed"; 70 enable-active-high; 71 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 72 pinctrl-names = "default"; 73 pinctrl-0 = <&sdmmc0_pwr_h>; 74 regulator-always-on; 75 regulator-min-microvolt = <3000000>; 76 regulator-max-microvolt = <3000000>; 77 regulator-name = "vcc3v0_sd"; 78 vin-supply = <&vcc3v3_sys>; 79 }; 80 81 /* 82 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only 83 * drives the enable pin, but we can't quite model that. 84 */ 85 vcca0v9_s3: vcca0v9-s3 { 86 compatible = "regulator-fixed"; 87 regulator-min-microvolt = <900000>; 88 regulator-max-microvolt = <900000>; 89 regulator-name = "vcca0v9_s3"; 90 vin-supply = <&vcc1v8_s3>; 91 }; 92 93 /* As above, actually supplied by vcc3v3_sys */ 94 vcca1v8_s3: vcca1v8-s3 { 95 compatible = "regulator-fixed"; 96 regulator-min-microvolt = <1800000>; 97 regulator-max-microvolt = <1800000>; 98 regulator-name = "vcca1v8_s3"; 99 vin-supply = <&vcc1v8_s3>; 100 }; 101 102 vbus_typec: vbus-typec { 103 compatible = "regulator-fixed"; 104 regulator-min-microvolt = <5000000>; 105 regulator-max-microvolt = <5000000>; 106 regulator-name = "vbus_typec"; 107 }; 108 109 gpio-keys { 110 compatible = "gpio-keys"; 111 autorepeat; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&power_key>; 114 115 key-power { 116 debounce-interval = <100>; 117 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 118 label = "GPIO Key Power"; 119 linux,code = <KEY_POWER>; 120 wakeup-source; 121 }; 122 }; 123 124 leds: gpio-leds { 125 compatible = "gpio-leds"; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&status_led_pin>; 128 129 status_led: led-0 { 130 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 131 label = "status_led"; 132 linux,default-trigger = "heartbeat"; 133 }; 134 }; 135 136 sdio_pwrseq: sdio-pwrseq { 137 compatible = "mmc-pwrseq-simple"; 138 clocks = <&rk808 1>; 139 clock-names = "ext_clock"; 140 pinctrl-names = "default"; 141 pinctrl-0 = <&wifi_reg_on_h>; 142 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 143 }; 144}; 145 146&cpu_b0 { 147 cpu-supply = <&vdd_cpu_b>; 148}; 149 150&cpu_b1 { 151 cpu-supply = <&vdd_cpu_b>; 152}; 153 154&cpu_l0 { 155 cpu-supply = <&vdd_cpu_l>; 156}; 157 158&cpu_l1 { 159 cpu-supply = <&vdd_cpu_l>; 160}; 161 162&cpu_l2 { 163 cpu-supply = <&vdd_cpu_l>; 164}; 165 166&cpu_l3 { 167 cpu-supply = <&vdd_cpu_l>; 168}; 169 170&emmc_phy { 171 rockchip,enable-strobe-pulldown; 172 status = "okay"; 173}; 174 175&gmac { 176 assigned-clock-parents = <&clkin_gmac>; 177 assigned-clocks = <&cru SCLK_RMII_SRC>; 178 clock_in_out = "input"; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; 181 phy-handle = <&rtl8211e>; 182 phy-mode = "rgmii"; 183 phy-supply = <&vcc3v3_s3>; 184 tx_delay = <0x28>; 185 rx_delay = <0x11>; 186 status = "okay"; 187 188 mdio { 189 compatible = "snps,dwmac-mdio"; 190 #address-cells = <1>; 191 #size-cells = <0>; 192 193 rtl8211e: ethernet-phy@1 { 194 reg = <1>; 195 interrupt-parent = <&gpio3>; 196 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 197 reset-assert-us = <10000>; 198 reset-deassert-us = <30000>; 199 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 200 }; 201 }; 202}; 203 204&gpu { 205 mali-supply = <&vdd_gpu>; 206 status = "okay"; 207}; 208 209&hdmi { 210 ddc-i2c-bus = <&i2c7>; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&hdmi_cec>; 213 status = "okay"; 214}; 215 216&hdmi_sound { 217 status = "okay"; 218}; 219 220&i2c0 { 221 clock-frequency = <400000>; 222 i2c-scl-rising-time-ns = <160>; 223 i2c-scl-falling-time-ns = <30>; 224 status = "okay"; 225 226 vdd_cpu_b: regulator@40 { 227 compatible = "silergy,syr827"; 228 reg = <0x40>; 229 fcs,suspend-voltage-selector = <1>; 230 pinctrl-names = "default"; 231 pinctrl-0 = <&cpu_b_sleep>; 232 regulator-always-on; 233 regulator-boot-on; 234 regulator-min-microvolt = <712500>; 235 regulator-max-microvolt = <1500000>; 236 regulator-name = "vdd_cpu_b"; 237 regulator-ramp-delay = <1000>; 238 vin-supply = <&vcc3v3_sys>; 239 240 regulator-state-mem { 241 regulator-off-in-suspend; 242 }; 243 }; 244 245 vdd_gpu: regulator@41 { 246 compatible = "silergy,syr828"; 247 reg = <0x41>; 248 fcs,suspend-voltage-selector = <1>; 249 pinctrl-names = "default"; 250 pinctrl-0 = <&gpu_sleep>; 251 regulator-always-on; 252 regulator-boot-on; 253 regulator-min-microvolt = <712500>; 254 regulator-max-microvolt = <1500000>; 255 regulator-name = "vdd_gpu"; 256 regulator-ramp-delay = <1000>; 257 vin-supply = <&vcc3v3_sys>; 258 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 }; 262 }; 263 264 rk808: pmic@1b { 265 compatible = "rockchip,rk808"; 266 reg = <0x1b>; 267 clock-output-names = "xin32k", "rtc_clko_wifi"; 268 #clock-cells = <1>; 269 interrupt-parent = <&gpio1>; 270 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>; 273 rockchip,system-power-controller; 274 wakeup-source; 275 276 vcc1-supply = <&vcc3v3_sys>; 277 vcc2-supply = <&vcc3v3_sys>; 278 vcc3-supply = <&vcc3v3_sys>; 279 vcc4-supply = <&vcc3v3_sys>; 280 vcc6-supply = <&vcc3v3_sys>; 281 vcc7-supply = <&vcc3v3_sys>; 282 vcc8-supply = <&vcc3v3_sys>; 283 vcc9-supply = <&vcc3v3_sys>; 284 vcc10-supply = <&vcc3v3_sys>; 285 vcc11-supply = <&vcc3v3_sys>; 286 vcc12-supply = <&vcc3v3_sys>; 287 vddio-supply = <&vcc_3v0>; 288 289 regulators { 290 vdd_center: DCDC_REG1 { 291 regulator-always-on; 292 regulator-boot-on; 293 regulator-min-microvolt = <750000>; 294 regulator-max-microvolt = <1350000>; 295 regulator-name = "vdd_center"; 296 regulator-ramp-delay = <6001>; 297 298 regulator-state-mem { 299 regulator-off-in-suspend; 300 }; 301 }; 302 303 vdd_cpu_l: DCDC_REG2 { 304 regulator-always-on; 305 regulator-boot-on; 306 regulator-min-microvolt = <750000>; 307 regulator-max-microvolt = <1350000>; 308 regulator-name = "vdd_cpu_l"; 309 regulator-ramp-delay = <6001>; 310 311 regulator-state-mem { 312 regulator-off-in-suspend; 313 }; 314 }; 315 316 vcc_ddr: DCDC_REG3 { 317 regulator-always-on; 318 regulator-boot-on; 319 regulator-name = "vcc_ddr"; 320 321 regulator-state-mem { 322 regulator-on-in-suspend; 323 }; 324 }; 325 326 vcc_1v8: DCDC_REG4 { 327 regulator-always-on; 328 regulator-boot-on; 329 regulator-min-microvolt = <1800000>; 330 regulator-max-microvolt = <1800000>; 331 regulator-name = "vcc_1v8"; 332 333 regulator-state-mem { 334 regulator-on-in-suspend; 335 regulator-suspend-microvolt = <1800000>; 336 }; 337 }; 338 339 vcc1v8_cam: LDO_REG1 { 340 regulator-always-on; 341 regulator-boot-on; 342 regulator-min-microvolt = <1800000>; 343 regulator-max-microvolt = <1800000>; 344 regulator-name = "vcc1v8_cam"; 345 346 regulator-state-mem { 347 regulator-off-in-suspend; 348 }; 349 }; 350 351 vcc3v0_touch: LDO_REG2 { 352 regulator-always-on; 353 regulator-boot-on; 354 regulator-min-microvolt = <3000000>; 355 regulator-max-microvolt = <3000000>; 356 regulator-name = "vcc3v0_touch"; 357 358 regulator-state-mem { 359 regulator-off-in-suspend; 360 }; 361 }; 362 363 vcc1v8_pmupll: LDO_REG3 { 364 regulator-always-on; 365 regulator-boot-on; 366 regulator-min-microvolt = <1800000>; 367 regulator-max-microvolt = <1800000>; 368 regulator-name = "vcc1v8_pmupll"; 369 370 regulator-state-mem { 371 regulator-on-in-suspend; 372 regulator-suspend-microvolt = <1800000>; 373 }; 374 }; 375 376 vcc_sdio: LDO_REG4 { 377 regulator-always-on; 378 regulator-boot-on; 379 regulator-min-microvolt = <1800000>; 380 regulator-max-microvolt = <3300000>; 381 regulator-name = "vcc_sdio"; 382 383 regulator-state-mem { 384 regulator-on-in-suspend; 385 regulator-suspend-microvolt = <3000000>; 386 }; 387 }; 388 389 vcca3v0_codec: LDO_REG5 { 390 regulator-always-on; 391 regulator-boot-on; 392 regulator-min-microvolt = <3000000>; 393 regulator-max-microvolt = <3000000>; 394 regulator-name = "vcca3v0_codec"; 395 396 regulator-state-mem { 397 regulator-off-in-suspend; 398 }; 399 }; 400 401 vcc_1v5: LDO_REG6 { 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <1500000>; 405 regulator-max-microvolt = <1500000>; 406 regulator-name = "vcc_1v5"; 407 408 regulator-state-mem { 409 regulator-on-in-suspend; 410 regulator-suspend-microvolt = <1500000>; 411 }; 412 }; 413 414 vcca1v8_codec: LDO_REG7 { 415 regulator-always-on; 416 regulator-boot-on; 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <1800000>; 419 regulator-name = "vcca1v8_codec"; 420 421 regulator-state-mem { 422 regulator-off-in-suspend; 423 }; 424 }; 425 426 vcc_3v0: LDO_REG8 { 427 regulator-always-on; 428 regulator-boot-on; 429 regulator-min-microvolt = <3000000>; 430 regulator-max-microvolt = <3000000>; 431 regulator-name = "vcc_3v0"; 432 433 regulator-state-mem { 434 regulator-on-in-suspend; 435 regulator-suspend-microvolt = <3000000>; 436 }; 437 }; 438 439 vcc3v3_s3: SWITCH_REG1 { 440 regulator-always-on; 441 regulator-boot-on; 442 regulator-name = "vcc3v3_s3"; 443 444 regulator-state-mem { 445 regulator-off-in-suspend; 446 }; 447 }; 448 449 vcc3v3_s0: SWITCH_REG2 { 450 regulator-always-on; 451 regulator-boot-on; 452 regulator-name = "vcc3v3_s0"; 453 454 regulator-state-mem { 455 regulator-off-in-suspend; 456 }; 457 }; 458 }; 459 }; 460}; 461 462&i2c1 { 463 clock-frequency = <200000>; 464 i2c-scl-rising-time-ns = <150>; 465 i2c-scl-falling-time-ns = <30>; 466 status = "okay"; 467}; 468 469&i2c2 { 470 status = "okay"; 471}; 472 473&i2c4 { 474 clock-frequency = <400000>; 475 i2c-scl-rising-time-ns = <160>; 476 i2c-scl-falling-time-ns = <30>; 477 status = "okay"; 478 479 fusb0: typec-portc@22 { 480 compatible = "fcs,fusb302"; 481 reg = <0x22>; 482 interrupt-parent = <&gpio1>; 483 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 484 pinctrl-names = "default"; 485 pinctrl-0 = <&fusb0_int>; 486 vbus-supply = <&vbus_typec>; 487 }; 488}; 489 490&i2c7 { 491 status = "okay"; 492}; 493 494&i2s2 { 495 status = "okay"; 496}; 497 498&io_domains { 499 bt656-supply = <&vcc_1v8>; 500 audio-supply = <&vcca1v8_codec>; 501 sdmmc-supply = <&vcc_sdio>; 502 gpio1830-supply = <&vcc_3v0>; 503 status = "okay"; 504}; 505 506&pcie_phy { 507 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 508 assigned-clock-rates = <100000000>; 509 assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 510 status = "okay"; 511}; 512 513&pcie0 { 514 num-lanes = <2>; 515 vpcie0v9-supply = <&vcca0v9_s3>; 516 vpcie1v8-supply = <&vcca1v8_s3>; 517 status = "okay"; 518}; 519 520&pinctrl { 521 fusb30x { 522 fusb0_int: fusb0-int { 523 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 524 }; 525 }; 526 527 gpio-leds { 528 status_led_pin: status-led-pin { 529 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 530 }; 531 }; 532 533 gmac { 534 phy_intb: phy-intb { 535 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 536 }; 537 538 phy_rstb: phy-rstb { 539 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 540 }; 541 }; 542 543 pmic { 544 cpu_b_sleep: cpu-b-sleep { 545 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 546 }; 547 548 gpu_sleep: gpu-sleep { 549 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 550 }; 551 552 pmic_int_l: pmic-int-l { 553 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 554 }; 555 }; 556 557 rockchip-key { 558 power_key: power-key { 559 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 560 }; 561 }; 562 563 sdio { 564 bt_host_wake_l: bt-host-wake-l { 565 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 566 }; 567 568 bt_reg_on_h: bt-reg-on-h { 569 /* external pullup to VCC1V8_PMUPLL */ 570 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 571 }; 572 573 bt_wake_l: bt-wake-l { 574 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 575 }; 576 577 wifi_reg_on_h: wifi-reg_on-h { 578 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 579 }; 580 }; 581 582 sdmmc { 583 sdmmc0_det_l: sdmmc0-det-l { 584 rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 585 }; 586 587 sdmmc0_pwr_h: sdmmc0-pwr-h { 588 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 589 }; 590 }; 591}; 592 593&pmu_io_domains { 594 pmu1830-supply = <&vcc_3v0>; 595 status = "okay"; 596}; 597 598&pwm0 { 599 status = "okay"; 600}; 601 602&pwm1 { 603 status = "okay"; 604}; 605 606&pwm2 { 607 pinctrl-names = "active"; 608 pinctrl-0 = <&pwm2_pin_pull_down>; 609 status = "okay"; 610}; 611 612&saradc { 613 vref-supply = <&vcca1v8_s3>; 614 status = "okay"; 615}; 616 617&sdhci { 618 bus-width = <8>; 619 mmc-hs200-1_8v; 620 non-removable; 621 status = "okay"; 622}; 623 624&sdio0 { 625 bus-width = <4>; 626 cap-sd-highspeed; 627 cap-sdio-irq; 628 keep-power-in-suspend; 629 mmc-pwrseq = <&sdio_pwrseq>; 630 non-removable; 631 pinctrl-names = "default"; 632 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 633 sd-uhs-sdr104; 634 status = "okay"; 635}; 636 637&sdmmc { 638 bus-width = <4>; 639 cap-sd-highspeed; 640 cap-mmc-highspeed; 641 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 642 disable-wp; 643 pinctrl-names = "default"; 644 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; 645 sd-uhs-sdr104; 646 vmmc-supply = <&vcc3v0_sd>; 647 vqmmc-supply = <&vcc_sdio>; 648 status = "okay"; 649}; 650 651&tcphy0 { 652 status = "okay"; 653}; 654 655&tcphy1 { 656 status = "okay"; 657}; 658 659&tsadc { 660 /* tshut mode 0:CRU 1:GPIO */ 661 rockchip,hw-tshut-mode = <1>; 662 /* tshut polarity 0:LOW 1:HIGH */ 663 rockchip,hw-tshut-polarity = <1>; 664 status = "okay"; 665}; 666 667&u2phy0 { 668 status = "okay"; 669}; 670 671&u2phy0_host { 672 status = "okay"; 673}; 674 675&u2phy0_otg { 676 status = "okay"; 677}; 678 679&u2phy1 { 680 status = "okay"; 681}; 682 683&u2phy1_host { 684 status = "okay"; 685}; 686 687&u2phy1_otg { 688 status = "okay"; 689}; 690 691&uart0 { 692 pinctrl-names = "default"; 693 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>; 694 status = "okay"; 695 696 bluetooth { 697 compatible = "brcm,bcm43438-bt"; 698 clocks = <&rk808 1>; 699 clock-names = "lpo"; 700 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 701 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 702 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 703 max-speed = <4000000>; 704 pinctrl-names = "default"; 705 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>; 706 vbat-supply = <&vcc3v3_sys>; 707 vddio-supply = <&vcc_1v8>; 708 }; 709}; 710 711&uart2 { 712 status = "okay"; 713}; 714 715&usbdrd3_0 { 716 status = "okay"; 717}; 718 719&usbdrd3_1 { 720 status = "okay"; 721}; 722 723&usbdrd_dwc3_0 { 724 status = "okay"; 725}; 726 727&usbdrd_dwc3_1 { 728 dr_mode = "host"; 729 status = "okay"; 730}; 731 732&usb_host0_ehci { 733 status = "okay"; 734}; 735 736&usb_host0_ohci { 737 status = "okay"; 738}; 739 740&usb_host1_ehci { 741 status = "okay"; 742}; 743 744&usb_host1_ohci { 745 status = "okay"; 746}; 747 748&vopb { 749 status = "okay"; 750}; 751 752&vopb_mmu { 753 status = "okay"; 754}; 755 756&vopl { 757 status = "okay"; 758}; 759 760&vopl_mmu { 761 status = "okay"; 762}; 763