xref: /linux/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml (revision e6a901a00822659181c93c86d8bbc2a17779fddc)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11
12allOf:
13  - $ref: sdhci-common.yaml#
14
15description: |
16  The Enhanced Secure Digital Host Controller on Freescale i.MX family
17  provides an interface for MMC, SD, and SDIO types of memory cards.
18
19  This file documents differences between the core properties described
20  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
21
22properties:
23  compatible:
24    oneOf:
25      - enum:
26          - fsl,imx25-esdhc
27          - fsl,imx35-esdhc
28          - fsl,imx51-esdhc
29          - fsl,imx53-esdhc
30          - fsl,imx6q-usdhc
31          - fsl,imx6sl-usdhc
32          - fsl,imx6sx-usdhc
33          - fsl,imx7d-usdhc
34          - fsl,imx7ulp-usdhc
35          - fsl,imx8mm-usdhc
36          - fsl,imxrt1050-usdhc
37          - nxp,s32g2-usdhc
38      - items:
39          - const: fsl,imx50-esdhc
40          - const: fsl,imx53-esdhc
41      - items:
42          - enum:
43              - fsl,imx6sll-usdhc
44              - fsl,imx6ull-usdhc
45              - fsl,imx6ul-usdhc
46          - const: fsl,imx6sx-usdhc
47      - items:
48          - const: fsl,imx7d-usdhc
49          - const: fsl,imx6sl-usdhc
50      - items:
51          - enum:
52              - fsl,imx8mq-usdhc
53          - const: fsl,imx7d-usdhc
54      - items:
55          - enum:
56              - fsl,imx8mn-usdhc
57              - fsl,imx8mp-usdhc
58              - fsl,imx8ulp-usdhc
59              - fsl,imx93-usdhc
60              - fsl,imx95-usdhc
61          - const: fsl,imx8mm-usdhc
62      - items:
63          - enum:
64              - fsl,imx8dxl-usdhc
65              - fsl,imx8qm-usdhc
66          - const: fsl,imx8qxp-usdhc
67      - items:
68          - enum:
69              - fsl,imx8mm-usdhc
70              - fsl,imx8mn-usdhc
71              - fsl,imx8mp-usdhc
72              - fsl,imx8qm-usdhc
73              - fsl,imx8qxp-usdhc
74          - const: fsl,imx7d-usdhc
75        deprecated: true
76      - items:
77          - enum:
78              - fsl,imx8mn-usdhc
79              - fsl,imx8mp-usdhc
80          - const: fsl,imx8mm-usdhc
81          - const: fsl,imx7d-usdhc
82        deprecated: true
83      - items:
84          - enum:
85              - fsl,imx8dxl-usdhc
86              - fsl,imx8qm-usdhc
87          - const: fsl,imx8qxp-usdhc
88          - const: fsl,imx7d-usdhc
89        deprecated: true
90      - items:
91          - enum:
92              - fsl,imxrt1170-usdhc
93          - const: fsl,imxrt1050-usdhc
94
95  reg:
96    maxItems: 1
97
98  interrupts:
99    maxItems: 1
100
101  fsl,wp-controller:
102    description: |
103      boolean, if present, indicate to use controller internal write protection.
104    type: boolean
105
106  fsl,delay-line:
107    $ref: /schemas/types.yaml#/definitions/uint32
108    description: |
109      Specify the number of delay cells for override mode.
110      This is used to set the clock delay for DLL(Delay Line) on override mode
111      to select a proper data sampling window in case the clock quality is not good
112      because the signal path is too long on the board. Please refer to eSDHC/uSDHC
113      chapter, DLL (Delay Line) section in RM for details.
114    default: 0
115
116  voltage-ranges:
117    $ref: /schemas/types.yaml#/definitions/uint32-matrix
118    description: |
119      Specify the voltage range in case there are software transparent level
120      shifters on the outputs of the controller. Two cells are required, first
121      cell specifies minimum slot voltage (mV), second cell specifies maximum
122      slot voltage (mV).
123    items:
124      items:
125        - description: value for minimum slot voltage
126        - description: value for maximum slot voltage
127    maxItems: 1
128
129  fsl,tuning-start-tap:
130    $ref: /schemas/types.yaml#/definitions/uint32
131    description: |
132      Specify the start delay cell point when send first CMD19 in tuning procedure.
133    default: 0
134
135  fsl,tuning-step:
136    $ref: /schemas/types.yaml#/definitions/uint32
137    description: |
138      Specify the increasing delay cell steps in tuning procedure.
139      The uSDHC use one delay cell as default increasing step to do tuning process.
140      This property allows user to change the tuning step to more than one delay
141      cell which is useful for some special boards or cards when the default
142      tuning step can't find the proper delay window within limited tuning retries.
143    default: 0
144
145  fsl,strobe-dll-delay-target:
146    $ref: /schemas/types.yaml#/definitions/uint32
147    description: |
148      Specify the strobe dll control slave delay target.
149      This delay target programming host controller loopback read clock, and this
150      property allows user to change the delay target for the strobe input read clock.
151      If not use this property, driver default set the delay target to value 7.
152      Only eMMC HS400 mode need to take care of this property.
153    default: 0
154
155  clocks:
156    maxItems: 3
157    description:
158      Handle clocks for the sdhc controller.
159
160  clock-names:
161    items:
162      - const: ipg
163      - const: ahb
164      - const: per
165
166  iommus:
167    maxItems: 1
168
169  power-domains:
170    maxItems: 1
171
172  pinctrl-names:
173    oneOf:
174      - minItems: 3
175        items:
176          - const: default
177          - const: state_100mhz
178          - const: state_200mhz
179          - const: sleep
180      - minItems: 2
181        items:
182          - const: default
183          - const: state_100mhz
184          - const: sleep
185      - minItems: 1
186        items:
187          - const: default
188          - const: sleep
189
190required:
191  - compatible
192  - reg
193  - interrupts
194
195unevaluatedProperties: false
196
197examples:
198  - |
199    mmc@70004000 {
200        compatible = "fsl,imx51-esdhc";
201        reg = <0x70004000 0x4000>;
202        interrupts = <1>;
203        fsl,wp-controller;
204    };
205
206    mmc@70008000 {
207        compatible = "fsl,imx51-esdhc";
208        reg = <0x70008000 0x4000>;
209        interrupts = <2>;
210        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
211        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
212    };
213