1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include "mt76_connac.h" 5 #include "mt76_connac2_mac.h" 6 #include "dma.h" 7 8 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f) 9 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\ 10 IEEE80211_RADIOTAP_HE_##f) 11 12 void mt76_connac_gen_ppe_thresh(u8 *he_ppet, int nss) 13 { 14 static const u8 ppet16_ppet8_ru3_ru0[] = { 0x1c, 0xc7, 0x71 }; 15 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */ 16 17 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) | 18 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, 19 ru_bit_mask); 20 21 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE * 22 nss * hweight8(ru_bit_mask) * 2; 23 ppet_size = DIV_ROUND_UP(ppet_bits, 8); 24 25 for (i = 0; i < ppet_size - 1; i++) 26 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3]; 27 28 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] & 29 (0xff >> (8 - (ppet_bits - 1) % 8)); 30 } 31 EXPORT_SYMBOL_GPL(mt76_connac_gen_ppe_thresh); 32 33 int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm) 34 { 35 struct mt76_dev *dev = phy->dev; 36 37 if (mt76_is_usb(dev)) 38 return 0; 39 40 cancel_delayed_work_sync(&pm->ps_work); 41 if (!test_bit(MT76_STATE_PM, &phy->state)) 42 return 0; 43 44 if (pm->suspended) 45 return 0; 46 47 queue_work(dev->wq, &pm->wake_work); 48 if (!wait_event_timeout(pm->wait, 49 !test_bit(MT76_STATE_PM, &phy->state), 50 3 * HZ)) { 51 ieee80211_wake_queues(phy->hw); 52 return -ETIMEDOUT; 53 } 54 55 return 0; 56 } 57 EXPORT_SYMBOL_GPL(mt76_connac_pm_wake); 58 59 void mt76_connac_power_save_sched(struct mt76_phy *phy, 60 struct mt76_connac_pm *pm) 61 { 62 struct mt76_dev *dev = phy->dev; 63 64 if (mt76_is_usb(dev)) 65 return; 66 67 if (!pm->enable) 68 return; 69 70 if (pm->suspended) 71 return; 72 73 pm->last_activity = jiffies; 74 75 if (!test_bit(MT76_STATE_PM, &phy->state)) { 76 cancel_delayed_work(&phy->mac_work); 77 queue_delayed_work(dev->wq, &pm->ps_work, pm->idle_timeout); 78 } 79 } 80 EXPORT_SYMBOL_GPL(mt76_connac_power_save_sched); 81 82 void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, 83 struct mt76_wcid *wcid) 84 { 85 int i; 86 87 spin_lock_bh(&pm->txq_lock); 88 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 89 if (wcid && pm->tx_q[i].wcid != wcid) 90 continue; 91 92 dev_kfree_skb(pm->tx_q[i].skb); 93 pm->tx_q[i].skb = NULL; 94 } 95 spin_unlock_bh(&pm->txq_lock); 96 } 97 EXPORT_SYMBOL_GPL(mt76_connac_free_pending_tx_skbs); 98 99 void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw, 100 struct mt76_connac_pm *pm, 101 struct mt76_wcid *wcid, 102 struct sk_buff *skb) 103 { 104 int qid = skb_get_queue_mapping(skb); 105 struct mt76_phy *phy = hw->priv; 106 107 spin_lock_bh(&pm->txq_lock); 108 if (!pm->tx_q[qid].skb) { 109 ieee80211_stop_queues(hw); 110 pm->tx_q[qid].wcid = wcid; 111 pm->tx_q[qid].skb = skb; 112 queue_work(phy->dev->wq, &pm->wake_work); 113 } else { 114 dev_kfree_skb(skb); 115 } 116 spin_unlock_bh(&pm->txq_lock); 117 } 118 EXPORT_SYMBOL_GPL(mt76_connac_pm_queue_skb); 119 120 void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy, 121 struct mt76_connac_pm *pm) 122 { 123 int i; 124 125 spin_lock_bh(&pm->txq_lock); 126 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 127 struct mt76_wcid *wcid = pm->tx_q[i].wcid; 128 struct ieee80211_sta *sta = NULL; 129 130 if (!pm->tx_q[i].skb) 131 continue; 132 133 if (wcid && wcid->sta) 134 sta = container_of((void *)wcid, struct ieee80211_sta, 135 drv_priv); 136 137 mt76_tx(phy, sta, wcid, pm->tx_q[i].skb); 138 pm->tx_q[i].skb = NULL; 139 } 140 spin_unlock_bh(&pm->txq_lock); 141 142 mt76_worker_schedule(&phy->dev->tx_worker); 143 } 144 EXPORT_SYMBOL_GPL(mt76_connac_pm_dequeue_skbs); 145 146 void mt76_connac_tx_complete_skb(struct mt76_dev *mdev, 147 struct mt76_queue_entry *e) 148 { 149 if (!e->txwi) { 150 dev_kfree_skb_any(e->skb); 151 return; 152 } 153 154 if (e->skb) 155 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 156 } 157 EXPORT_SYMBOL_GPL(mt76_connac_tx_complete_skb); 158 159 void mt76_connac_write_hw_txp(struct mt76_dev *dev, 160 struct mt76_tx_info *tx_info, 161 void *txp_ptr, u32 id) 162 { 163 struct mt76_connac_hw_txp *txp = txp_ptr; 164 struct mt76_connac_txp_ptr *ptr = &txp->ptr[0]; 165 int i, nbuf = tx_info->nbuf - 1; 166 u32 last_mask; 167 168 tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp); 169 tx_info->nbuf = 1; 170 171 txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID); 172 173 if (is_mt7663(dev) || is_mt7921(dev) || is_mt7925(dev)) 174 last_mask = MT_TXD_LEN_LAST; 175 else 176 last_mask = MT_TXD_LEN_AMSDU_LAST | 177 MT_TXD_LEN_MSDU_LAST; 178 179 for (i = 0; i < nbuf; i++) { 180 u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK; 181 u32 addr = tx_info->buf[i + 1].addr; 182 183 if (i == nbuf - 1) 184 len |= last_mask; 185 186 if (i & 1) { 187 ptr->buf1 = cpu_to_le32(addr); 188 ptr->len1 = cpu_to_le16(len); 189 ptr++; 190 } else { 191 ptr->buf0 = cpu_to_le32(addr); 192 ptr->len0 = cpu_to_le16(len); 193 } 194 } 195 } 196 EXPORT_SYMBOL_GPL(mt76_connac_write_hw_txp); 197 198 static void 199 mt76_connac_txp_skb_unmap_fw(struct mt76_dev *mdev, 200 struct mt76_connac_fw_txp *txp) 201 { 202 struct device *dev = is_connac_v1(mdev) ? mdev->dev : mdev->dma_dev; 203 int i; 204 205 for (i = 0; i < txp->nbuf; i++) 206 dma_unmap_single(dev, le32_to_cpu(txp->buf[i]), 207 le16_to_cpu(txp->len[i]), DMA_TO_DEVICE); 208 } 209 210 static void 211 mt76_connac_txp_skb_unmap_hw(struct mt76_dev *dev, 212 struct mt76_connac_hw_txp *txp) 213 { 214 u32 last_mask; 215 int i; 216 217 if (is_mt7663(dev) || is_mt7921(dev) || is_mt7925(dev)) 218 last_mask = MT_TXD_LEN_LAST; 219 else 220 last_mask = MT_TXD_LEN_MSDU_LAST; 221 222 for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) { 223 struct mt76_connac_txp_ptr *ptr = &txp->ptr[i]; 224 bool last; 225 u16 len; 226 227 len = le16_to_cpu(ptr->len0); 228 last = len & last_mask; 229 len &= MT_TXD_LEN_MASK; 230 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len, 231 DMA_TO_DEVICE); 232 if (last) 233 break; 234 235 len = le16_to_cpu(ptr->len1); 236 last = len & last_mask; 237 len &= MT_TXD_LEN_MASK; 238 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len, 239 DMA_TO_DEVICE); 240 if (last) 241 break; 242 } 243 } 244 245 void mt76_connac_txp_skb_unmap(struct mt76_dev *dev, 246 struct mt76_txwi_cache *t) 247 { 248 struct mt76_connac_txp_common *txp; 249 250 txp = mt76_connac_txwi_to_txp(dev, t); 251 if (is_mt76_fw_txp(dev)) 252 mt76_connac_txp_skb_unmap_fw(dev, &txp->fw); 253 else 254 mt76_connac_txp_skb_unmap_hw(dev, &txp->hw); 255 } 256 EXPORT_SYMBOL_GPL(mt76_connac_txp_skb_unmap); 257 258 int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc, 259 int ring_base, u32 flags) 260 { 261 int i, err; 262 263 err = mt76_init_tx_queue(phy, 0, idx, n_desc, ring_base, flags); 264 if (err < 0) 265 return err; 266 267 for (i = 1; i <= MT_TXQ_PSD; i++) 268 phy->q_tx[i] = phy->q_tx[0]; 269 270 return 0; 271 } 272 EXPORT_SYMBOL_GPL(mt76_connac_init_tx_queues); 273 274 #define __bitrate_mask_check(_mcs, _mode) \ 275 ({ \ 276 u8 i = 0; \ 277 for (nss = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 278 if (!mask->control[band]._mcs[i]) \ 279 continue; \ 280 if (hweight16(mask->control[band]._mcs[i]) == 1) { \ 281 mode = MT_PHY_TYPE_##_mode; \ 282 rateidx = ffs(mask->control[band]._mcs[i]) - 1; \ 283 if (mode == MT_PHY_TYPE_HT) \ 284 rateidx += 8 * i; \ 285 else \ 286 nss = i + 1; \ 287 goto out; \ 288 } \ 289 } \ 290 }) 291 292 u16 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy, 293 struct ieee80211_vif *vif, 294 bool beacon, bool mcast) 295 { 296 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 297 struct cfg80211_chan_def *chandef = mvif->ctx ? 298 &mvif->ctx->def : &mphy->chandef; 299 u8 nss = 0, mode = 0, band = chandef->chan->band; 300 int rateidx = 0, mcast_rate; 301 302 if (!vif) 303 goto legacy; 304 305 if (is_mt7921(mphy->dev)) { 306 rateidx = ffs(vif->bss_conf.basic_rates) - 1; 307 goto legacy; 308 } 309 310 if (beacon) { 311 struct cfg80211_bitrate_mask *mask; 312 313 mask = &vif->bss_conf.beacon_tx_rate; 314 315 __bitrate_mask_check(he_mcs, HE_SU); 316 __bitrate_mask_check(vht_mcs, VHT); 317 __bitrate_mask_check(ht_mcs, HT); 318 319 if (hweight32(mask->control[band].legacy) == 1) { 320 rateidx = ffs(mask->control[band].legacy) - 1; 321 goto legacy; 322 } 323 } 324 325 mcast_rate = vif->bss_conf.mcast_rate[band]; 326 if (mcast && mcast_rate > 0) 327 rateidx = mcast_rate - 1; 328 else 329 rateidx = ffs(vif->bss_conf.basic_rates) - 1; 330 331 legacy: 332 rateidx = mt76_calculate_default_rate(mphy, vif, rateidx); 333 mode = rateidx >> 8; 334 rateidx &= GENMASK(7, 0); 335 out: 336 return FIELD_PREP(MT_TX_RATE_NSS, nss) | 337 FIELD_PREP(MT_TX_RATE_IDX, rateidx) | 338 FIELD_PREP(MT_TX_RATE_MODE, mode); 339 } 340 EXPORT_SYMBOL_GPL(mt76_connac2_mac_tx_rate_val); 341 342 static void 343 mt76_connac2_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb, 344 struct mt76_wcid *wcid) 345 { 346 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 347 u8 fc_type, fc_stype; 348 u16 ethertype; 349 bool wmm = false; 350 u32 val; 351 352 if (wcid->sta) { 353 struct ieee80211_sta *sta; 354 355 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv); 356 wmm = sta->wme; 357 } 358 359 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) | 360 FIELD_PREP(MT_TXD1_TID, tid); 361 362 ethertype = get_unaligned_be16(&skb->data[12]); 363 if (ethertype >= ETH_P_802_3_MIN) 364 val |= MT_TXD1_ETH_802_3; 365 366 txwi[1] |= cpu_to_le32(val); 367 368 fc_type = IEEE80211_FTYPE_DATA >> 2; 369 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0; 370 371 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 372 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 373 374 txwi[2] |= cpu_to_le32(val); 375 376 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 377 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 378 379 txwi[7] |= cpu_to_le32(val); 380 } 381 382 static void 383 mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, 384 struct sk_buff *skb, 385 struct ieee80211_key_conf *key) 386 { 387 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 388 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 389 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 390 bool multicast = is_multicast_ether_addr(hdr->addr1); 391 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 392 __le16 fc = hdr->frame_control; 393 u8 fc_type, fc_stype; 394 u32 val; 395 396 if (ieee80211_is_action(fc) && 397 mgmt->u.action.category == WLAN_CATEGORY_BACK && 398 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) { 399 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); 400 401 txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA); 402 tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK; 403 } else if (ieee80211_is_back_req(hdr->frame_control)) { 404 struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr; 405 u16 control = le16_to_cpu(bar->control); 406 407 tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control); 408 } 409 410 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | 411 FIELD_PREP(MT_TXD1_HDR_INFO, 412 ieee80211_get_hdrlen_from_skb(skb) / 2) | 413 FIELD_PREP(MT_TXD1_TID, tid); 414 415 txwi[1] |= cpu_to_le32(val); 416 417 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; 418 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; 419 420 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 421 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) | 422 FIELD_PREP(MT_TXD2_MULTICAST, multicast); 423 424 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) && 425 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { 426 val |= MT_TXD2_BIP; 427 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME); 428 } 429 430 if (!ieee80211_is_data(fc) || multicast || 431 info->flags & IEEE80211_TX_CTL_USE_MINRATE) 432 val |= MT_TXD2_FIX_RATE; 433 434 txwi[2] |= cpu_to_le32(val); 435 436 if (ieee80211_is_beacon(fc)) { 437 txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT); 438 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); 439 } 440 441 if (info->flags & IEEE80211_TX_CTL_INJECTED) { 442 u16 seqno = le16_to_cpu(hdr->seq_ctrl); 443 444 if (ieee80211_is_back_req(hdr->frame_control)) { 445 struct ieee80211_bar *bar; 446 447 bar = (struct ieee80211_bar *)skb->data; 448 seqno = le16_to_cpu(bar->start_seq_num); 449 } 450 451 val = MT_TXD3_SN_VALID | 452 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); 453 txwi[3] |= cpu_to_le32(val); 454 txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); 455 } 456 457 if (mt76_is_mmio(dev)) { 458 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 459 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 460 txwi[7] |= cpu_to_le32(val); 461 } else { 462 val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | 463 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); 464 txwi[8] |= cpu_to_le32(val); 465 } 466 } 467 468 void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 469 struct sk_buff *skb, struct mt76_wcid *wcid, 470 struct ieee80211_key_conf *key, int pid, 471 enum mt76_txq_id qid, u32 changed) 472 { 473 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 474 u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2; 475 struct ieee80211_vif *vif = info->control.vif; 476 struct mt76_phy *mphy = &dev->phy; 477 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0; 478 u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE; 479 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 480 bool beacon = !!(changed & (BSS_CHANGED_BEACON | 481 BSS_CHANGED_BEACON_ENABLED)); 482 bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP | 483 BSS_CHANGED_FILS_DISCOVERY)); 484 bool amsdu_en = wcid->amsdu; 485 486 if (vif) { 487 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 488 489 omac_idx = mvif->omac_idx; 490 wmm_idx = mvif->wmm_idx; 491 band_idx = mvif->band_idx; 492 } 493 494 if (phy_idx && dev->phys[MT_BAND1]) 495 mphy = dev->phys[MT_BAND1]; 496 497 if (inband_disc) { 498 p_fmt = MT_TX_TYPE_FW; 499 q_idx = MT_LMAC_ALTX0; 500 } else if (beacon) { 501 p_fmt = MT_TX_TYPE_FW; 502 q_idx = MT_LMAC_BCN0; 503 } else if (qid >= MT_TXQ_PSD) { 504 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 505 q_idx = MT_LMAC_ALTX0; 506 } else { 507 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 508 q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS + 509 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); 510 511 /* mt7915 WA only counts WED path */ 512 if (is_mt7915(dev) && mtk_wed_device_active(&dev->mmio.wed)) 513 wcid->stats.tx_packets++; 514 } 515 516 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | 517 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | 518 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 519 txwi[0] = cpu_to_le32(val); 520 521 val = MT_TXD1_LONG_FORMAT | 522 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | 523 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); 524 if (!is_mt7921(dev)) 525 val |= MT_TXD1_VTA; 526 if (phy_idx || band_idx) 527 val |= MT_TXD1_TGID; 528 529 txwi[1] = cpu_to_le32(val); 530 txwi[2] = 0; 531 532 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15); 533 if (!is_mt7921(dev)) 534 val |= MT_TXD3_SW_POWER_MGMT; 535 if (key) 536 val |= MT_TXD3_PROTECT_FRAME; 537 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 538 val |= MT_TXD3_NO_ACK; 539 540 txwi[3] = cpu_to_le32(val); 541 txwi[4] = 0; 542 543 val = FIELD_PREP(MT_TXD5_PID, pid); 544 if (pid >= MT_PACKET_ID_FIRST) { 545 val |= MT_TXD5_TX_STATUS_HOST; 546 amsdu_en = amsdu_en && !is_mt7921(dev); 547 } 548 549 txwi[5] = cpu_to_le32(val); 550 txwi[6] = 0; 551 txwi[7] = amsdu_en ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0; 552 553 if (is_8023) 554 mt76_connac2_mac_write_txwi_8023(txwi, skb, wcid); 555 else 556 mt76_connac2_mac_write_txwi_80211(dev, txwi, skb, key); 557 558 if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) { 559 /* Fixed rata is available just for 802.11 txd */ 560 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 561 bool multicast = ieee80211_is_data(hdr->frame_control) && 562 is_multicast_ether_addr(hdr->addr1); 563 u16 rate = mt76_connac2_mac_tx_rate_val(mphy, vif, beacon, 564 multicast); 565 u32 val = MT_TXD6_FIXED_BW; 566 567 /* hardware won't add HTC for mgmt/ctrl frame */ 568 txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD); 569 570 val |= FIELD_PREP(MT_TXD6_TX_RATE, rate); 571 txwi[6] |= cpu_to_le32(val); 572 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 573 574 if (!is_mt7921(dev)) { 575 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask); 576 577 if (!spe_idx) 578 spe_idx = 24 + phy_idx; 579 txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx)); 580 } 581 } 582 } 583 EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi); 584 585 bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, 586 __le32 *txs_data) 587 { 588 struct mt76_sta_stats *stats = &wcid->stats; 589 struct ieee80211_supported_band *sband; 590 struct mt76_phy *mphy; 591 struct rate_info rate = {}; 592 bool cck = false; 593 u32 txrate, txs, mode, stbc; 594 595 txs = le32_to_cpu(txs_data[0]); 596 597 /* PPDU based reporting */ 598 if (mtk_wed_device_active(&dev->mmio.wed) && 599 FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) { 600 stats->tx_bytes += 601 le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE) - 602 le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_BYTE); 603 stats->tx_failed += 604 le32_get_bits(txs_data[6], MT_TXS6_MPDU_FAIL_CNT); 605 stats->tx_retries += 606 le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_CNT); 607 608 if (wcid->sta) { 609 struct ieee80211_sta *sta; 610 u8 tid; 611 612 sta = container_of((void *)wcid, struct ieee80211_sta, 613 drv_priv); 614 tid = FIELD_GET(MT_TXS0_TID, txs); 615 616 ieee80211_refresh_tx_agg_session_timer(sta, tid); 617 } 618 } 619 620 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); 621 622 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 623 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 624 stbc = FIELD_GET(MT_TX_RATE_STBC, txrate); 625 626 if (stbc && rate.nss > 1) 627 rate.nss >>= 1; 628 629 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 630 stats->tx_nss[rate.nss - 1]++; 631 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 632 stats->tx_mcs[rate.mcs]++; 633 634 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 635 switch (mode) { 636 case MT_PHY_TYPE_CCK: 637 cck = true; 638 fallthrough; 639 case MT_PHY_TYPE_OFDM: 640 mphy = &dev->phy; 641 if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1]) 642 mphy = dev->phys[MT_BAND1]; 643 644 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 645 sband = &mphy->sband_5g.sband; 646 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 647 sband = &mphy->sband_6g.sband; 648 else 649 sband = &mphy->sband_2g.sband; 650 651 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck); 652 rate.legacy = sband->bitrates[rate.mcs].bitrate; 653 break; 654 case MT_PHY_TYPE_HT: 655 case MT_PHY_TYPE_HT_GF: 656 if (rate.mcs > 31) 657 return false; 658 659 rate.flags = RATE_INFO_FLAGS_MCS; 660 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 661 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 662 break; 663 case MT_PHY_TYPE_VHT: 664 if (rate.mcs > 9) 665 return false; 666 667 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 668 break; 669 case MT_PHY_TYPE_HE_SU: 670 case MT_PHY_TYPE_HE_EXT_SU: 671 case MT_PHY_TYPE_HE_TB: 672 case MT_PHY_TYPE_HE_MU: 673 if (rate.mcs > 11) 674 return false; 675 676 rate.he_gi = wcid->rate.he_gi; 677 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 678 rate.flags = RATE_INFO_FLAGS_HE_MCS; 679 break; 680 default: 681 return false; 682 } 683 684 stats->tx_mode[mode]++; 685 686 switch (FIELD_GET(MT_TXS0_BW, txs)) { 687 case IEEE80211_STA_RX_BW_160: 688 rate.bw = RATE_INFO_BW_160; 689 stats->tx_bw[3]++; 690 break; 691 case IEEE80211_STA_RX_BW_80: 692 rate.bw = RATE_INFO_BW_80; 693 stats->tx_bw[2]++; 694 break; 695 case IEEE80211_STA_RX_BW_40: 696 rate.bw = RATE_INFO_BW_40; 697 stats->tx_bw[1]++; 698 break; 699 default: 700 rate.bw = RATE_INFO_BW_20; 701 stats->tx_bw[0]++; 702 break; 703 } 704 wcid->rate = rate; 705 706 return true; 707 } 708 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_txs); 709 710 bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, 711 int pid, __le32 *txs_data) 712 { 713 struct sk_buff_head list; 714 struct sk_buff *skb; 715 716 mt76_tx_status_lock(dev, &list); 717 skb = mt76_tx_status_skb_get(dev, wcid, pid, &list); 718 if (skb) { 719 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 720 721 if (!(le32_to_cpu(txs_data[0]) & MT_TXS0_ACK_ERROR_MASK)) 722 info->flags |= IEEE80211_TX_STAT_ACK; 723 724 info->status.ampdu_len = 1; 725 info->status.ampdu_ack_len = 726 !!(info->flags & IEEE80211_TX_STAT_ACK); 727 info->status.rates[0].idx = -1; 728 729 mt76_connac2_mac_fill_txs(dev, wcid, txs_data); 730 mt76_tx_status_skb_done(dev, skb, &list); 731 } 732 mt76_tx_status_unlock(dev, &list); 733 734 return !!skb; 735 } 736 EXPORT_SYMBOL_GPL(mt76_connac2_mac_add_txs_skb); 737 738 static void 739 mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status *status, 740 struct ieee80211_radiotap_he *he, 741 __le32 *rxv) 742 { 743 u32 ru_h, ru_l; 744 u8 ru, offs = 0; 745 746 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L); 747 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H); 748 ru = (u8)(ru_l | ru_h << 4); 749 750 status->bw = RATE_INFO_BW_HE_RU; 751 752 switch (ru) { 753 case 0 ... 36: 754 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26; 755 offs = ru; 756 break; 757 case 37 ... 52: 758 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52; 759 offs = ru - 37; 760 break; 761 case 53 ... 60: 762 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106; 763 offs = ru - 53; 764 break; 765 case 61 ... 64: 766 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242; 767 offs = ru - 61; 768 break; 769 case 65 ... 66: 770 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484; 771 offs = ru - 65; 772 break; 773 case 67: 774 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996; 775 break; 776 case 68: 777 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996; 778 break; 779 } 780 781 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 782 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) | 783 le16_encode_bits(offs, 784 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET); 785 } 786 787 static void 788 mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev *dev, struct sk_buff *skb, 789 __le32 *rxv) 790 { 791 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 792 static struct ieee80211_radiotap_he_mu mu_known = { 793 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) | 794 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) | 795 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) | 796 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN), 797 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN), 798 }; 799 struct ieee80211_radiotap_he_mu *he_mu; 800 801 if (is_mt7921(dev)) { 802 mu_known.flags1 |= HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN); 803 mu_known.flags2 |= HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN); 804 } 805 806 status->flag |= RX_FLAG_RADIOTAP_HE_MU; 807 808 he_mu = skb_push(skb, sizeof(mu_known)); 809 memcpy(he_mu, &mu_known, sizeof(mu_known)); 810 811 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f) 812 813 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx); 814 if (status->he_dcm) 815 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm); 816 817 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) | 818 MU_PREP(FLAGS2_SIG_B_SYMS_USERS, 819 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER)); 820 821 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0); 822 823 if (status->bw >= RATE_INFO_BW_40) { 824 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN); 825 he_mu->ru_ch2[0] = 826 le32_get_bits(rxv[3], MT_CRXV_HE_RU1); 827 } 828 829 if (status->bw >= RATE_INFO_BW_80) { 830 he_mu->ru_ch1[1] = 831 le32_get_bits(rxv[3], MT_CRXV_HE_RU2); 832 he_mu->ru_ch2[1] = 833 le32_get_bits(rxv[3], MT_CRXV_HE_RU3); 834 } 835 } 836 837 void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev, 838 struct sk_buff *skb, 839 __le32 *rxv, u32 mode) 840 { 841 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 842 static const struct ieee80211_radiotap_he known = { 843 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) | 844 HE_BITS(DATA1_DATA_DCM_KNOWN) | 845 HE_BITS(DATA1_STBC_KNOWN) | 846 HE_BITS(DATA1_CODING_KNOWN) | 847 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) | 848 HE_BITS(DATA1_DOPPLER_KNOWN) | 849 HE_BITS(DATA1_SPTL_REUSE_KNOWN) | 850 HE_BITS(DATA1_BSS_COLOR_KNOWN), 851 .data2 = HE_BITS(DATA2_GI_KNOWN) | 852 HE_BITS(DATA2_TXBF_KNOWN) | 853 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) | 854 HE_BITS(DATA2_TXOP_KNOWN), 855 }; 856 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1; 857 struct ieee80211_radiotap_he *he; 858 859 status->flag |= RX_FLAG_RADIOTAP_HE; 860 861 he = skb_push(skb, sizeof(known)); 862 memcpy(he, &known, sizeof(known)); 863 864 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) | 865 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]); 866 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]); 867 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) | 868 le16_encode_bits(ltf_size, 869 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE); 870 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF) 871 he->data5 |= HE_BITS(DATA5_TXBF); 872 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) | 873 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]); 874 875 switch (mode) { 876 case MT_PHY_TYPE_HE_SU: 877 he->data1 |= HE_BITS(DATA1_FORMAT_SU) | 878 HE_BITS(DATA1_UL_DL_KNOWN) | 879 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) | 880 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 881 882 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | 883 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 884 break; 885 case MT_PHY_TYPE_HE_EXT_SU: 886 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | 887 HE_BITS(DATA1_UL_DL_KNOWN) | 888 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 889 890 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 891 break; 892 case MT_PHY_TYPE_HE_MU: 893 he->data1 |= HE_BITS(DATA1_FORMAT_MU) | 894 HE_BITS(DATA1_UL_DL_KNOWN); 895 896 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 897 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]); 898 899 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv); 900 mt76_connac2_mac_decode_he_mu_radiotap(dev, skb, rxv); 901 break; 902 case MT_PHY_TYPE_HE_TB: 903 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) | 904 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) | 905 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) | 906 HE_BITS(DATA1_SPTL_REUSE4_KNOWN); 907 908 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) | 909 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) | 910 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) | 911 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]); 912 913 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv); 914 break; 915 default: 916 break; 917 } 918 } 919 EXPORT_SYMBOL_GPL(mt76_connac2_mac_decode_he_radiotap); 920 921 /* The HW does not translate the mac header to 802.3 for mesh point */ 922 int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif, 923 struct sk_buff *skb, u16 hdr_offset) 924 { 925 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 926 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_offset); 927 __le32 *rxd = (__le32 *)skb->data; 928 struct ieee80211_sta *sta; 929 struct ieee80211_hdr hdr; 930 u16 frame_control; 931 932 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != 933 MT_RXD3_NORMAL_U2M) 934 return -EINVAL; 935 936 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4)) 937 return -EINVAL; 938 939 sta = container_of((void *)status->wcid, struct ieee80211_sta, drv_priv); 940 941 /* store the info from RXD and ethhdr to avoid being overridden */ 942 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL); 943 hdr.frame_control = cpu_to_le16(frame_control); 944 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL)); 945 hdr.duration_id = 0; 946 947 ether_addr_copy(hdr.addr1, vif->addr); 948 ether_addr_copy(hdr.addr2, sta->addr); 949 switch (frame_control & (IEEE80211_FCTL_TODS | 950 IEEE80211_FCTL_FROMDS)) { 951 case 0: 952 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); 953 break; 954 case IEEE80211_FCTL_FROMDS: 955 ether_addr_copy(hdr.addr3, eth_hdr->h_source); 956 break; 957 case IEEE80211_FCTL_TODS: 958 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 959 break; 960 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: 961 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 962 ether_addr_copy(hdr.addr4, eth_hdr->h_source); 963 break; 964 default: 965 return -EINVAL; 966 } 967 968 skb_pull(skb, hdr_offset + sizeof(struct ethhdr) - 2); 969 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || 970 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) 971 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); 972 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) 973 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); 974 else 975 skb_pull(skb, 2); 976 977 if (ieee80211_has_order(hdr.frame_control)) 978 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9], 979 IEEE80211_HT_CTL_LEN); 980 if (ieee80211_is_data_qos(hdr.frame_control)) { 981 __le16 qos_ctrl; 982 983 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL)); 984 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, 985 IEEE80211_QOS_CTL_LEN); 986 } 987 988 if (ieee80211_has_a4(hdr.frame_control)) 989 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 990 else 991 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6); 992 993 return 0; 994 } 995 EXPORT_SYMBOL_GPL(mt76_connac2_reverse_frag0_hdr_trans); 996 997 int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev, 998 struct mt76_rx_status *status, 999 struct ieee80211_supported_band *sband, 1000 __le32 *rxv, u8 *mode) 1001 { 1002 u32 v0, v2; 1003 u8 stbc, gi, bw, dcm, nss; 1004 int i, idx; 1005 bool cck = false; 1006 1007 v0 = le32_to_cpu(rxv[0]); 1008 v2 = le32_to_cpu(rxv[2]); 1009 1010 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0); 1011 nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1; 1012 1013 if (!is_mt7915(dev)) { 1014 stbc = FIELD_GET(MT_PRXV_HT_STBC, v0); 1015 gi = FIELD_GET(MT_PRXV_HT_SGI, v0); 1016 *mode = FIELD_GET(MT_PRXV_TX_MODE, v0); 1017 if (is_mt7921(dev)) 1018 dcm = !!(idx & MT_PRXV_TX_DCM); 1019 else 1020 dcm = FIELD_GET(MT_PRXV_DCM, v0); 1021 bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0); 1022 } else { 1023 stbc = FIELD_GET(MT_CRXV_HT_STBC, v2); 1024 gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2); 1025 *mode = FIELD_GET(MT_CRXV_TX_MODE, v2); 1026 dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM); 1027 bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2); 1028 } 1029 1030 switch (*mode) { 1031 case MT_PHY_TYPE_CCK: 1032 cck = true; 1033 fallthrough; 1034 case MT_PHY_TYPE_OFDM: 1035 i = mt76_get_rate(dev, sband, i, cck); 1036 break; 1037 case MT_PHY_TYPE_HT_GF: 1038 case MT_PHY_TYPE_HT: 1039 status->encoding = RX_ENC_HT; 1040 if (gi) 1041 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1042 if (i > 31) 1043 return -EINVAL; 1044 break; 1045 case MT_PHY_TYPE_VHT: 1046 status->nss = nss; 1047 status->encoding = RX_ENC_VHT; 1048 if (gi) 1049 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1050 if (i > 11) 1051 return -EINVAL; 1052 break; 1053 case MT_PHY_TYPE_HE_MU: 1054 case MT_PHY_TYPE_HE_SU: 1055 case MT_PHY_TYPE_HE_EXT_SU: 1056 case MT_PHY_TYPE_HE_TB: 1057 status->nss = nss; 1058 status->encoding = RX_ENC_HE; 1059 i &= GENMASK(3, 0); 1060 1061 if (gi <= NL80211_RATE_INFO_HE_GI_3_2) 1062 status->he_gi = gi; 1063 1064 status->he_dcm = dcm; 1065 break; 1066 default: 1067 return -EINVAL; 1068 } 1069 status->rate_idx = i; 1070 1071 switch (bw) { 1072 case IEEE80211_STA_RX_BW_20: 1073 break; 1074 case IEEE80211_STA_RX_BW_40: 1075 if (*mode & MT_PHY_TYPE_HE_EXT_SU && 1076 (idx & MT_PRXV_TX_ER_SU_106T)) { 1077 status->bw = RATE_INFO_BW_HE_RU; 1078 status->he_ru = 1079 NL80211_RATE_INFO_HE_RU_ALLOC_106; 1080 } else { 1081 status->bw = RATE_INFO_BW_40; 1082 } 1083 break; 1084 case IEEE80211_STA_RX_BW_80: 1085 status->bw = RATE_INFO_BW_80; 1086 break; 1087 case IEEE80211_STA_RX_BW_160: 1088 status->bw = RATE_INFO_BW_160; 1089 break; 1090 default: 1091 return -EINVAL; 1092 } 1093 1094 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; 1095 if (*mode < MT_PHY_TYPE_HE_SU && gi) 1096 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1097 1098 return 0; 1099 } 1100 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_rx_rate); 1101 1102 void mt76_connac2_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi) 1103 { 1104 struct mt76_wcid *wcid; 1105 u16 fc, tid; 1106 u32 val; 1107 1108 if (!sta || 1109 !(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1110 return; 1111 1112 tid = le32_get_bits(txwi[1], MT_TXD1_TID); 1113 if (tid >= 6) /* skip VO queue */ 1114 return; 1115 1116 val = le32_to_cpu(txwi[2]); 1117 fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 | 1118 FIELD_GET(MT_TXD2_SUB_TYPE, val) << 4; 1119 if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA))) 1120 return; 1121 1122 wcid = (struct mt76_wcid *)sta->drv_priv; 1123 if (!test_and_set_bit(tid, &wcid->ampdu_state)) 1124 ieee80211_start_tx_ba_session(sta, tid, 0); 1125 } 1126 EXPORT_SYMBOL_GPL(mt76_connac2_tx_check_aggr); 1127 1128 void mt76_connac2_txwi_free(struct mt76_dev *dev, struct mt76_txwi_cache *t, 1129 struct ieee80211_sta *sta, 1130 struct list_head *free_list) 1131 { 1132 struct mt76_wcid *wcid; 1133 __le32 *txwi; 1134 u16 wcid_idx; 1135 1136 mt76_connac_txp_skb_unmap(dev, t); 1137 if (!t->skb) 1138 goto out; 1139 1140 txwi = (__le32 *)mt76_get_txwi_ptr(dev, t); 1141 if (sta) { 1142 wcid = (struct mt76_wcid *)sta->drv_priv; 1143 wcid_idx = wcid->idx; 1144 } else { 1145 wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 1146 wcid = rcu_dereference(dev->wcid[wcid_idx]); 1147 1148 if (wcid && wcid->sta) { 1149 sta = container_of((void *)wcid, struct ieee80211_sta, 1150 drv_priv); 1151 spin_lock_bh(&dev->sta_poll_lock); 1152 if (list_empty(&wcid->poll_list)) 1153 list_add_tail(&wcid->poll_list, 1154 &dev->sta_poll_list); 1155 spin_unlock_bh(&dev->sta_poll_lock); 1156 } 1157 } 1158 1159 if (sta && likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE))) 1160 mt76_connac2_tx_check_aggr(sta, txwi); 1161 1162 __mt76_tx_complete_skb(dev, wcid_idx, t->skb, free_list); 1163 out: 1164 t->skb = NULL; 1165 mt76_put_txwi(dev, t); 1166 } 1167 EXPORT_SYMBOL_GPL(mt76_connac2_txwi_free); 1168 1169 void mt76_connac2_tx_token_put(struct mt76_dev *dev) 1170 { 1171 struct mt76_txwi_cache *txwi; 1172 int id; 1173 1174 spin_lock_bh(&dev->token_lock); 1175 idr_for_each_entry(&dev->token, txwi, id) { 1176 mt76_connac2_txwi_free(dev, txwi, NULL, NULL); 1177 dev->token_count--; 1178 } 1179 spin_unlock_bh(&dev->token_lock); 1180 idr_destroy(&dev->token); 1181 } 1182 EXPORT_SYMBOL_GPL(mt76_connac2_tx_token_put); 1183