1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7744 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7744-cpg-mssr.h> 11#include <dt-bindings/power/r8a7744-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7744"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 /* This value must be overridden by the board. */ 46 clock-frequency = <0>; 47 }; 48 49 cpus { 50 #address-cells = <1>; 51 #size-cells = <0>; 52 53 cpu0: cpu@0 { 54 device_type = "cpu"; 55 compatible = "arm,cortex-a15"; 56 reg = <0>; 57 clock-frequency = <1500000000>; 58 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>; 59 clock-latency = <300000>; /* 300 us */ 60 power-domains = <&sysc R8A7744_PD_CA15_CPU0>; 61 enable-method = "renesas,apmu"; 62 next-level-cache = <&L2_CA15>; 63 64 /* kHz - uV - OPPs unknown yet */ 65 operating-points = <1500000 1000000>, 66 <1312500 1000000>, 67 <1125000 1000000>, 68 < 937500 1000000>, 69 < 750000 1000000>, 70 < 375000 1000000>; 71 }; 72 73 cpu1: cpu@1 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <1>; 77 clock-frequency = <1500000000>; 78 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>; 79 clock-latency = <300000>; /* 300 us */ 80 power-domains = <&sysc R8A7744_PD_CA15_CPU1>; 81 enable-method = "renesas,apmu"; 82 next-level-cache = <&L2_CA15>; 83 84 /* kHz - uV - OPPs unknown yet */ 85 operating-points = <1500000 1000000>, 86 <1312500 1000000>, 87 <1125000 1000000>, 88 < 937500 1000000>, 89 < 750000 1000000>, 90 < 375000 1000000>; 91 }; 92 93 L2_CA15: cache-controller-0 { 94 compatible = "cache"; 95 cache-unified; 96 cache-level = <2>; 97 power-domains = <&sysc R8A7744_PD_CA15_SCU>; 98 }; 99 }; 100 101 /* External root clock */ 102 extal_clk: extal { 103 compatible = "fixed-clock"; 104 #clock-cells = <0>; 105 /* This value must be overridden by the board. */ 106 clock-frequency = <0>; 107 }; 108 109 /* External PCIe clock - can be overridden by the board */ 110 pcie_bus_clk: pcie_bus { 111 compatible = "fixed-clock"; 112 #clock-cells = <0>; 113 clock-frequency = <0>; 114 }; 115 116 pmu { 117 compatible = "arm,cortex-a15-pmu"; 118 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 119 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 120 interrupt-affinity = <&cpu0>, <&cpu1>; 121 }; 122 123 /* External SCIF clock */ 124 scif_clk: scif { 125 compatible = "fixed-clock"; 126 #clock-cells = <0>; 127 /* This value must be overridden by the board. */ 128 clock-frequency = <0>; 129 }; 130 131 soc { 132 compatible = "simple-bus"; 133 interrupt-parent = <&gic>; 134 135 #address-cells = <2>; 136 #size-cells = <2>; 137 ranges; 138 139 rwdt: watchdog@e6020000 { 140 compatible = "renesas,r8a7744-wdt", 141 "renesas,rcar-gen2-wdt"; 142 reg = <0 0xe6020000 0 0x0c>; 143 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 144 clocks = <&cpg CPG_MOD 402>; 145 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 146 resets = <&cpg 402>; 147 status = "disabled"; 148 }; 149 150 gpio0: gpio@e6050000 { 151 compatible = "renesas,gpio-r8a7744", 152 "renesas,rcar-gen2-gpio"; 153 reg = <0 0xe6050000 0 0x50>; 154 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 155 #gpio-cells = <2>; 156 gpio-controller; 157 gpio-ranges = <&pfc 0 0 32>; 158 #interrupt-cells = <2>; 159 interrupt-controller; 160 clocks = <&cpg CPG_MOD 912>; 161 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 162 resets = <&cpg 912>; 163 }; 164 165 gpio1: gpio@e6051000 { 166 compatible = "renesas,gpio-r8a7744", 167 "renesas,rcar-gen2-gpio"; 168 reg = <0 0xe6051000 0 0x50>; 169 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 170 #gpio-cells = <2>; 171 gpio-controller; 172 gpio-ranges = <&pfc 0 32 26>; 173 #interrupt-cells = <2>; 174 interrupt-controller; 175 clocks = <&cpg CPG_MOD 911>; 176 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 177 resets = <&cpg 911>; 178 }; 179 180 gpio2: gpio@e6052000 { 181 compatible = "renesas,gpio-r8a7744", 182 "renesas,rcar-gen2-gpio"; 183 reg = <0 0xe6052000 0 0x50>; 184 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 185 #gpio-cells = <2>; 186 gpio-controller; 187 gpio-ranges = <&pfc 0 64 32>; 188 #interrupt-cells = <2>; 189 interrupt-controller; 190 clocks = <&cpg CPG_MOD 910>; 191 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 192 resets = <&cpg 910>; 193 }; 194 195 gpio3: gpio@e6053000 { 196 compatible = "renesas,gpio-r8a7744", 197 "renesas,rcar-gen2-gpio"; 198 reg = <0 0xe6053000 0 0x50>; 199 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 96 32>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 909>; 206 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 207 resets = <&cpg 909>; 208 }; 209 210 gpio4: gpio@e6054000 { 211 compatible = "renesas,gpio-r8a7744", 212 "renesas,rcar-gen2-gpio"; 213 reg = <0 0xe6054000 0 0x50>; 214 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 128 32>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 908>; 221 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 222 resets = <&cpg 908>; 223 }; 224 225 gpio5: gpio@e6055000 { 226 compatible = "renesas,gpio-r8a7744", 227 "renesas,rcar-gen2-gpio"; 228 reg = <0 0xe6055000 0 0x50>; 229 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 160 32>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 907>; 236 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 237 resets = <&cpg 907>; 238 }; 239 240 gpio6: gpio@e6055400 { 241 compatible = "renesas,gpio-r8a7744", 242 "renesas,rcar-gen2-gpio"; 243 reg = <0 0xe6055400 0 0x50>; 244 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 192 32>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 905>; 251 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 252 resets = <&cpg 905>; 253 }; 254 255 gpio7: gpio@e6055800 { 256 compatible = "renesas,gpio-r8a7744", 257 "renesas,rcar-gen2-gpio"; 258 reg = <0 0xe6055800 0 0x50>; 259 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 224 26>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 904>; 266 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 267 resets = <&cpg 904>; 268 }; 269 270 pfc: pinctrl@e6060000 { 271 compatible = "renesas,pfc-r8a7744"; 272 reg = <0 0xe6060000 0 0x250>; 273 }; 274 275 tpu: pwm@e60f0000 { 276 compatible = "renesas,tpu-r8a7744", "renesas,tpu"; 277 reg = <0 0xe60f0000 0 0x148>; 278 clocks = <&cpg CPG_MOD 304>; 279 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 280 resets = <&cpg 304>; 281 #pwm-cells = <3>; 282 status = "disabled"; 283 }; 284 285 cpg: clock-controller@e6150000 { 286 compatible = "renesas,r8a7744-cpg-mssr"; 287 reg = <0 0xe6150000 0 0x1000>; 288 clocks = <&extal_clk>, <&usb_extal_clk>; 289 clock-names = "extal", "usb_extal"; 290 #clock-cells = <2>; 291 #power-domain-cells = <0>; 292 #reset-cells = <1>; 293 }; 294 295 apmu@e6152000 { 296 compatible = "renesas,r8a7744-apmu", "renesas,apmu"; 297 reg = <0 0xe6152000 0 0x188>; 298 cpus = <&cpu0>, <&cpu1>; 299 }; 300 301 rst: reset-controller@e6160000 { 302 compatible = "renesas,r8a7744-rst"; 303 reg = <0 0xe6160000 0 0x100>; 304 }; 305 306 sysc: system-controller@e6180000 { 307 compatible = "renesas,r8a7744-sysc"; 308 reg = <0 0xe6180000 0 0x200>; 309 #power-domain-cells = <1>; 310 }; 311 312 irqc: interrupt-controller@e61c0000 { 313 compatible = "renesas,irqc-r8a7744", "renesas,irqc"; 314 #interrupt-cells = <2>; 315 interrupt-controller; 316 reg = <0 0xe61c0000 0 0x200>; 317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 407>; 328 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 329 resets = <&cpg 407>; 330 }; 331 332 thermal: thermal@e61f0000 { 333 compatible = "renesas,thermal-r8a7744", 334 "renesas,rcar-gen2-thermal"; 335 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 336 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_MOD 522>; 338 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 339 resets = <&cpg 522>; 340 #thermal-sensor-cells = <0>; 341 }; 342 343 ipmmu_sy0: iommu@e6280000 { 344 compatible = "renesas,ipmmu-r8a7744", 345 "renesas,ipmmu-vmsa"; 346 reg = <0 0xe6280000 0 0x1000>; 347 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 349 #iommu-cells = <1>; 350 status = "disabled"; 351 }; 352 353 ipmmu_sy1: iommu@e6290000 { 354 compatible = "renesas,ipmmu-r8a7744", 355 "renesas,ipmmu-vmsa"; 356 reg = <0 0xe6290000 0 0x1000>; 357 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 358 #iommu-cells = <1>; 359 status = "disabled"; 360 }; 361 362 ipmmu_ds: iommu@e6740000 { 363 compatible = "renesas,ipmmu-r8a7744", 364 "renesas,ipmmu-vmsa"; 365 reg = <0 0xe6740000 0 0x1000>; 366 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 368 #iommu-cells = <1>; 369 status = "disabled"; 370 }; 371 372 ipmmu_mp: iommu@ec680000 { 373 compatible = "renesas,ipmmu-r8a7744", 374 "renesas,ipmmu-vmsa"; 375 reg = <0 0xec680000 0 0x1000>; 376 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 377 #iommu-cells = <1>; 378 status = "disabled"; 379 }; 380 381 ipmmu_mx: iommu@fe951000 { 382 compatible = "renesas,ipmmu-r8a7744", 383 "renesas,ipmmu-vmsa"; 384 reg = <0 0xfe951000 0 0x1000>; 385 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 387 #iommu-cells = <1>; 388 status = "disabled"; 389 }; 390 391 ipmmu_gp: iommu@e62a0000 { 392 compatible = "renesas,ipmmu-r8a7744", 393 "renesas,ipmmu-vmsa"; 394 reg = <0 0xe62a0000 0 0x1000>; 395 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 397 #iommu-cells = <1>; 398 status = "disabled"; 399 }; 400 401 icram0: sram@e63a0000 { 402 compatible = "mmio-sram"; 403 reg = <0 0xe63a0000 0 0x12000>; 404 #address-cells = <1>; 405 #size-cells = <1>; 406 ranges = <0 0 0xe63a0000 0x12000>; 407 }; 408 409 icram1: sram@e63c0000 { 410 compatible = "mmio-sram"; 411 reg = <0 0xe63c0000 0 0x1000>; 412 #address-cells = <1>; 413 #size-cells = <1>; 414 ranges = <0 0 0xe63c0000 0x1000>; 415 416 smp-sram@0 { 417 compatible = "renesas,smp-sram"; 418 reg = <0 0x100>; 419 }; 420 }; 421 422 icram2: sram@e6300000 { 423 compatible = "mmio-sram"; 424 reg = <0 0xe6300000 0 0x40000>; 425 #address-cells = <1>; 426 #size-cells = <1>; 427 ranges = <0 0 0xe6300000 0x40000>; 428 }; 429 430 /* The memory map in the User's Manual maps the cores to 431 * bus numbers 432 */ 433 i2c0: i2c@e6508000 { 434 #address-cells = <1>; 435 #size-cells = <0>; 436 compatible = "renesas,i2c-r8a7744", 437 "renesas,rcar-gen2-i2c"; 438 reg = <0 0xe6508000 0 0x40>; 439 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 440 clocks = <&cpg CPG_MOD 931>; 441 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 442 resets = <&cpg 931>; 443 i2c-scl-internal-delay-ns = <6>; 444 status = "disabled"; 445 }; 446 447 i2c1: i2c@e6518000 { 448 #address-cells = <1>; 449 #size-cells = <0>; 450 compatible = "renesas,i2c-r8a7744", 451 "renesas,rcar-gen2-i2c"; 452 reg = <0 0xe6518000 0 0x40>; 453 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 930>; 455 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 456 resets = <&cpg 930>; 457 i2c-scl-internal-delay-ns = <6>; 458 status = "disabled"; 459 }; 460 461 i2c2: i2c@e6530000 { 462 #address-cells = <1>; 463 #size-cells = <0>; 464 compatible = "renesas,i2c-r8a7744", 465 "renesas,rcar-gen2-i2c"; 466 reg = <0 0xe6530000 0 0x40>; 467 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 468 clocks = <&cpg CPG_MOD 929>; 469 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 470 resets = <&cpg 929>; 471 i2c-scl-internal-delay-ns = <6>; 472 status = "disabled"; 473 }; 474 475 i2c3: i2c@e6540000 { 476 #address-cells = <1>; 477 #size-cells = <0>; 478 compatible = "renesas,i2c-r8a7744", 479 "renesas,rcar-gen2-i2c"; 480 reg = <0 0xe6540000 0 0x40>; 481 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 928>; 483 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 484 resets = <&cpg 928>; 485 i2c-scl-internal-delay-ns = <6>; 486 status = "disabled"; 487 }; 488 489 i2c4: i2c@e6520000 { 490 #address-cells = <1>; 491 #size-cells = <0>; 492 compatible = "renesas,i2c-r8a7744", 493 "renesas,rcar-gen2-i2c"; 494 reg = <0 0xe6520000 0 0x40>; 495 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 927>; 497 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 498 resets = <&cpg 927>; 499 i2c-scl-internal-delay-ns = <6>; 500 status = "disabled"; 501 }; 502 503 i2c5: i2c@e6528000 { 504 /* doesn't need pinmux */ 505 #address-cells = <1>; 506 #size-cells = <0>; 507 compatible = "renesas,i2c-r8a7744", 508 "renesas,rcar-gen2-i2c"; 509 reg = <0 0xe6528000 0 0x40>; 510 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 925>; 512 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 513 resets = <&cpg 925>; 514 i2c-scl-internal-delay-ns = <110>; 515 status = "disabled"; 516 }; 517 518 iic0: i2c@e6500000 { 519 #address-cells = <1>; 520 #size-cells = <0>; 521 compatible = "renesas,iic-r8a7744", 522 "renesas,rcar-gen2-iic", 523 "renesas,rmobile-iic"; 524 reg = <0 0xe6500000 0 0x425>; 525 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 526 clocks = <&cpg CPG_MOD 318>; 527 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 528 <&dmac1 0x61>, <&dmac1 0x62>; 529 dma-names = "tx", "rx", "tx", "rx"; 530 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 531 resets = <&cpg 318>; 532 status = "disabled"; 533 }; 534 535 iic1: i2c@e6510000 { 536 #address-cells = <1>; 537 #size-cells = <0>; 538 compatible = "renesas,iic-r8a7744", 539 "renesas,rcar-gen2-iic", 540 "renesas,rmobile-iic"; 541 reg = <0 0xe6510000 0 0x425>; 542 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 543 clocks = <&cpg CPG_MOD 323>; 544 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 545 <&dmac1 0x65>, <&dmac1 0x66>; 546 dma-names = "tx", "rx", "tx", "rx"; 547 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 548 resets = <&cpg 323>; 549 status = "disabled"; 550 }; 551 552 iic3: i2c@e60b0000 { 553 /* doesn't need pinmux */ 554 #address-cells = <1>; 555 #size-cells = <0>; 556 compatible = "renesas,iic-r8a7744", 557 "renesas,rcar-gen2-iic", 558 "renesas,rmobile-iic"; 559 reg = <0 0xe60b0000 0 0x425>; 560 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 561 clocks = <&cpg CPG_MOD 926>; 562 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 563 <&dmac1 0x77>, <&dmac1 0x78>; 564 dma-names = "tx", "rx", "tx", "rx"; 565 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 566 resets = <&cpg 926>; 567 status = "disabled"; 568 }; 569 570 hsusb: usb@e6590000 { 571 compatible = "renesas,usbhs-r8a7744", 572 "renesas,rcar-gen2-usbhs"; 573 reg = <0 0xe6590000 0 0x100>; 574 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 575 clocks = <&cpg CPG_MOD 704>; 576 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 577 <&usb_dmac1 0>, <&usb_dmac1 1>; 578 dma-names = "ch0", "ch1", "ch2", "ch3"; 579 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 580 resets = <&cpg 704>; 581 renesas,buswait = <4>; 582 phys = <&usb0 1>; 583 phy-names = "usb"; 584 status = "disabled"; 585 }; 586 587 usbphy: usb-phy-controller@e6590100 { 588 compatible = "renesas,usb-phy-r8a7744", 589 "renesas,rcar-gen2-usb-phy"; 590 reg = <0 0xe6590100 0 0x100>; 591 #address-cells = <1>; 592 #size-cells = <0>; 593 clocks = <&cpg CPG_MOD 704>; 594 clock-names = "usbhs"; 595 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 596 resets = <&cpg 704>; 597 status = "disabled"; 598 599 usb0: usb-phy@0 { 600 reg = <0>; 601 #phy-cells = <1>; 602 }; 603 usb2: usb-phy@2 { 604 reg = <2>; 605 #phy-cells = <1>; 606 }; 607 }; 608 609 usb_dmac0: dma-controller@e65a0000 { 610 compatible = "renesas,r8a7744-usb-dmac", 611 "renesas,usb-dmac"; 612 reg = <0 0xe65a0000 0 0x100>; 613 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 614 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 615 interrupt-names = "ch0", "ch1"; 616 clocks = <&cpg CPG_MOD 330>; 617 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 618 resets = <&cpg 330>; 619 #dma-cells = <1>; 620 dma-channels = <2>; 621 }; 622 623 usb_dmac1: dma-controller@e65b0000 { 624 compatible = "renesas,r8a7744-usb-dmac", 625 "renesas,usb-dmac"; 626 reg = <0 0xe65b0000 0 0x100>; 627 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 629 interrupt-names = "ch0", "ch1"; 630 clocks = <&cpg CPG_MOD 331>; 631 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 632 resets = <&cpg 331>; 633 #dma-cells = <1>; 634 dma-channels = <2>; 635 }; 636 637 dmac0: dma-controller@e6700000 { 638 compatible = "renesas,dmac-r8a7744", 639 "renesas,rcar-dmac"; 640 reg = <0 0xe6700000 0 0x20000>; 641 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 648 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 649 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 656 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 657 interrupt-names = "error", 658 "ch0", "ch1", "ch2", "ch3", 659 "ch4", "ch5", "ch6", "ch7", 660 "ch8", "ch9", "ch10", "ch11", 661 "ch12", "ch13", "ch14"; 662 clocks = <&cpg CPG_MOD 219>; 663 clock-names = "fck"; 664 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 665 resets = <&cpg 219>; 666 #dma-cells = <1>; 667 dma-channels = <15>; 668 }; 669 670 dmac1: dma-controller@e6720000 { 671 compatible = "renesas,dmac-r8a7744", 672 "renesas,rcar-dmac"; 673 reg = <0 0xe6720000 0 0x20000>; 674 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 690 interrupt-names = "error", 691 "ch0", "ch1", "ch2", "ch3", 692 "ch4", "ch5", "ch6", "ch7", 693 "ch8", "ch9", "ch10", "ch11", 694 "ch12", "ch13", "ch14"; 695 clocks = <&cpg CPG_MOD 218>; 696 clock-names = "fck"; 697 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 698 resets = <&cpg 218>; 699 #dma-cells = <1>; 700 dma-channels = <15>; 701 }; 702 703 avb: ethernet@e6800000 { 704 compatible = "renesas,etheravb-r8a7744", 705 "renesas,etheravb-rcar-gen2"; 706 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 707 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 708 clocks = <&cpg CPG_MOD 812>; 709 clock-names = "fck"; 710 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 711 resets = <&cpg 812>; 712 #address-cells = <1>; 713 #size-cells = <0>; 714 status = "disabled"; 715 }; 716 717 qspi: spi@e6b10000 { 718 compatible = "renesas,qspi-r8a7744", "renesas,qspi"; 719 reg = <0 0xe6b10000 0 0x2c>; 720 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 721 clocks = <&cpg CPG_MOD 917>; 722 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 723 <&dmac1 0x17>, <&dmac1 0x18>; 724 dma-names = "tx", "rx", "tx", "rx"; 725 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 726 num-cs = <1>; 727 #address-cells = <1>; 728 #size-cells = <0>; 729 resets = <&cpg 917>; 730 status = "disabled"; 731 }; 732 733 scifa0: serial@e6c40000 { 734 compatible = "renesas,scifa-r8a7744", 735 "renesas,rcar-gen2-scifa", "renesas,scifa"; 736 reg = <0 0xe6c40000 0 0x40>; 737 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 738 clocks = <&cpg CPG_MOD 204>; 739 clock-names = "fck"; 740 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 741 <&dmac1 0x21>, <&dmac1 0x22>; 742 dma-names = "tx", "rx", "tx", "rx"; 743 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 744 resets = <&cpg 204>; 745 status = "disabled"; 746 }; 747 748 scifa1: serial@e6c50000 { 749 compatible = "renesas,scifa-r8a7744", 750 "renesas,rcar-gen2-scifa", "renesas,scifa"; 751 reg = <0 0xe6c50000 0 0x40>; 752 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 753 clocks = <&cpg CPG_MOD 203>; 754 clock-names = "fck"; 755 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 756 <&dmac1 0x25>, <&dmac1 0x26>; 757 dma-names = "tx", "rx", "tx", "rx"; 758 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 759 resets = <&cpg 203>; 760 status = "disabled"; 761 }; 762 763 scifa2: serial@e6c60000 { 764 compatible = "renesas,scifa-r8a7744", 765 "renesas,rcar-gen2-scifa", "renesas,scifa"; 766 reg = <0 0xe6c60000 0 0x40>; 767 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 768 clocks = <&cpg CPG_MOD 202>; 769 clock-names = "fck"; 770 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 771 <&dmac1 0x27>, <&dmac1 0x28>; 772 dma-names = "tx", "rx", "tx", "rx"; 773 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 774 resets = <&cpg 202>; 775 status = "disabled"; 776 }; 777 778 scifa3: serial@e6c70000 { 779 compatible = "renesas,scifa-r8a7744", 780 "renesas,rcar-gen2-scifa", "renesas,scifa"; 781 reg = <0 0xe6c70000 0 0x40>; 782 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 783 clocks = <&cpg CPG_MOD 1106>; 784 clock-names = "fck"; 785 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 786 <&dmac1 0x1b>, <&dmac1 0x1c>; 787 dma-names = "tx", "rx", "tx", "rx"; 788 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 789 resets = <&cpg 1106>; 790 status = "disabled"; 791 }; 792 793 scifa4: serial@e6c78000 { 794 compatible = "renesas,scifa-r8a7744", 795 "renesas,rcar-gen2-scifa", "renesas,scifa"; 796 reg = <0 0xe6c78000 0 0x40>; 797 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 798 clocks = <&cpg CPG_MOD 1107>; 799 clock-names = "fck"; 800 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 801 <&dmac1 0x1f>, <&dmac1 0x20>; 802 dma-names = "tx", "rx", "tx", "rx"; 803 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 804 resets = <&cpg 1107>; 805 status = "disabled"; 806 }; 807 808 scifa5: serial@e6c80000 { 809 compatible = "renesas,scifa-r8a7744", 810 "renesas,rcar-gen2-scifa", "renesas,scifa"; 811 reg = <0 0xe6c80000 0 0x40>; 812 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 1108>; 814 clock-names = "fck"; 815 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 816 <&dmac1 0x23>, <&dmac1 0x24>; 817 dma-names = "tx", "rx", "tx", "rx"; 818 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 819 resets = <&cpg 1108>; 820 status = "disabled"; 821 }; 822 823 scifb0: serial@e6c20000 { 824 compatible = "renesas,scifb-r8a7744", 825 "renesas,rcar-gen2-scifb", "renesas,scifb"; 826 reg = <0 0xe6c20000 0 0x100>; 827 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 828 clocks = <&cpg CPG_MOD 206>; 829 clock-names = "fck"; 830 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 831 <&dmac1 0x3d>, <&dmac1 0x3e>; 832 dma-names = "tx", "rx", "tx", "rx"; 833 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 834 resets = <&cpg 206>; 835 status = "disabled"; 836 }; 837 838 scifb1: serial@e6c30000 { 839 compatible = "renesas,scifb-r8a7744", 840 "renesas,rcar-gen2-scifb", "renesas,scifb"; 841 reg = <0 0xe6c30000 0 0x100>; 842 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 843 clocks = <&cpg CPG_MOD 207>; 844 clock-names = "fck"; 845 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 846 <&dmac1 0x19>, <&dmac1 0x1a>; 847 dma-names = "tx", "rx", "tx", "rx"; 848 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 849 resets = <&cpg 207>; 850 status = "disabled"; 851 }; 852 853 scifb2: serial@e6ce0000 { 854 compatible = "renesas,scifb-r8a7744", 855 "renesas,rcar-gen2-scifb", "renesas,scifb"; 856 reg = <0 0xe6ce0000 0 0x100>; 857 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 858 clocks = <&cpg CPG_MOD 216>; 859 clock-names = "fck"; 860 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 861 <&dmac1 0x1d>, <&dmac1 0x1e>; 862 dma-names = "tx", "rx", "tx", "rx"; 863 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 864 resets = <&cpg 216>; 865 status = "disabled"; 866 }; 867 868 scif0: serial@e6e60000 { 869 compatible = "renesas,scif-r8a7744", 870 "renesas,rcar-gen2-scif", "renesas,scif"; 871 reg = <0 0xe6e60000 0 0x40>; 872 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 873 clocks = <&cpg CPG_MOD 721>, 874 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 875 clock-names = "fck", "brg_int", "scif_clk"; 876 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 877 <&dmac1 0x29>, <&dmac1 0x2a>; 878 dma-names = "tx", "rx", "tx", "rx"; 879 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 880 resets = <&cpg 721>; 881 status = "disabled"; 882 }; 883 884 scif1: serial@e6e68000 { 885 compatible = "renesas,scif-r8a7744", 886 "renesas,rcar-gen2-scif", "renesas,scif"; 887 reg = <0 0xe6e68000 0 0x40>; 888 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 889 clocks = <&cpg CPG_MOD 720>, 890 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 891 clock-names = "fck", "brg_int", "scif_clk"; 892 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 893 <&dmac1 0x2d>, <&dmac1 0x2e>; 894 dma-names = "tx", "rx", "tx", "rx"; 895 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 896 resets = <&cpg 720>; 897 status = "disabled"; 898 }; 899 900 scif2: serial@e6e58000 { 901 compatible = "renesas,scif-r8a7744", 902 "renesas,rcar-gen2-scif", "renesas,scif"; 903 reg = <0 0xe6e58000 0 0x40>; 904 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 905 clocks = <&cpg CPG_MOD 719>, 906 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 907 clock-names = "fck", "brg_int", "scif_clk"; 908 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 909 <&dmac1 0x2b>, <&dmac1 0x2c>; 910 dma-names = "tx", "rx", "tx", "rx"; 911 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 912 resets = <&cpg 719>; 913 status = "disabled"; 914 }; 915 916 scif3: serial@e6ea8000 { 917 compatible = "renesas,scif-r8a7744", 918 "renesas,rcar-gen2-scif", "renesas,scif"; 919 reg = <0 0xe6ea8000 0 0x40>; 920 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 921 clocks = <&cpg CPG_MOD 718>, 922 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 923 clock-names = "fck", "brg_int", "scif_clk"; 924 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 925 <&dmac1 0x2f>, <&dmac1 0x30>; 926 dma-names = "tx", "rx", "tx", "rx"; 927 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 928 resets = <&cpg 718>; 929 status = "disabled"; 930 }; 931 932 scif4: serial@e6ee0000 { 933 compatible = "renesas,scif-r8a7744", 934 "renesas,rcar-gen2-scif", "renesas,scif"; 935 reg = <0 0xe6ee0000 0 0x40>; 936 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 937 clocks = <&cpg CPG_MOD 715>, 938 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 939 clock-names = "fck", "brg_int", "scif_clk"; 940 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 941 <&dmac1 0xfb>, <&dmac1 0xfc>; 942 dma-names = "tx", "rx", "tx", "rx"; 943 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 944 resets = <&cpg 715>; 945 status = "disabled"; 946 }; 947 948 scif5: serial@e6ee8000 { 949 compatible = "renesas,scif-r8a7744", 950 "renesas,rcar-gen2-scif", "renesas,scif"; 951 reg = <0 0xe6ee8000 0 0x40>; 952 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 953 clocks = <&cpg CPG_MOD 714>, 954 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 955 clock-names = "fck", "brg_int", "scif_clk"; 956 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 957 <&dmac1 0xfd>, <&dmac1 0xfe>; 958 dma-names = "tx", "rx", "tx", "rx"; 959 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 960 resets = <&cpg 714>; 961 status = "disabled"; 962 }; 963 964 hscif0: serial@e62c0000 { 965 compatible = "renesas,hscif-r8a7744", 966 "renesas,rcar-gen2-hscif", "renesas,hscif"; 967 reg = <0 0xe62c0000 0 0x60>; 968 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 969 clocks = <&cpg CPG_MOD 717>, 970 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 971 clock-names = "fck", "brg_int", "scif_clk"; 972 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 973 <&dmac1 0x39>, <&dmac1 0x3a>; 974 dma-names = "tx", "rx", "tx", "rx"; 975 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 976 resets = <&cpg 717>; 977 status = "disabled"; 978 }; 979 980 hscif1: serial@e62c8000 { 981 compatible = "renesas,hscif-r8a7744", 982 "renesas,rcar-gen2-hscif", "renesas,hscif"; 983 reg = <0 0xe62c8000 0 0x60>; 984 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 985 clocks = <&cpg CPG_MOD 716>, 986 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 987 clock-names = "fck", "brg_int", "scif_clk"; 988 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 989 <&dmac1 0x4d>, <&dmac1 0x4e>; 990 dma-names = "tx", "rx", "tx", "rx"; 991 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 992 resets = <&cpg 716>; 993 status = "disabled"; 994 }; 995 996 hscif2: serial@e62d0000 { 997 compatible = "renesas,hscif-r8a7744", 998 "renesas,rcar-gen2-hscif", "renesas,hscif"; 999 reg = <0 0xe62d0000 0 0x60>; 1000 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1001 clocks = <&cpg CPG_MOD 713>, 1002 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 1003 clock-names = "fck", "brg_int", "scif_clk"; 1004 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1005 <&dmac1 0x3b>, <&dmac1 0x3c>; 1006 dma-names = "tx", "rx", "tx", "rx"; 1007 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1008 resets = <&cpg 713>; 1009 status = "disabled"; 1010 }; 1011 1012 msiof0: spi@e6e20000 { 1013 compatible = "renesas,msiof-r8a7744", 1014 "renesas,rcar-gen2-msiof"; 1015 reg = <0 0xe6e20000 0 0x0064>; 1016 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1017 clocks = <&cpg CPG_MOD 000>; 1018 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1019 <&dmac1 0x51>, <&dmac1 0x52>; 1020 dma-names = "tx", "rx", "tx", "rx"; 1021 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1022 #address-cells = <1>; 1023 #size-cells = <0>; 1024 resets = <&cpg 000>; 1025 status = "disabled"; 1026 }; 1027 1028 msiof1: spi@e6e10000 { 1029 compatible = "renesas,msiof-r8a7744", 1030 "renesas,rcar-gen2-msiof"; 1031 reg = <0 0xe6e10000 0 0x0064>; 1032 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1033 clocks = <&cpg CPG_MOD 208>; 1034 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1035 <&dmac1 0x55>, <&dmac1 0x56>; 1036 dma-names = "tx", "rx", "tx", "rx"; 1037 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1038 #address-cells = <1>; 1039 #size-cells = <0>; 1040 resets = <&cpg 208>; 1041 status = "disabled"; 1042 }; 1043 1044 msiof2: spi@e6e00000 { 1045 compatible = "renesas,msiof-r8a7744", 1046 "renesas,rcar-gen2-msiof"; 1047 reg = <0 0xe6e00000 0 0x0064>; 1048 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1049 clocks = <&cpg CPG_MOD 205>; 1050 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1051 <&dmac1 0x41>, <&dmac1 0x42>; 1052 dma-names = "tx", "rx", "tx", "rx"; 1053 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1054 #address-cells = <1>; 1055 #size-cells = <0>; 1056 resets = <&cpg 205>; 1057 status = "disabled"; 1058 }; 1059 1060 pwm0: pwm@e6e30000 { 1061 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1062 reg = <0 0xe6e30000 0 0x8>; 1063 clocks = <&cpg CPG_MOD 523>; 1064 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1065 resets = <&cpg 523>; 1066 #pwm-cells = <2>; 1067 status = "disabled"; 1068 }; 1069 1070 pwm1: pwm@e6e31000 { 1071 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1072 reg = <0 0xe6e31000 0 0x8>; 1073 clocks = <&cpg CPG_MOD 523>; 1074 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1075 resets = <&cpg 523>; 1076 #pwm-cells = <2>; 1077 status = "disabled"; 1078 }; 1079 1080 pwm2: pwm@e6e32000 { 1081 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1082 reg = <0 0xe6e32000 0 0x8>; 1083 clocks = <&cpg CPG_MOD 523>; 1084 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1085 resets = <&cpg 523>; 1086 #pwm-cells = <2>; 1087 status = "disabled"; 1088 }; 1089 1090 pwm3: pwm@e6e33000 { 1091 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1092 reg = <0 0xe6e33000 0 0x8>; 1093 clocks = <&cpg CPG_MOD 523>; 1094 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1095 resets = <&cpg 523>; 1096 #pwm-cells = <2>; 1097 status = "disabled"; 1098 }; 1099 1100 pwm4: pwm@e6e34000 { 1101 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1102 reg = <0 0xe6e34000 0 0x8>; 1103 clocks = <&cpg CPG_MOD 523>; 1104 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1105 resets = <&cpg 523>; 1106 #pwm-cells = <2>; 1107 status = "disabled"; 1108 }; 1109 1110 pwm5: pwm@e6e35000 { 1111 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1112 reg = <0 0xe6e35000 0 0x8>; 1113 clocks = <&cpg CPG_MOD 523>; 1114 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1115 resets = <&cpg 523>; 1116 #pwm-cells = <2>; 1117 status = "disabled"; 1118 }; 1119 1120 pwm6: pwm@e6e36000 { 1121 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1122 reg = <0 0xe6e36000 0 0x8>; 1123 clocks = <&cpg CPG_MOD 523>; 1124 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1125 resets = <&cpg 523>; 1126 #pwm-cells = <2>; 1127 status = "disabled"; 1128 }; 1129 1130 can0: can@e6e80000 { 1131 compatible = "renesas,can-r8a7744", 1132 "renesas,rcar-gen2-can"; 1133 reg = <0 0xe6e80000 0 0x1000>; 1134 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1135 clocks = <&cpg CPG_MOD 916>, 1136 <&cpg CPG_CORE R8A7744_CLK_RCAN>, 1137 <&can_clk>; 1138 clock-names = "clkp1", "clkp2", "can_clk"; 1139 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1140 resets = <&cpg 916>; 1141 status = "disabled"; 1142 }; 1143 1144 can1: can@e6e88000 { 1145 compatible = "renesas,can-r8a7744", 1146 "renesas,rcar-gen2-can"; 1147 reg = <0 0xe6e88000 0 0x1000>; 1148 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1149 clocks = <&cpg CPG_MOD 915>, 1150 <&cpg CPG_CORE R8A7744_CLK_RCAN>, 1151 <&can_clk>; 1152 clock-names = "clkp1", "clkp2", "can_clk"; 1153 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1154 resets = <&cpg 915>; 1155 status = "disabled"; 1156 }; 1157 1158 vin0: video@e6ef0000 { 1159 compatible = "renesas,vin-r8a7744", 1160 "renesas,rcar-gen2-vin"; 1161 reg = <0 0xe6ef0000 0 0x1000>; 1162 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1163 clocks = <&cpg CPG_MOD 811>; 1164 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1165 resets = <&cpg 811>; 1166 status = "disabled"; 1167 }; 1168 1169 vin1: video@e6ef1000 { 1170 compatible = "renesas,vin-r8a7744", 1171 "renesas,rcar-gen2-vin"; 1172 reg = <0 0xe6ef1000 0 0x1000>; 1173 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1174 clocks = <&cpg CPG_MOD 810>; 1175 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1176 resets = <&cpg 810>; 1177 status = "disabled"; 1178 }; 1179 1180 vin2: video@e6ef2000 { 1181 compatible = "renesas,vin-r8a7744", 1182 "renesas,rcar-gen2-vin"; 1183 reg = <0 0xe6ef2000 0 0x1000>; 1184 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1185 clocks = <&cpg CPG_MOD 809>; 1186 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1187 resets = <&cpg 809>; 1188 status = "disabled"; 1189 }; 1190 1191 rcar_sound: sound@ec500000 { 1192 /* 1193 * #sound-dai-cells is required if simple-card 1194 * 1195 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1196 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1197 */ 1198 compatible = "renesas,rcar_sound-r8a7744", 1199 "renesas,rcar_sound-gen2"; 1200 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1201 <0 0xec5a0000 0 0x100>, /* ADG */ 1202 <0 0xec540000 0 0x1000>, /* SSIU */ 1203 <0 0xec541000 0 0x280>, /* SSI */ 1204 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1205 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1206 1207 clocks = <&cpg CPG_MOD 1005>, 1208 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1209 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1210 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1211 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1212 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1213 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1214 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1215 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1216 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1217 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1218 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1219 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1220 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1221 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1222 <&cpg CPG_CORE R8A7744_CLK_M2>; 1223 clock-names = "ssi-all", 1224 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1225 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", 1226 "src.9", "src.8", "src.7", "src.6", "src.5", 1227 "src.4", "src.3", "src.2", "src.1", "src.0", 1228 "ctu.0", "ctu.1", 1229 "mix.0", "mix.1", 1230 "dvc.0", "dvc.1", 1231 "clk_a", "clk_b", "clk_c", "clk_i"; 1232 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1233 resets = <&cpg 1005>, 1234 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, 1235 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>, 1236 <&cpg 1014>, <&cpg 1015>; 1237 reset-names = "ssi-all", 1238 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1239 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0"; 1240 status = "disabled"; 1241 1242 rcar_sound,dvc { 1243 dvc0: dvc-0 { 1244 dmas = <&audma1 0xbc>; 1245 dma-names = "tx"; 1246 }; 1247 dvc1: dvc-1 { 1248 dmas = <&audma1 0xbe>; 1249 dma-names = "tx"; 1250 }; 1251 }; 1252 1253 rcar_sound,mix { 1254 mix0: mix-0 { }; 1255 mix1: mix-1 { }; 1256 }; 1257 1258 rcar_sound,ctu { 1259 ctu00: ctu-0 { }; 1260 ctu01: ctu-1 { }; 1261 ctu02: ctu-2 { }; 1262 ctu03: ctu-3 { }; 1263 ctu10: ctu-4 { }; 1264 ctu11: ctu-5 { }; 1265 ctu12: ctu-6 { }; 1266 ctu13: ctu-7 { }; 1267 }; 1268 1269 rcar_sound,src { 1270 src0: src-0 { 1271 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1272 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1273 dma-names = "rx", "tx"; 1274 }; 1275 src1: src-1 { 1276 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1277 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1278 dma-names = "rx", "tx"; 1279 }; 1280 src2: src-2 { 1281 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1282 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1283 dma-names = "rx", "tx"; 1284 }; 1285 src3: src-3 { 1286 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1287 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1288 dma-names = "rx", "tx"; 1289 }; 1290 src4: src-4 { 1291 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1292 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1293 dma-names = "rx", "tx"; 1294 }; 1295 src5: src-5 { 1296 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1297 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1298 dma-names = "rx", "tx"; 1299 }; 1300 src6: src-6 { 1301 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1302 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1303 dma-names = "rx", "tx"; 1304 }; 1305 src7: src-7 { 1306 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1307 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1308 dma-names = "rx", "tx"; 1309 }; 1310 src8: src-8 { 1311 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1312 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1313 dma-names = "rx", "tx"; 1314 }; 1315 src9: src-9 { 1316 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1317 dmas = <&audma0 0x97>, <&audma1 0xba>; 1318 dma-names = "rx", "tx"; 1319 }; 1320 }; 1321 1322 rcar_sound,ssi { 1323 ssi0: ssi-0 { 1324 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1325 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1326 dma-names = "rx", "tx", "rxu", "txu"; 1327 }; 1328 ssi1: ssi-1 { 1329 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1330 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1331 dma-names = "rx", "tx", "rxu", "txu"; 1332 }; 1333 ssi2: ssi-2 { 1334 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1335 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1336 dma-names = "rx", "tx", "rxu", "txu"; 1337 }; 1338 ssi3: ssi-3 { 1339 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1340 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1341 dma-names = "rx", "tx", "rxu", "txu"; 1342 }; 1343 ssi4: ssi-4 { 1344 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1345 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1346 dma-names = "rx", "tx", "rxu", "txu"; 1347 }; 1348 ssi5: ssi-5 { 1349 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1350 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1351 dma-names = "rx", "tx", "rxu", "txu"; 1352 }; 1353 ssi6: ssi-6 { 1354 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1355 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1356 dma-names = "rx", "tx", "rxu", "txu"; 1357 }; 1358 ssi7: ssi-7 { 1359 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1360 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1361 dma-names = "rx", "tx", "rxu", "txu"; 1362 }; 1363 ssi8: ssi-8 { 1364 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1365 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1366 dma-names = "rx", "tx", "rxu", "txu"; 1367 }; 1368 ssi9: ssi-9 { 1369 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1370 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1371 dma-names = "rx", "tx", "rxu", "txu"; 1372 }; 1373 }; 1374 }; 1375 1376 audma0: dma-controller@ec700000 { 1377 compatible = "renesas,dmac-r8a7744", 1378 "renesas,rcar-dmac"; 1379 reg = <0 0xec700000 0 0x10000>; 1380 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1381 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1382 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1383 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1384 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1385 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1386 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1387 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1388 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1389 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1390 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1391 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1392 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1393 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1394 interrupt-names = "error", 1395 "ch0", "ch1", "ch2", "ch3", 1396 "ch4", "ch5", "ch6", "ch7", 1397 "ch8", "ch9", "ch10", "ch11", 1398 "ch12"; 1399 clocks = <&cpg CPG_MOD 502>; 1400 clock-names = "fck"; 1401 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1402 resets = <&cpg 502>; 1403 #dma-cells = <1>; 1404 dma-channels = <13>; 1405 }; 1406 1407 audma1: dma-controller@ec720000 { 1408 compatible = "renesas,dmac-r8a7744", 1409 "renesas,rcar-dmac"; 1410 reg = <0 0xec720000 0 0x10000>; 1411 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1412 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1413 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1414 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1415 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1416 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1417 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1418 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1419 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1420 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1421 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1422 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1423 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1424 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1425 interrupt-names = "error", 1426 "ch0", "ch1", "ch2", "ch3", 1427 "ch4", "ch5", "ch6", "ch7", 1428 "ch8", "ch9", "ch10", "ch11", 1429 "ch12"; 1430 clocks = <&cpg CPG_MOD 501>; 1431 clock-names = "fck"; 1432 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1433 resets = <&cpg 501>; 1434 #dma-cells = <1>; 1435 dma-channels = <13>; 1436 }; 1437 1438 /* 1439 * pci1 and xhci share the same phy, therefore only one of them 1440 * can be active at any one time. If both of them are enabled, 1441 * a race condition will determine who'll control the phy. 1442 * A firmware file is needed by the xhci driver in order for 1443 * USB 3.0 to work properly. 1444 */ 1445 xhci: usb@ee000000 { 1446 compatible = "renesas,xhci-r8a7744", 1447 "renesas,rcar-gen2-xhci"; 1448 reg = <0 0xee000000 0 0xc00>; 1449 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1450 clocks = <&cpg CPG_MOD 328>; 1451 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1452 resets = <&cpg 328>; 1453 phys = <&usb2 1>; 1454 phy-names = "usb"; 1455 status = "disabled"; 1456 }; 1457 1458 pci0: pci@ee090000 { 1459 compatible = "renesas,pci-r8a7744", 1460 "renesas,pci-rcar-gen2"; 1461 device_type = "pci"; 1462 reg = <0 0xee090000 0 0xc00>, 1463 <0 0xee080000 0 0x1100>; 1464 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1465 clocks = <&cpg CPG_MOD 703>; 1466 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1467 resets = <&cpg 703>; 1468 status = "disabled"; 1469 1470 bus-range = <0 0>; 1471 #address-cells = <3>; 1472 #size-cells = <2>; 1473 #interrupt-cells = <1>; 1474 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1475 interrupt-map-mask = <0xf800 0 0 0x7>; 1476 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1477 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1478 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1479 1480 usb@1,0 { 1481 reg = <0x800 0 0 0 0>; 1482 phys = <&usb0 0>; 1483 phy-names = "usb"; 1484 }; 1485 1486 usb@2,0 { 1487 reg = <0x1000 0 0 0 0>; 1488 phys = <&usb0 0>; 1489 phy-names = "usb"; 1490 }; 1491 }; 1492 1493 pci1: pci@ee0d0000 { 1494 compatible = "renesas,pci-r8a7744", 1495 "renesas,pci-rcar-gen2"; 1496 device_type = "pci"; 1497 reg = <0 0xee0d0000 0 0xc00>, 1498 <0 0xee0c0000 0 0x1100>; 1499 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1500 clocks = <&cpg CPG_MOD 703>; 1501 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1502 resets = <&cpg 703>; 1503 status = "disabled"; 1504 1505 bus-range = <1 1>; 1506 #address-cells = <3>; 1507 #size-cells = <2>; 1508 #interrupt-cells = <1>; 1509 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1510 interrupt-map-mask = <0xf800 0 0 0x7>; 1511 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1512 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1513 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1514 1515 usb@1,0 { 1516 reg = <0x10800 0 0 0 0>; 1517 phys = <&usb2 0>; 1518 phy-names = "usb"; 1519 }; 1520 1521 usb@2,0 { 1522 reg = <0x11000 0 0 0 0>; 1523 phys = <&usb2 0>; 1524 phy-names = "usb"; 1525 }; 1526 }; 1527 1528 sdhi0: mmc@ee100000 { 1529 compatible = "renesas,sdhi-r8a7744", 1530 "renesas,rcar-gen2-sdhi"; 1531 reg = <0 0xee100000 0 0x328>; 1532 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1533 clocks = <&cpg CPG_MOD 314>; 1534 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1535 <&dmac1 0xcd>, <&dmac1 0xce>; 1536 dma-names = "tx", "rx", "tx", "rx"; 1537 max-frequency = <195000000>; 1538 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1539 resets = <&cpg 314>; 1540 status = "disabled"; 1541 }; 1542 1543 sdhi1: mmc@ee140000 { 1544 compatible = "renesas,sdhi-r8a7744", 1545 "renesas,rcar-gen2-sdhi"; 1546 reg = <0 0xee140000 0 0x100>; 1547 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1548 clocks = <&cpg CPG_MOD 312>; 1549 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1550 <&dmac1 0xc1>, <&dmac1 0xc2>; 1551 dma-names = "tx", "rx", "tx", "rx"; 1552 max-frequency = <97500000>; 1553 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1554 resets = <&cpg 312>; 1555 status = "disabled"; 1556 }; 1557 1558 sdhi2: mmc@ee160000 { 1559 compatible = "renesas,sdhi-r8a7744", 1560 "renesas,rcar-gen2-sdhi"; 1561 reg = <0 0xee160000 0 0x100>; 1562 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1563 clocks = <&cpg CPG_MOD 311>; 1564 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1565 <&dmac1 0xd3>, <&dmac1 0xd4>; 1566 dma-names = "tx", "rx", "tx", "rx"; 1567 max-frequency = <97500000>; 1568 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1569 resets = <&cpg 311>; 1570 status = "disabled"; 1571 }; 1572 1573 mmcif0: mmc@ee200000 { 1574 compatible = "renesas,mmcif-r8a7744", 1575 "renesas,sh-mmcif"; 1576 reg = <0 0xee200000 0 0x80>; 1577 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1578 clocks = <&cpg CPG_MOD 315>; 1579 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1580 <&dmac1 0xd1>, <&dmac1 0xd2>; 1581 dma-names = "tx", "rx", "tx", "rx"; 1582 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1583 resets = <&cpg 315>; 1584 reg-io-width = <4>; 1585 max-frequency = <97500000>; 1586 status = "disabled"; 1587 }; 1588 1589 gic: interrupt-controller@f1001000 { 1590 compatible = "arm,gic-400"; 1591 #interrupt-cells = <3>; 1592 #address-cells = <0>; 1593 interrupt-controller; 1594 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1595 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1596 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1597 clocks = <&cpg CPG_MOD 408>; 1598 clock-names = "clk"; 1599 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1600 resets = <&cpg 408>; 1601 }; 1602 1603 pciec: pcie@fe000000 { 1604 compatible = "renesas,pcie-r8a7744", 1605 "renesas,pcie-rcar-gen2"; 1606 reg = <0 0xfe000000 0 0x80000>; 1607 #address-cells = <3>; 1608 #size-cells = <2>; 1609 bus-range = <0x00 0xff>; 1610 device_type = "pci"; 1611 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1612 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1613 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1614 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1615 /* Map all possible DDR as inbound ranges */ 1616 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1617 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1618 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1619 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1620 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1621 #interrupt-cells = <1>; 1622 interrupt-map-mask = <0 0 0 0>; 1623 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1624 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1625 clock-names = "pcie", "pcie_bus"; 1626 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1627 resets = <&cpg 319>; 1628 status = "disabled"; 1629 }; 1630 1631 vsp@fe928000 { 1632 compatible = "renesas,vsp1"; 1633 reg = <0 0xfe928000 0 0x8000>; 1634 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1635 clocks = <&cpg CPG_MOD 131>; 1636 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1637 resets = <&cpg 131>; 1638 }; 1639 1640 vsp@fe930000 { 1641 compatible = "renesas,vsp1"; 1642 reg = <0 0xfe930000 0 0x8000>; 1643 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1644 clocks = <&cpg CPG_MOD 128>; 1645 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1646 resets = <&cpg 128>; 1647 }; 1648 1649 vsp@fe938000 { 1650 compatible = "renesas,vsp1"; 1651 reg = <0 0xfe938000 0 0x8000>; 1652 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1653 clocks = <&cpg CPG_MOD 127>; 1654 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1655 resets = <&cpg 127>; 1656 }; 1657 1658 du: display@feb00000 { 1659 compatible = "renesas,du-r8a7744"; 1660 reg = <0 0xfeb00000 0 0x40000>; 1661 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1662 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1663 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1664 clock-names = "du.0", "du.1"; 1665 resets = <&cpg 724>; 1666 reset-names = "du.0"; 1667 status = "disabled"; 1668 1669 ports { 1670 #address-cells = <1>; 1671 #size-cells = <0>; 1672 1673 port@0 { 1674 reg = <0>; 1675 du_out_rgb: endpoint { 1676 }; 1677 }; 1678 port@1 { 1679 reg = <1>; 1680 du_out_lvds0: endpoint { 1681 remote-endpoint = <&lvds0_in>; 1682 }; 1683 }; 1684 }; 1685 }; 1686 1687 lvds0: lvds@feb90000 { 1688 compatible = "renesas,r8a7744-lvds"; 1689 reg = <0 0xfeb90000 0 0x1c>; 1690 clocks = <&cpg CPG_MOD 726>; 1691 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1692 resets = <&cpg 726>; 1693 status = "disabled"; 1694 1695 ports { 1696 #address-cells = <1>; 1697 #size-cells = <0>; 1698 1699 port@0 { 1700 reg = <0>; 1701 lvds0_in: endpoint { 1702 remote-endpoint = <&du_out_lvds0>; 1703 }; 1704 }; 1705 port@1 { 1706 reg = <1>; 1707 lvds0_out: endpoint { 1708 }; 1709 }; 1710 }; 1711 }; 1712 1713 prr: chipid@ff000044 { 1714 compatible = "renesas,prr"; 1715 reg = <0 0xff000044 0 4>; 1716 }; 1717 1718 cmt0: timer@ffca0000 { 1719 compatible = "renesas,r8a7744-cmt0", 1720 "renesas,rcar-gen2-cmt0"; 1721 reg = <0 0xffca0000 0 0x1004>; 1722 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1723 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1724 clocks = <&cpg CPG_MOD 124>; 1725 clock-names = "fck"; 1726 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1727 resets = <&cpg 124>; 1728 status = "disabled"; 1729 }; 1730 1731 cmt1: timer@e6130000 { 1732 compatible = "renesas,r8a7744-cmt1", 1733 "renesas,rcar-gen2-cmt1"; 1734 reg = <0 0xe6130000 0 0x1004>; 1735 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1736 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1737 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1738 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1739 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1740 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1741 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1742 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1743 clocks = <&cpg CPG_MOD 329>; 1744 clock-names = "fck"; 1745 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1746 resets = <&cpg 329>; 1747 status = "disabled"; 1748 }; 1749 }; 1750 1751 thermal-zones { 1752 cpu_thermal: cpu-thermal { 1753 polling-delay-passive = <0>; 1754 polling-delay = <0>; 1755 1756 thermal-sensors = <&thermal>; 1757 1758 trips { 1759 cpu-crit { 1760 temperature = <95000>; 1761 hysteresis = <0>; 1762 type = "critical"; 1763 }; 1764 }; 1765 1766 cooling-maps { 1767 }; 1768 }; 1769 }; 1770 1771 timer { 1772 compatible = "arm,armv7-timer"; 1773 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1774 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1775 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1776 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1777 }; 1778 1779 /* External USB clock - can be overridden by the board */ 1780 usb_extal_clk: usb_extal { 1781 compatible = "fixed-clock"; 1782 #clock-cells = <0>; 1783 clock-frequency = <48000000>; 1784 }; 1785}; 1786