1 /* 2 * Copyright 2016 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs <bskeggs@redhat.com> 23 */ 24 #include "ctxgf100.h" 25 26 #include <subdev/fb.h> 27 28 /******************************************************************************* 29 * PGRAPH context implementation 30 ******************************************************************************/ 31 32 static void 33 gp102_grctx_generate_r408840(struct gf100_gr *gr) 34 { 35 struct nvkm_device *device = gr->base.engine.subdev.device; 36 nvkm_mask(device, 0x408840, 0x00000003, 0x00000000); 37 } 38 39 void 40 gp102_grctx_generate_attrib(struct gf100_gr_chan *chan) 41 { 42 struct gf100_gr *gr = chan->gr; 43 const struct gf100_grctx_func *grctx = gr->func->grctx; 44 const u32 alpha = grctx->alpha_nr; 45 const u32 attrib = grctx->attrib_nr; 46 const u32 gfxp = grctx->gfxp_nr; 47 const int max_batches = 0xffff; 48 u32 size = grctx->alpha_nr_max * gr->tpc_total; 49 u32 ao = 0; 50 u32 bo = ao + size; 51 int gpc, ppc, n = 0; 52 53 gf100_grctx_patch_wr32(chan, 0x405830, attrib); 54 gf100_grctx_patch_wr32(chan, 0x40585c, alpha); 55 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); 56 57 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { 58 for (ppc = 0; ppc < gr->func->ppc_nr; ppc++, n++) { 59 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; 60 const u32 bs = attrib * gr->ppc_tpc_max; 61 const u32 gs = gfxp * gr->ppc_tpc_max; 62 const u32 u = 0x418ea0 + (n * 0x04); 63 const u32 o = PPC_UNIT(gpc, ppc, 0); 64 const u32 p = GPC_UNIT(gpc, 0xc44 + (ppc * 4)); 65 66 if (!(gr->ppc_mask[gpc] & (1 << ppc))) 67 continue; 68 69 gf100_grctx_patch_wr32(chan, o + 0xc0, gs); 70 gf100_grctx_patch_wr32(chan, p, bs); 71 gf100_grctx_patch_wr32(chan, o + 0xf4, bo); 72 gf100_grctx_patch_wr32(chan, o + 0xf0, bs); 73 bo += gs; 74 gf100_grctx_patch_wr32(chan, o + 0xe4, as); 75 gf100_grctx_patch_wr32(chan, o + 0xf8, ao); 76 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; 77 gf100_grctx_patch_wr32(chan, u, bs); 78 } 79 } 80 81 gf100_grctx_patch_wr32(chan, 0x4181e4, 0x00000100); 82 gf100_grctx_patch_wr32(chan, 0x41befc, 0x00000100); 83 } 84 85 u32 86 gp102_grctx_generate_attrib_cb_size(struct gf100_gr *gr) 87 { 88 const struct gf100_grctx_func *grctx = gr->func->grctx; 89 u32 size = grctx->alpha_nr_max * gr->tpc_total; 90 int gpc; 91 92 for (gpc = 0; gpc < gr->gpc_nr; gpc++) 93 size += grctx->gfxp_nr * gr->func->ppc_nr * gr->ppc_tpc_max; 94 95 return ((size * 0x20) + 127) & ~127; 96 } 97 98 const struct gf100_grctx_func 99 gp102_grctx = { 100 .main = gf100_grctx_generate_main, 101 .unkn = gk104_grctx_generate_unkn, 102 .bundle = gm107_grctx_generate_bundle, 103 .bundle_size = 0x3000, 104 .bundle_min_gpm_fifo_depth = 0x180, 105 .bundle_token_limit = 0x900, 106 .pagepool = gp100_grctx_generate_pagepool, 107 .pagepool_size = 0x20000, 108 .attrib_cb_size = gp102_grctx_generate_attrib_cb_size, 109 .attrib_cb = gp100_grctx_generate_attrib_cb, 110 .attrib = gp102_grctx_generate_attrib, 111 .attrib_nr_max = 0x4b0, 112 .attrib_nr = 0x320, 113 .alpha_nr_max = 0xc00, 114 .alpha_nr = 0x800, 115 .gfxp_nr = 0xba8, 116 .sm_id = gm107_grctx_generate_sm_id, 117 .rop_mapping = gf117_grctx_generate_rop_mapping, 118 .dist_skip_table = gm200_grctx_generate_dist_skip_table, 119 .r406500 = gm200_grctx_generate_r406500, 120 .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr, 121 .tpc_mask = gm200_grctx_generate_tpc_mask, 122 .smid_config = gp100_grctx_generate_smid_config, 123 .r419a3c = gm200_grctx_generate_r419a3c, 124 .r408840 = gp102_grctx_generate_r408840, 125 }; 126