1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. 4 */ 5 6/ { 7 compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588"; 8 9 aliases { 10 mmc0 = &sdhci; 11 }; 12 13 vcc12v_dcin: vcc12v-dcin-regulator { 14 compatible = "regulator-fixed"; 15 regulator-name = "vcc12v_dcin"; 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <12000000>; 19 regulator-max-microvolt = <12000000>; 20 }; 21 22 vcc5v0_sys: vcc5v0-sys-regulator { 23 compatible = "regulator-fixed"; 24 regulator-name = "vcc5v0_sys"; 25 regulator-always-on; 26 regulator-boot-on; 27 regulator-min-microvolt = <5000000>; 28 regulator-max-microvolt = <5000000>; 29 vin-supply = <&vcc12v_dcin>; 30 }; 31 32 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc_1v1_nldo_s3"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <1100000>; 38 regulator-max-microvolt = <1100000>; 39 vin-supply = <&vcc5v0_sys>; 40 }; 41}; 42 43&cpu_l0 { 44 cpu-supply = <&vdd_cpu_lit_s0>; 45}; 46 47&cpu_l1 { 48 cpu-supply = <&vdd_cpu_lit_s0>; 49}; 50 51&cpu_l2 { 52 cpu-supply = <&vdd_cpu_lit_s0>; 53}; 54 55&cpu_l3 { 56 cpu-supply = <&vdd_cpu_lit_s0>; 57}; 58 59&sdhci { 60 bus-width = <8>; 61 no-sdio; 62 no-sd; 63 non-removable; 64 mmc-hs400-1_8v; 65 mmc-hs400-enhanced-strobe; 66 status = "okay"; 67}; 68 69&spi2 { 70 status = "okay"; 71 assigned-clocks = <&cru CLK_SPI2>; 72 assigned-clock-rates = <200000000>; 73 num-cs = <1>; 74 pinctrl-names = "default"; 75 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 76 77 pmic@0 { 78 compatible = "rockchip,rk806"; 79 spi-max-frequency = <1000000>; 80 reg = <0x0>; 81 interrupt-parent = <&gpio0>; 82 interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 85 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 86 87 vcc1-supply = <&vcc5v0_sys>; 88 vcc2-supply = <&vcc5v0_sys>; 89 vcc3-supply = <&vcc5v0_sys>; 90 vcc4-supply = <&vcc5v0_sys>; 91 vcc5-supply = <&vcc5v0_sys>; 92 vcc6-supply = <&vcc5v0_sys>; 93 vcc7-supply = <&vcc5v0_sys>; 94 vcc8-supply = <&vcc5v0_sys>; 95 vcc9-supply = <&vcc5v0_sys>; 96 vcc10-supply = <&vcc5v0_sys>; 97 vcc11-supply = <&vcc_2v0_pldo_s3>; 98 vcc12-supply = <&vcc5v0_sys>; 99 vcc13-supply = <&vcc_1v1_nldo_s3>; 100 vcc14-supply = <&vcc_1v1_nldo_s3>; 101 vcca-supply = <&vcc5v0_sys>; 102 103 gpio-controller; 104 #gpio-cells = <2>; 105 106 rk806_dvs1_null: dvs1-null-pins { 107 pins = "gpio_pwrctrl2"; 108 function = "pin_fun0"; 109 }; 110 111 rk806_dvs2_null: dvs2-null-pins { 112 pins = "gpio_pwrctrl2"; 113 function = "pin_fun0"; 114 }; 115 116 rk806_dvs3_null: dvs3-null-pins { 117 pins = "gpio_pwrctrl3"; 118 function = "pin_fun0"; 119 }; 120 121 regulators { 122 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 123 regulator-name = "vdd_gpu_s0"; 124 regulator-boot-on; 125 regulator-min-microvolt = <550000>; 126 regulator-max-microvolt = <950000>; 127 regulator-ramp-delay = <12500>; 128 regulator-enable-ramp-delay = <400>; 129 130 regulator-state-mem { 131 regulator-off-in-suspend; 132 }; 133 }; 134 135 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 136 regulator-name = "vdd_cpu_lit_s0"; 137 regulator-always-on; 138 regulator-boot-on; 139 regulator-min-microvolt = <550000>; 140 regulator-max-microvolt = <950000>; 141 regulator-ramp-delay = <12500>; 142 143 regulator-state-mem { 144 regulator-off-in-suspend; 145 }; 146 }; 147 148 vdd_log_s0: dcdc-reg3 { 149 regulator-name = "vdd_log_s0"; 150 regulator-always-on; 151 regulator-boot-on; 152 regulator-min-microvolt = <675000>; 153 regulator-max-microvolt = <750000>; 154 regulator-ramp-delay = <12500>; 155 156 regulator-state-mem { 157 regulator-off-in-suspend; 158 regulator-suspend-microvolt = <750000>; 159 }; 160 }; 161 162 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 163 regulator-name = "vdd_vdenc_s0"; 164 regulator-always-on; 165 regulator-boot-on; 166 regulator-min-microvolt = <550000>; 167 regulator-max-microvolt = <950000>; 168 regulator-init-microvolt = <750000>; 169 regulator-ramp-delay = <12500>; 170 171 regulator-state-mem { 172 regulator-off-in-suspend; 173 }; 174 }; 175 176 vdd_ddr_s0: dcdc-reg5 { 177 regulator-name = "vdd_ddr_s0"; 178 regulator-always-on; 179 regulator-boot-on; 180 regulator-min-microvolt = <675000>; 181 regulator-max-microvolt = <900000>; 182 regulator-ramp-delay = <12500>; 183 184 regulator-state-mem { 185 regulator-off-in-suspend; 186 regulator-suspend-microvolt = <850000>; 187 }; 188 }; 189 190 vdd2_ddr_s3: dcdc-reg6 { 191 regulator-name = "vdd2_ddr_s3"; 192 regulator-always-on; 193 regulator-boot-on; 194 195 regulator-state-mem { 196 regulator-on-in-suspend; 197 }; 198 }; 199 200 vcc_2v0_pldo_s3: dcdc-reg7 { 201 regulator-name = "vdd_2v0_pldo_s3"; 202 regulator-always-on; 203 regulator-boot-on; 204 regulator-min-microvolt = <2000000>; 205 regulator-max-microvolt = <2000000>; 206 regulator-ramp-delay = <12500>; 207 208 regulator-state-mem { 209 regulator-on-in-suspend; 210 regulator-suspend-microvolt = <2000000>; 211 }; 212 }; 213 214 vcc_3v3_s3: dcdc-reg8 { 215 regulator-name = "vcc_3v3_s3"; 216 regulator-always-on; 217 regulator-boot-on; 218 regulator-min-microvolt = <3300000>; 219 regulator-max-microvolt = <3300000>; 220 221 regulator-state-mem { 222 regulator-on-in-suspend; 223 regulator-suspend-microvolt = <3300000>; 224 }; 225 }; 226 227 vddq_ddr_s0: dcdc-reg9 { 228 regulator-name = "vddq_ddr_s0"; 229 regulator-always-on; 230 regulator-boot-on; 231 232 regulator-state-mem { 233 regulator-off-in-suspend; 234 }; 235 }; 236 237 vcc_1v8_s3: dcdc-reg10 { 238 regulator-name = "vcc_1v8_s3"; 239 regulator-always-on; 240 regulator-boot-on; 241 regulator-min-microvolt = <1800000>; 242 regulator-max-microvolt = <1800000>; 243 244 regulator-state-mem { 245 regulator-on-in-suspend; 246 regulator-suspend-microvolt = <1800000>; 247 }; 248 }; 249 250 avcc_1v8_s0: pldo-reg1 { 251 regulator-name = "avcc_1v8_s0"; 252 regulator-always-on; 253 regulator-boot-on; 254 regulator-min-microvolt = <1800000>; 255 regulator-max-microvolt = <1800000>; 256 257 regulator-state-mem { 258 regulator-off-in-suspend; 259 }; 260 }; 261 262 vcc_1v8_s0: pldo-reg2 { 263 regulator-name = "vcc_1v8_s0"; 264 regulator-always-on; 265 regulator-boot-on; 266 regulator-min-microvolt = <1800000>; 267 regulator-max-microvolt = <1800000>; 268 269 regulator-state-mem { 270 regulator-off-in-suspend; 271 regulator-suspend-microvolt = <1800000>; 272 }; 273 }; 274 275 avdd_1v2_s0: pldo-reg3 { 276 regulator-name = "avdd_1v2_s0"; 277 regulator-always-on; 278 regulator-boot-on; 279 regulator-min-microvolt = <1200000>; 280 regulator-max-microvolt = <1200000>; 281 282 regulator-state-mem { 283 regulator-off-in-suspend; 284 }; 285 }; 286 287 vcc_3v3_s0: pldo-reg4 { 288 regulator-name = "vcc_3v3_s0"; 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-min-microvolt = <3300000>; 292 regulator-max-microvolt = <3300000>; 293 regulator-ramp-delay = <12500>; 294 295 regulator-state-mem { 296 regulator-off-in-suspend; 297 }; 298 }; 299 300 vccio_sd_s0: pldo-reg5 { 301 regulator-name = "vccio_sd_s0"; 302 regulator-always-on; 303 regulator-boot-on; 304 regulator-min-microvolt = <1800000>; 305 regulator-max-microvolt = <3300000>; 306 regulator-ramp-delay = <12500>; 307 308 regulator-state-mem { 309 regulator-off-in-suspend; 310 }; 311 }; 312 313 pldo6_s3: pldo-reg6 { 314 regulator-name = "pldo6_s3"; 315 regulator-always-on; 316 regulator-boot-on; 317 regulator-min-microvolt = <1800000>; 318 regulator-max-microvolt = <1800000>; 319 320 regulator-state-mem { 321 regulator-on-in-suspend; 322 regulator-suspend-microvolt = <1800000>; 323 }; 324 }; 325 326 vdd_0v75_s3: nldo-reg1 { 327 regulator-name = "vdd_0v75_s3"; 328 regulator-always-on; 329 regulator-boot-on; 330 regulator-min-microvolt = <750000>; 331 regulator-max-microvolt = <750000>; 332 333 regulator-state-mem { 334 regulator-on-in-suspend; 335 regulator-suspend-microvolt = <750000>; 336 }; 337 }; 338 339 vdd_ddr_pll_s0: nldo-reg2 { 340 regulator-name = "vdd_ddr_pll_s0"; 341 regulator-always-on; 342 regulator-boot-on; 343 regulator-min-microvolt = <850000>; 344 regulator-max-microvolt = <850000>; 345 346 regulator-state-mem { 347 regulator-off-in-suspend; 348 regulator-suspend-microvolt = <850000>; 349 }; 350 }; 351 352 avdd_0v75_s0: nldo-reg3 { 353 regulator-name = "avdd_0v75_s0"; 354 regulator-always-on; 355 regulator-boot-on; 356 regulator-min-microvolt = <750000>; 357 regulator-max-microvolt = <750000>; 358 359 regulator-state-mem { 360 regulator-off-in-suspend; 361 }; 362 }; 363 364 vdd_0v85_s0: nldo-reg4 { 365 regulator-name = "vdd_0v85_s0"; 366 regulator-always-on; 367 regulator-boot-on; 368 regulator-min-microvolt = <850000>; 369 regulator-max-microvolt = <850000>; 370 371 regulator-state-mem { 372 regulator-off-in-suspend; 373 }; 374 }; 375 376 vdd_0v75_s0: nldo-reg5 { 377 regulator-name = "vdd_0v75_s0"; 378 regulator-always-on; 379 regulator-boot-on; 380 regulator-min-microvolt = <750000>; 381 regulator-max-microvolt = <750000>; 382 383 regulator-state-mem { 384 regulator-off-in-suspend; 385 }; 386 }; 387 }; 388 }; 389}; 390