1// SPDX-License-Identifier: GPL-2.0 2 3#include <dt-bindings/interrupt-controller/irq.h> 4 5/ { 6 #address-cells = <2>; 7 #size-cells = <2>; 8 9 cpuintc: interrupt-controller { 10 #address-cells = <0>; 11 #interrupt-cells = <1>; 12 interrupt-controller; 13 compatible = "mti,cpu-interrupt-controller"; 14 }; 15 16 package0: bus@1fe00000 { 17 compatible = "simple-bus"; 18 #address-cells = <2>; 19 #size-cells = <1>; 20 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000 21 0 0x3ff00000 0 0x3ff00000 0x100000 22 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>; 23 24 liointc: interrupt-controller@3ff01400 { 25 compatible = "loongson,liointc-1.0"; 26 reg = <0 0x3ff01400 0x64>; 27 28 interrupt-controller; 29 #interrupt-cells = <2>; 30 31 interrupt-parent = <&cpuintc>; 32 interrupts = <2>, <3>; 33 interrupt-names = "int0", "int1"; 34 35 loongson,parent_int_map = <0x00ffffff>, /* int0 */ 36 <0xff000000>, /* int1 */ 37 <0x00000000>, /* int2 */ 38 <0x00000000>; /* int3 */ 39 40 }; 41 42 cpu_uart0: serial@1fe00100 { 43 compatible = "ns16550a"; 44 reg = <0 0x1fe00100 0x10>; 45 clock-frequency = <100000000>; 46 interrupt-parent = <&liointc>; 47 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 48 no-loopback-test; 49 }; 50 51 cpu_uart1: serial@1fe00110 { 52 status = "disabled"; 53 compatible = "ns16550a"; 54 reg = <0 0x1fe00110 0x10>; 55 clock-frequency = <100000000>; 56 interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; 57 interrupt-parent = <&liointc>; 58 no-loopback-test; 59 }; 60 }; 61}; 62