1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_WMI_H 8 #define ATH12K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 13 /* Naming conventions for structures: 14 * 15 * _cmd means that this is a firmware command sent from host to firmware. 16 * 17 * _event means that this is a firmware event sent from firmware to host 18 * 19 * _params is a structure which is embedded either into _cmd or _event (or 20 * both), it is not sent individually. 21 * 22 * _arg is used inside the host, the firmware does not see that at all. 23 */ 24 25 struct ath12k_base; 26 struct ath12k; 27 28 /* There is no signed version of __le32, so for a temporary solution come 29 * up with our own version. The idea is from fs/ntfs/endian.h. 30 * 31 * Use a_ prefix so that it doesn't conflict if we get proper support to 32 * linux/types.h. 33 */ 34 typedef __s32 __bitwise a_sle32; 35 36 static inline a_sle32 a_cpu_to_sle32(s32 val) 37 { 38 return (__force a_sle32)cpu_to_le32(val); 39 } 40 41 static inline s32 a_sle32_to_cpu(a_sle32 val) 42 { 43 return le32_to_cpu((__force __le32)val); 44 } 45 46 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 47 #define MAX_HE_NSS 8 48 #define MAX_HE_MODULATION 8 49 #define MAX_HE_RU 4 50 #define HE_MODULATION_NONE 7 51 #define HE_PET_0_USEC 0 52 #define HE_PET_8_USEC 1 53 #define HE_PET_16_USEC 2 54 55 #define WMI_MAX_CHAINS 8 56 57 #define WMI_MAX_NUM_SS MAX_HE_NSS 58 #define WMI_MAX_NUM_RU MAX_HE_RU 59 60 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 61 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 62 #define WMI_TLV_CMD_UNSUPPORTED 0 63 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 64 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 65 66 struct wmi_cmd_hdr { 67 __le32 cmd_id; 68 } __packed; 69 70 struct wmi_tlv { 71 __le32 header; 72 u8 value[]; 73 } __packed; 74 75 #define WMI_TLV_LEN GENMASK(15, 0) 76 #define WMI_TLV_TAG GENMASK(31, 16) 77 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 78 79 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 80 #define WMI_MAX_MEM_REQS 32 81 #define ATH12K_MAX_HW_LISTEN_INTERVAL 5 82 83 #define WMI_HOST_RC_DS_FLAG 0x01 84 #define WMI_HOST_RC_CW40_FLAG 0x02 85 #define WMI_HOST_RC_SGI_FLAG 0x04 86 #define WMI_HOST_RC_HT_FLAG 0x08 87 #define WMI_HOST_RC_RTSCTS_FLAG 0x10 88 #define WMI_HOST_RC_TX_STBC_FLAG 0x20 89 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 90 #define WMI_HOST_RC_RX_STBC_FLAG_S 6 91 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 92 #define WMI_HOST_RC_TS_FLAG 0x200 93 #define WMI_HOST_RC_UAPSD_FLAG 0x400 94 95 #define WMI_HT_CAP_ENABLED 0x0001 96 #define WMI_HT_CAP_HT20_SGI 0x0002 97 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 98 #define WMI_HT_CAP_TX_STBC 0x0008 99 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 100 #define WMI_HT_CAP_RX_STBC 0x0030 101 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 102 #define WMI_HT_CAP_LDPC 0x0040 103 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 104 #define WMI_HT_CAP_MPDU_DENSITY 0x0700 105 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 106 #define WMI_HT_CAP_HT40_SGI 0x0800 107 #define WMI_HT_CAP_RX_LDPC 0x1000 108 #define WMI_HT_CAP_TX_LDPC 0x2000 109 #define WMI_HT_CAP_IBF_BFER 0x4000 110 111 /* These macros should be used when we wish to advertise STBC support for 112 * only 1SS or 2SS or 3SS. 113 */ 114 #define WMI_HT_CAP_RX_STBC_1SS 0x0010 115 #define WMI_HT_CAP_RX_STBC_2SS 0x0020 116 #define WMI_HT_CAP_RX_STBC_3SS 0x0030 117 118 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 119 WMI_HT_CAP_HT20_SGI | \ 120 WMI_HT_CAP_HT40_SGI | \ 121 WMI_HT_CAP_TX_STBC | \ 122 WMI_HT_CAP_RX_STBC | \ 123 WMI_HT_CAP_LDPC) 124 125 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 126 #define WMI_VHT_CAP_RX_LDPC 0x00000010 127 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 128 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 129 #define WMI_VHT_CAP_TX_STBC 0x00000080 130 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 131 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 132 #define WMI_VHT_CAP_SU_BFER 0x00000800 133 #define WMI_VHT_CAP_SU_BFEE 0x00001000 134 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 135 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 136 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 137 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 138 #define WMI_VHT_CAP_MU_BFER 0x00080000 139 #define WMI_VHT_CAP_MU_BFEE 0x00100000 140 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 141 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 142 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 143 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 144 145 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 146 147 /* These macros should be used when we wish to advertise STBC support for 148 * only 1SS or 2SS or 3SS. 149 */ 150 #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 151 #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 152 #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 153 154 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 155 WMI_VHT_CAP_SGI_80MHZ | \ 156 WMI_VHT_CAP_TX_STBC | \ 157 WMI_VHT_CAP_RX_STBC_MASK | \ 158 WMI_VHT_CAP_RX_LDPC | \ 159 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 160 WMI_VHT_CAP_RX_FIXED_ANT | \ 161 WMI_VHT_CAP_TX_FIXED_ANT) 162 163 #define WLAN_SCAN_MAX_HINT_S_SSID 10 164 #define WLAN_SCAN_MAX_HINT_BSSID 10 165 #define MAX_RNR_BSS 5 166 167 #define WLAN_SCAN_MAX_HINT_S_SSID 10 168 #define WLAN_SCAN_MAX_HINT_BSSID 10 169 #define MAX_RNR_BSS 5 170 171 #define WLAN_SCAN_PARAMS_MAX_SSID 16 172 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 173 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 174 175 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 176 177 #define WMI_BA_MODE_BUFFER_SIZE_256 3 178 179 /* HW mode config type replicated from FW header 180 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 181 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 182 * one in 2G and another in 5G. 183 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 184 * same band; no tx allowed. 185 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 186 * Support for both PHYs within one band is planned 187 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 188 * but could be extended to other bands in the future. 189 * The separation of the band between the two PHYs needs 190 * to be communicated separately. 191 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 192 * as in WMI_HW_MODE_SBS, and 3rd on the other band 193 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 194 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 195 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 196 */ 197 enum wmi_host_hw_mode_config_type { 198 WMI_HOST_HW_MODE_SINGLE = 0, 199 WMI_HOST_HW_MODE_DBS = 1, 200 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 201 WMI_HOST_HW_MODE_SBS = 3, 202 WMI_HOST_HW_MODE_DBS_SBS = 4, 203 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 204 205 /* keep last */ 206 WMI_HOST_HW_MODE_MAX 207 }; 208 209 /* HW mode priority values used to detect the preferred HW mode 210 * on the available modes. 211 */ 212 enum wmi_host_hw_mode_priority { 213 WMI_HOST_HW_MODE_DBS_SBS_PRI, 214 WMI_HOST_HW_MODE_DBS_PRI, 215 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 216 WMI_HOST_HW_MODE_SBS_PRI, 217 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 218 WMI_HOST_HW_MODE_SINGLE_PRI, 219 220 /* keep last the lowest priority */ 221 WMI_HOST_HW_MODE_MAX_PRI 222 }; 223 224 enum WMI_HOST_WLAN_BAND { 225 WMI_HOST_WLAN_2G_CAP = 1, 226 WMI_HOST_WLAN_5G_CAP = 2, 227 WMI_HOST_WLAN_2G_5G_CAP = 3, 228 }; 229 230 enum wmi_cmd_group { 231 /* 0 to 2 are reserved */ 232 WMI_GRP_START = 0x3, 233 WMI_GRP_SCAN = WMI_GRP_START, 234 WMI_GRP_PDEV = 0x4, 235 WMI_GRP_VDEV = 0x5, 236 WMI_GRP_PEER = 0x6, 237 WMI_GRP_MGMT = 0x7, 238 WMI_GRP_BA_NEG = 0x8, 239 WMI_GRP_STA_PS = 0x9, 240 WMI_GRP_DFS = 0xa, 241 WMI_GRP_ROAM = 0xb, 242 WMI_GRP_OFL_SCAN = 0xc, 243 WMI_GRP_P2P = 0xd, 244 WMI_GRP_AP_PS = 0xe, 245 WMI_GRP_RATE_CTRL = 0xf, 246 WMI_GRP_PROFILE = 0x10, 247 WMI_GRP_SUSPEND = 0x11, 248 WMI_GRP_BCN_FILTER = 0x12, 249 WMI_GRP_WOW = 0x13, 250 WMI_GRP_RTT = 0x14, 251 WMI_GRP_SPECTRAL = 0x15, 252 WMI_GRP_STATS = 0x16, 253 WMI_GRP_ARP_NS_OFL = 0x17, 254 WMI_GRP_NLO_OFL = 0x18, 255 WMI_GRP_GTK_OFL = 0x19, 256 WMI_GRP_CSA_OFL = 0x1a, 257 WMI_GRP_CHATTER = 0x1b, 258 WMI_GRP_TID_ADDBA = 0x1c, 259 WMI_GRP_MISC = 0x1d, 260 WMI_GRP_GPIO = 0x1e, 261 WMI_GRP_FWTEST = 0x1f, 262 WMI_GRP_TDLS = 0x20, 263 WMI_GRP_RESMGR = 0x21, 264 WMI_GRP_STA_SMPS = 0x22, 265 WMI_GRP_WLAN_HB = 0x23, 266 WMI_GRP_RMC = 0x24, 267 WMI_GRP_MHF_OFL = 0x25, 268 WMI_GRP_LOCATION_SCAN = 0x26, 269 WMI_GRP_OEM = 0x27, 270 WMI_GRP_NAN = 0x28, 271 WMI_GRP_COEX = 0x29, 272 WMI_GRP_OBSS_OFL = 0x2a, 273 WMI_GRP_LPI = 0x2b, 274 WMI_GRP_EXTSCAN = 0x2c, 275 WMI_GRP_DHCP_OFL = 0x2d, 276 WMI_GRP_IPA = 0x2e, 277 WMI_GRP_MDNS_OFL = 0x2f, 278 WMI_GRP_SAP_OFL = 0x30, 279 WMI_GRP_OCB = 0x31, 280 WMI_GRP_SOC = 0x32, 281 WMI_GRP_PKT_FILTER = 0x33, 282 WMI_GRP_MAWC = 0x34, 283 WMI_GRP_PMF_OFFLOAD = 0x35, 284 WMI_GRP_BPF_OFFLOAD = 0x36, 285 WMI_GRP_NAN_DATA = 0x37, 286 WMI_GRP_PROTOTYPE = 0x38, 287 WMI_GRP_MONITOR = 0x39, 288 WMI_GRP_REGULATORY = 0x3a, 289 WMI_GRP_HW_DATA_FILTER = 0x3b, 290 WMI_GRP_WLM = 0x3c, 291 WMI_GRP_11K_OFFLOAD = 0x3d, 292 WMI_GRP_TWT = 0x3e, 293 WMI_GRP_MOTION_DET = 0x3f, 294 WMI_GRP_SPATIAL_REUSE = 0x40, 295 }; 296 297 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 298 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 299 300 enum wmi_tlv_cmd_id { 301 WMI_CMD_UNSUPPORTED = 0, 302 WMI_INIT_CMDID = 0x1, 303 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 304 WMI_STOP_SCAN_CMDID, 305 WMI_SCAN_CHAN_LIST_CMDID, 306 WMI_SCAN_SCH_PRIO_TBL_CMDID, 307 WMI_SCAN_UPDATE_REQUEST_CMDID, 308 WMI_SCAN_PROB_REQ_OUI_CMDID, 309 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 310 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 311 WMI_PDEV_SET_CHANNEL_CMDID, 312 WMI_PDEV_SET_PARAM_CMDID, 313 WMI_PDEV_PKTLOG_ENABLE_CMDID, 314 WMI_PDEV_PKTLOG_DISABLE_CMDID, 315 WMI_PDEV_SET_WMM_PARAMS_CMDID, 316 WMI_PDEV_SET_HT_CAP_IE_CMDID, 317 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 318 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 319 WMI_PDEV_SET_QUIET_MODE_CMDID, 320 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 321 WMI_PDEV_GET_TPC_CONFIG_CMDID, 322 WMI_PDEV_SET_BASE_MACADDR_CMDID, 323 WMI_PDEV_DUMP_CMDID, 324 WMI_PDEV_SET_LED_CONFIG_CMDID, 325 WMI_PDEV_GET_TEMPERATURE_CMDID, 326 WMI_PDEV_SET_LED_FLASHING_CMDID, 327 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 328 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 329 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 330 WMI_PDEV_SET_CTL_TABLE_CMDID, 331 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 332 WMI_PDEV_FIPS_CMDID, 333 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 334 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 335 WMI_PDEV_GET_NFCAL_POWER_CMDID, 336 WMI_PDEV_GET_TPC_CMDID, 337 WMI_MIB_STATS_ENABLE_CMDID, 338 WMI_PDEV_SET_PCL_CMDID, 339 WMI_PDEV_SET_HW_MODE_CMDID, 340 WMI_PDEV_SET_MAC_CONFIG_CMDID, 341 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 342 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 343 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 344 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 345 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 346 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 347 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 348 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 349 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 350 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 351 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 352 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 353 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 354 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 355 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 356 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 357 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 358 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 359 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 360 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 361 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 362 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 363 WMI_PDEV_PKTLOG_FILTER_CMDID, 364 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 365 WMI_VDEV_DELETE_CMDID, 366 WMI_VDEV_START_REQUEST_CMDID, 367 WMI_VDEV_RESTART_REQUEST_CMDID, 368 WMI_VDEV_UP_CMDID, 369 WMI_VDEV_STOP_CMDID, 370 WMI_VDEV_DOWN_CMDID, 371 WMI_VDEV_SET_PARAM_CMDID, 372 WMI_VDEV_INSTALL_KEY_CMDID, 373 WMI_VDEV_WNM_SLEEPMODE_CMDID, 374 WMI_VDEV_WMM_ADDTS_CMDID, 375 WMI_VDEV_WMM_DELTS_CMDID, 376 WMI_VDEV_SET_WMM_PARAMS_CMDID, 377 WMI_VDEV_SET_GTX_PARAMS_CMDID, 378 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 379 WMI_VDEV_PLMREQ_START_CMDID, 380 WMI_VDEV_PLMREQ_STOP_CMDID, 381 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 382 WMI_VDEV_SET_IE_CMDID, 383 WMI_VDEV_RATEMASK_CMDID, 384 WMI_VDEV_ATF_REQUEST_CMDID, 385 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 386 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 387 WMI_VDEV_SET_QUIET_MODE_CMDID, 388 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 389 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 390 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 391 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 392 WMI_PEER_DELETE_CMDID, 393 WMI_PEER_FLUSH_TIDS_CMDID, 394 WMI_PEER_SET_PARAM_CMDID, 395 WMI_PEER_ASSOC_CMDID, 396 WMI_PEER_ADD_WDS_ENTRY_CMDID, 397 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 398 WMI_PEER_MCAST_GROUP_CMDID, 399 WMI_PEER_INFO_REQ_CMDID, 400 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 401 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 402 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 403 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 404 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 405 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 406 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 407 WMI_PEER_ATF_REQUEST_CMDID, 408 WMI_PEER_BWF_REQUEST_CMDID, 409 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 410 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 411 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 412 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 413 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 414 WMI_PDEV_SEND_BCN_CMDID, 415 WMI_BCN_TMPL_CMDID, 416 WMI_BCN_FILTER_RX_CMDID, 417 WMI_PRB_REQ_FILTER_RX_CMDID, 418 WMI_MGMT_TX_CMDID, 419 WMI_PRB_TMPL_CMDID, 420 WMI_MGMT_TX_SEND_CMDID, 421 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 422 WMI_PDEV_SEND_FD_CMDID, 423 WMI_BCN_OFFLOAD_CTRL_CMDID, 424 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 425 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 426 WMI_FILS_DISCOVERY_TMPL_CMDID, 427 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 428 WMI_ADDBA_SEND_CMDID, 429 WMI_ADDBA_STATUS_CMDID, 430 WMI_DELBA_SEND_CMDID, 431 WMI_ADDBA_SET_RESP_CMDID, 432 WMI_SEND_SINGLEAMSDU_CMDID, 433 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 434 WMI_STA_POWERSAVE_PARAM_CMDID, 435 WMI_STA_MIMO_PS_MODE_CMDID, 436 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 437 WMI_PDEV_DFS_DISABLE_CMDID, 438 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 439 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 440 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 441 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 442 WMI_VDEV_ADFS_CH_CFG_CMDID, 443 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 444 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 445 WMI_ROAM_SCAN_RSSI_THRESHOLD, 446 WMI_ROAM_SCAN_PERIOD, 447 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 448 WMI_ROAM_AP_PROFILE, 449 WMI_ROAM_CHAN_LIST, 450 WMI_ROAM_SCAN_CMD, 451 WMI_ROAM_SYNCH_COMPLETE, 452 WMI_ROAM_SET_RIC_REQUEST_CMDID, 453 WMI_ROAM_INVOKE_CMDID, 454 WMI_ROAM_FILTER_CMDID, 455 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 456 WMI_ROAM_CONFIGURE_MAWC_CMDID, 457 WMI_ROAM_SET_MBO_PARAM_CMDID, 458 WMI_ROAM_PER_CONFIG_CMDID, 459 WMI_ROAM_BTM_CONFIG_CMDID, 460 WMI_ENABLE_FILS_CMDID, 461 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 462 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 463 WMI_OFL_SCAN_PERIOD, 464 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 465 WMI_P2P_DEV_SET_DISCOVERABILITY, 466 WMI_P2P_GO_SET_BEACON_IE, 467 WMI_P2P_GO_SET_PROBE_RESP_IE, 468 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 469 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 470 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 471 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 472 WMI_P2P_SET_OPPPS_PARAM_CMDID, 473 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 474 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 475 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 476 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 477 WMI_AP_PS_EGAP_PARAM_CMDID, 478 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 479 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 480 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 481 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 482 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 483 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 484 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 485 WMI_PDEV_RESUME_CMDID, 486 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 487 WMI_RMV_BCN_FILTER_CMDID, 488 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 489 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 490 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 491 WMI_WOW_ENABLE_CMDID, 492 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 493 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 494 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 495 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 496 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 497 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 498 WMI_EXTWOW_ENABLE_CMDID, 499 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 500 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 501 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 502 WMI_WOW_UDP_SVC_OFLD_CMDID, 503 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 504 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 505 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 506 WMI_RTT_TSF_CMDID, 507 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 508 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 509 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 510 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 511 WMI_REQUEST_STATS_EXT_CMDID, 512 WMI_REQUEST_LINK_STATS_CMDID, 513 WMI_START_LINK_STATS_CMDID, 514 WMI_CLEAR_LINK_STATS_CMDID, 515 WMI_GET_FW_MEM_DUMP_CMDID, 516 WMI_DEBUG_MESG_FLUSH_CMDID, 517 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 518 WMI_REQUEST_WLAN_STATS_CMDID, 519 WMI_REQUEST_RCPI_CMDID, 520 WMI_REQUEST_PEER_STATS_INFO_CMDID, 521 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 522 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 523 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 524 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 525 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 526 WMI_APFIND_CMDID, 527 WMI_PASSPOINT_LIST_CONFIG_CMDID, 528 WMI_NLO_CONFIGURE_MAWC_CMDID, 529 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 530 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 531 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 532 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 533 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 534 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 535 WMI_CHATTER_COALESCING_QUERY_CMDID, 536 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 537 WMI_PEER_TID_DELBA_CMDID, 538 WMI_STA_DTIM_PS_METHOD_CMDID, 539 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 540 WMI_STA_KEEPALIVE_CMDID, 541 WMI_BA_REQ_SSN_CMDID, 542 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 543 WMI_PDEV_UTF_CMDID, 544 WMI_DBGLOG_CFG_CMDID, 545 WMI_PDEV_QVIT_CMDID, 546 WMI_PDEV_FTM_INTG_CMDID, 547 WMI_VDEV_SET_KEEPALIVE_CMDID, 548 WMI_VDEV_GET_KEEPALIVE_CMDID, 549 WMI_FORCE_FW_HANG_CMDID, 550 WMI_SET_MCASTBCAST_FILTER_CMDID, 551 WMI_THERMAL_MGMT_CMDID, 552 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 553 WMI_TPC_CHAINMASK_CONFIG_CMDID, 554 WMI_SET_ANTENNA_DIVERSITY_CMDID, 555 WMI_OCB_SET_SCHED_CMDID, 556 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 557 WMI_LRO_CONFIG_CMDID, 558 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 559 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 560 WMI_VDEV_WISA_CMDID, 561 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 562 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 563 WMI_READ_DATA_FROM_FLASH_CMDID, 564 WMI_THERM_THROT_SET_CONF_CMDID, 565 WMI_RUNTIME_DPD_RECAL_CMDID, 566 WMI_GET_TPC_POWER_CMDID, 567 WMI_IDLE_TRIGGER_MONITOR_CMDID, 568 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 569 WMI_GPIO_OUTPUT_CMDID, 570 WMI_TXBF_CMDID, 571 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 572 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 573 WMI_UNIT_TEST_CMDID, 574 WMI_FWTEST_CMDID, 575 WMI_QBOOST_CFG_CMDID, 576 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 577 WMI_TDLS_PEER_UPDATE_CMDID, 578 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 579 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 580 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 581 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 582 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 583 WMI_STA_SMPS_PARAM_CMDID, 584 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 585 WMI_HB_SET_TCP_PARAMS_CMDID, 586 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 587 WMI_HB_SET_UDP_PARAMS_CMDID, 588 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 589 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 590 WMI_RMC_SET_ACTION_PERIOD_CMDID, 591 WMI_RMC_CONFIG_CMDID, 592 WMI_RMC_SET_MANUAL_LEADER_CMDID, 593 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 594 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 595 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 596 WMI_BATCH_SCAN_DISABLE_CMDID, 597 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 598 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 599 WMI_OEM_REQUEST_CMDID, 600 WMI_LPI_OEM_REQ_CMDID, 601 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 602 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 603 WMI_CHAN_AVOID_UPDATE_CMDID, 604 WMI_COEX_CONFIG_CMDID, 605 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 606 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 607 WMI_SAR_LIMITS_CMDID, 608 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 609 WMI_OBSS_SCAN_DISABLE_CMDID, 610 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 611 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 612 WMI_LPI_START_SCAN_CMDID, 613 WMI_LPI_STOP_SCAN_CMDID, 614 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 615 WMI_EXTSCAN_STOP_CMDID, 616 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 617 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 618 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 619 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 620 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 621 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 622 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 623 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 624 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 625 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 626 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 627 WMI_MDNS_SET_FQDN_CMDID, 628 WMI_MDNS_SET_RESPONSE_CMDID, 629 WMI_MDNS_GET_STATS_CMDID, 630 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 631 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 632 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 633 WMI_OCB_SET_UTC_TIME_CMDID, 634 WMI_OCB_START_TIMING_ADVERT_CMDID, 635 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 636 WMI_OCB_GET_TSF_TIMER_CMDID, 637 WMI_DCC_GET_STATS_CMDID, 638 WMI_DCC_CLEAR_STATS_CMDID, 639 WMI_DCC_UPDATE_NDL_CMDID, 640 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 641 WMI_SOC_SET_HW_MODE_CMDID, 642 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 643 WMI_SOC_SET_ANTENNA_MODE_CMDID, 644 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 645 WMI_PACKET_FILTER_ENABLE_CMDID, 646 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 647 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 648 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 649 WMI_BPF_GET_VDEV_STATS_CMDID, 650 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 651 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 652 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 653 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 654 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 655 WMI_11D_SCAN_START_CMDID, 656 WMI_11D_SCAN_STOP_CMDID, 657 WMI_SET_INIT_COUNTRY_CMDID, 658 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 659 WMI_NDP_INITIATOR_REQ_CMDID, 660 WMI_NDP_RESPONDER_REQ_CMDID, 661 WMI_NDP_END_REQ_CMDID, 662 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 663 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 664 WMI_TWT_DISABLE_CMDID, 665 WMI_TWT_ADD_DIALOG_CMDID, 666 WMI_TWT_DEL_DIALOG_CMDID, 667 WMI_TWT_PAUSE_DIALOG_CMDID, 668 WMI_TWT_RESUME_DIALOG_CMDID, 669 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 670 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 671 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 672 }; 673 674 enum wmi_tlv_event_id { 675 WMI_SERVICE_READY_EVENTID = 0x1, 676 WMI_READY_EVENTID, 677 WMI_SERVICE_AVAILABLE_EVENTID, 678 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 679 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 680 WMI_CHAN_INFO_EVENTID, 681 WMI_PHYERR_EVENTID, 682 WMI_PDEV_DUMP_EVENTID, 683 WMI_TX_PAUSE_EVENTID, 684 WMI_DFS_RADAR_EVENTID, 685 WMI_PDEV_L1SS_TRACK_EVENTID, 686 WMI_PDEV_TEMPERATURE_EVENTID, 687 WMI_SERVICE_READY_EXT_EVENTID, 688 WMI_PDEV_FIPS_EVENTID, 689 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 690 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 691 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 692 WMI_PDEV_TPC_EVENTID, 693 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 694 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 695 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 696 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 697 WMI_PDEV_ANTDIV_STATUS_EVENTID, 698 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 699 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 700 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 701 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 702 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 703 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 704 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 705 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 706 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 707 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 708 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 709 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 710 WMI_PDEV_RAP_INFO_EVENTID, 711 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 712 WMI_SERVICE_READY_EXT2_EVENTID, 713 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 714 WMI_VDEV_STOPPED_EVENTID, 715 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 716 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 717 WMI_VDEV_TSF_REPORT_EVENTID, 718 WMI_VDEV_DELETE_RESP_EVENTID, 719 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 720 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 721 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 722 WMI_PEER_INFO_EVENTID, 723 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 724 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 725 WMI_PEER_STATE_EVENTID, 726 WMI_PEER_ASSOC_CONF_EVENTID, 727 WMI_PEER_DELETE_RESP_EVENTID, 728 WMI_PEER_RATECODE_LIST_EVENTID, 729 WMI_WDS_PEER_EVENTID, 730 WMI_PEER_STA_PS_STATECHG_EVENTID, 731 WMI_PEER_ANTDIV_INFO_EVENTID, 732 WMI_PEER_RESERVED0_EVENTID, 733 WMI_PEER_RESERVED1_EVENTID, 734 WMI_PEER_RESERVED2_EVENTID, 735 WMI_PEER_RESERVED3_EVENTID, 736 WMI_PEER_RESERVED4_EVENTID, 737 WMI_PEER_RESERVED5_EVENTID, 738 WMI_PEER_RESERVED6_EVENTID, 739 WMI_PEER_RESERVED7_EVENTID, 740 WMI_PEER_RESERVED8_EVENTID, 741 WMI_PEER_RESERVED9_EVENTID, 742 WMI_PEER_RESERVED10_EVENTID, 743 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 744 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 745 WMI_HOST_SWBA_EVENTID, 746 WMI_TBTTOFFSET_UPDATE_EVENTID, 747 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 748 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 749 WMI_MGMT_TX_COMPLETION_EVENTID, 750 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 751 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 752 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 753 WMI_HOST_FILS_DISCOVERY_EVENTID, 754 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 755 WMI_TX_ADDBA_COMPLETE_EVENTID, 756 WMI_BA_RSP_SSN_EVENTID, 757 WMI_AGGR_STATE_TRIG_EVENTID, 758 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 759 WMI_PROFILE_MATCH, 760 WMI_ROAM_SYNCH_EVENTID, 761 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 762 WMI_P2P_NOA_EVENTID, 763 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 764 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 765 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 766 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 767 WMI_D0_WOW_DISABLE_ACK_EVENTID, 768 WMI_WOW_INITIAL_WAKEUP_EVENTID, 769 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 770 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 771 WMI_RTT_ERROR_REPORT_EVENTID, 772 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 773 WMI_IFACE_LINK_STATS_EVENTID, 774 WMI_PEER_LINK_STATS_EVENTID, 775 WMI_RADIO_LINK_STATS_EVENTID, 776 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 777 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 778 WMI_INST_RSSI_STATS_EVENTID, 779 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 780 WMI_REPORT_STATS_EVENTID, 781 WMI_UPDATE_RCPI_EVENTID, 782 WMI_PEER_STATS_INFO_EVENTID, 783 WMI_RADIO_CHAN_STATS_EVENTID, 784 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 785 WMI_NLO_SCAN_COMPLETE_EVENTID, 786 WMI_APFIND_EVENTID, 787 WMI_PASSPOINT_MATCH_EVENTID, 788 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 789 WMI_GTK_REKEY_FAIL_EVENTID, 790 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 791 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 792 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 793 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 794 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 795 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 796 WMI_PDEV_UTF_EVENTID, 797 WMI_DEBUG_MESG_EVENTID, 798 WMI_UPDATE_STATS_EVENTID, 799 WMI_DEBUG_PRINT_EVENTID, 800 WMI_DCS_INTERFERENCE_EVENTID, 801 WMI_PDEV_QVIT_EVENTID, 802 WMI_WLAN_PROFILE_DATA_EVENTID, 803 WMI_PDEV_FTM_INTG_EVENTID, 804 WMI_WLAN_FREQ_AVOID_EVENTID, 805 WMI_VDEV_GET_KEEPALIVE_EVENTID, 806 WMI_THERMAL_MGMT_EVENTID, 807 WMI_DIAG_DATA_CONTAINER_EVENTID, 808 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 809 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 810 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 811 WMI_DIAG_EVENTID, 812 WMI_OCB_SET_SCHED_EVENTID, 813 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 814 WMI_RSSI_BREACH_EVENTID, 815 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 816 WMI_PDEV_UTF_SCPC_EVENTID, 817 WMI_READ_DATA_FROM_FLASH_EVENTID, 818 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 819 WMI_PKGID_EVENTID, 820 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 821 WMI_UPLOADH_EVENTID, 822 WMI_CAPTUREH_EVENTID, 823 WMI_RFKILL_STATE_CHANGE_EVENTID, 824 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 825 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 826 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 827 WMI_BATCH_SCAN_RESULT_EVENTID, 828 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 829 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 830 WMI_OEM_ERROR_REPORT_EVENTID, 831 WMI_OEM_RESPONSE_EVENTID, 832 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 833 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 834 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 835 WMI_NAN_STARTED_CLUSTER_EVENTID, 836 WMI_NAN_JOINED_CLUSTER_EVENTID, 837 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 838 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 839 WMI_LPI_STATUS_EVENTID, 840 WMI_LPI_HANDOFF_EVENTID, 841 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 842 WMI_EXTSCAN_OPERATION_EVENTID, 843 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 844 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 845 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 846 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 847 WMI_EXTSCAN_CAPABILITIES_EVENTID, 848 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 849 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 850 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 851 WMI_SAP_OFL_DEL_STA_EVENTID, 852 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 853 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 854 WMI_DCC_GET_STATS_RESP_EVENTID, 855 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 856 WMI_DCC_STATS_EVENTID, 857 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 858 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 859 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 860 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 861 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 862 WMI_BPF_VDEV_STATS_INFO_EVENTID, 863 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 864 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 865 WMI_11D_NEW_COUNTRY_EVENTID, 866 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 867 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 868 WMI_NDP_INITIATOR_RSP_EVENTID, 869 WMI_NDP_RESPONDER_RSP_EVENTID, 870 WMI_NDP_END_RSP_EVENTID, 871 WMI_NDP_INDICATION_EVENTID, 872 WMI_NDP_CONFIRM_EVENTID, 873 WMI_NDP_END_INDICATION_EVENTID, 874 875 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 876 WMI_TWT_DISABLE_EVENTID, 877 WMI_TWT_ADD_DIALOG_EVENTID, 878 WMI_TWT_DEL_DIALOG_EVENTID, 879 WMI_TWT_PAUSE_DIALOG_EVENTID, 880 WMI_TWT_RESUME_DIALOG_EVENTID, 881 }; 882 883 enum wmi_tlv_pdev_param { 884 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 885 WMI_PDEV_PARAM_RX_CHAIN_MASK, 886 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 887 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 888 WMI_PDEV_PARAM_TXPOWER_SCALE, 889 WMI_PDEV_PARAM_BEACON_GEN_MODE, 890 WMI_PDEV_PARAM_BEACON_TX_MODE, 891 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 892 WMI_PDEV_PARAM_PROTECTION_MODE, 893 WMI_PDEV_PARAM_DYNAMIC_BW, 894 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 895 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 896 WMI_PDEV_PARAM_STA_KICKOUT_TH, 897 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 898 WMI_PDEV_PARAM_LTR_ENABLE, 899 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 900 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 901 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 902 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 903 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 904 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 905 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 906 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 907 WMI_PDEV_PARAM_L1SS_ENABLE, 908 WMI_PDEV_PARAM_DSLEEP_ENABLE, 909 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 910 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 911 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 912 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 913 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 914 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 915 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 916 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 917 WMI_PDEV_PARAM_PMF_QOS, 918 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 919 WMI_PDEV_PARAM_DCS, 920 WMI_PDEV_PARAM_ANI_ENABLE, 921 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 922 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 923 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 924 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 925 WMI_PDEV_PARAM_DYNTXCHAIN, 926 WMI_PDEV_PARAM_PROXY_STA, 927 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 928 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 929 WMI_PDEV_PARAM_RFKILL_ENABLE, 930 WMI_PDEV_PARAM_BURST_DUR, 931 WMI_PDEV_PARAM_BURST_ENABLE, 932 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 933 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 934 WMI_PDEV_PARAM_L1SS_TRACK, 935 WMI_PDEV_PARAM_HYST_EN, 936 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 937 WMI_PDEV_PARAM_LED_SYS_STATE, 938 WMI_PDEV_PARAM_LED_ENABLE, 939 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 940 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 941 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 942 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 943 WMI_PDEV_PARAM_CTS_CBW, 944 WMI_PDEV_PARAM_WNTS_CONFIG, 945 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 946 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 947 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 948 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 949 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 950 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 951 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 952 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 953 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 954 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 955 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 956 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 957 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 958 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 959 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 960 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 961 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 962 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 963 WMI_PDEV_PARAM_AGGR_BURST, 964 WMI_PDEV_PARAM_RX_DECAP_MODE, 965 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 966 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 967 WMI_PDEV_PARAM_ANTENNA_GAIN, 968 WMI_PDEV_PARAM_RX_FILTER, 969 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 970 WMI_PDEV_PARAM_PROXY_STA_MODE, 971 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 972 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 973 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 974 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 975 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 976 WMI_PDEV_PARAM_BLOCK_INTERBSS, 977 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 978 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 979 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 980 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 981 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 982 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 983 WMI_PDEV_PARAM_EN_STATS, 984 WMI_PDEV_PARAM_MU_GROUP_POLICY, 985 WMI_PDEV_PARAM_NOISE_DETECTION, 986 WMI_PDEV_PARAM_NOISE_THRESHOLD, 987 WMI_PDEV_PARAM_DPD_ENABLE, 988 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 989 WMI_PDEV_PARAM_ATF_STRICT_SCH, 990 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 991 WMI_PDEV_PARAM_ANT_PLZN, 992 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 993 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 994 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 995 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 996 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 997 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 998 WMI_PDEV_PARAM_CCA_THRESHOLD, 999 WMI_PDEV_PARAM_RTS_FIXED_RATE, 1000 WMI_PDEV_PARAM_PDEV_RESET, 1001 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 1002 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 1003 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 1004 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 1005 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 1006 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 1007 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 1008 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 1009 WMI_PDEV_PARAM_PROPAGATION_DELAY, 1010 WMI_PDEV_PARAM_ENA_ANT_DIV, 1011 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 1012 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 1013 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 1014 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 1015 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 1016 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 1017 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 1018 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 1019 WMI_PDEV_PARAM_TX_SCH_DELAY, 1020 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 1021 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 1022 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 1023 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 1024 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 1025 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 1026 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 1027 }; 1028 1029 enum wmi_tlv_vdev_param { 1030 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 1031 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 1032 WMI_VDEV_PARAM_BEACON_INTERVAL, 1033 WMI_VDEV_PARAM_LISTEN_INTERVAL, 1034 WMI_VDEV_PARAM_MULTICAST_RATE, 1035 WMI_VDEV_PARAM_MGMT_TX_RATE, 1036 WMI_VDEV_PARAM_SLOT_TIME, 1037 WMI_VDEV_PARAM_PREAMBLE, 1038 WMI_VDEV_PARAM_SWBA_TIME, 1039 WMI_VDEV_STATS_UPDATE_PERIOD, 1040 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1041 WMI_VDEV_HOST_SWBA_INTERVAL, 1042 WMI_VDEV_PARAM_DTIM_PERIOD, 1043 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1044 WMI_VDEV_PARAM_WDS, 1045 WMI_VDEV_PARAM_ATIM_WINDOW, 1046 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1047 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1048 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1049 WMI_VDEV_PARAM_FEATURE_WMM, 1050 WMI_VDEV_PARAM_CHWIDTH, 1051 WMI_VDEV_PARAM_CHEXTOFFSET, 1052 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1053 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1054 WMI_VDEV_PARAM_MGMT_RATE, 1055 WMI_VDEV_PARAM_PROTECTION_MODE, 1056 WMI_VDEV_PARAM_FIXED_RATE, 1057 WMI_VDEV_PARAM_SGI, 1058 WMI_VDEV_PARAM_LDPC, 1059 WMI_VDEV_PARAM_TX_STBC, 1060 WMI_VDEV_PARAM_RX_STBC, 1061 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1062 WMI_VDEV_PARAM_DEF_KEYID, 1063 WMI_VDEV_PARAM_NSS, 1064 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1065 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1066 WMI_VDEV_PARAM_MCAST_INDICATE, 1067 WMI_VDEV_PARAM_DHCP_INDICATE, 1068 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1069 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1070 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1071 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1072 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1073 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1074 WMI_VDEV_PARAM_TXBF, 1075 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1076 WMI_VDEV_PARAM_DROP_UNENCRY, 1077 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1078 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1079 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1080 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1081 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1082 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1083 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1084 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1085 WMI_VDEV_PARAM_TX_PWRLIMIT, 1086 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1087 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1088 WMI_VDEV_PARAM_ENABLE_RMC, 1089 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1090 WMI_VDEV_PARAM_MAX_RATE, 1091 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1092 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1093 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1094 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1095 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1096 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1097 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1098 WMI_VDEV_PARAM_INACTIVITY_CNT, 1099 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1100 WMI_VDEV_PARAM_DTIM_POLICY, 1101 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1102 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1103 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1104 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1105 WMI_VDEV_PARAM_DISCONNECT_TH, 1106 WMI_VDEV_PARAM_RTSCTS_RATE, 1107 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1108 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1109 WMI_VDEV_PARAM_TXPOWER_SCALE, 1110 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1111 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1112 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1113 WMI_VDEV_PARAM_CABQ_MAXDUR, 1114 WMI_VDEV_PARAM_MFPTEST_SET, 1115 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1116 WMI_VDEV_PARAM_VHT_SGIMASK, 1117 WMI_VDEV_PARAM_VHT80_RATEMASK, 1118 WMI_VDEV_PARAM_PROXY_STA, 1119 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1120 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1121 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1122 WMI_VDEV_PARAM_SENSOR_AP, 1123 WMI_VDEV_PARAM_BEACON_RATE, 1124 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1125 WMI_VDEV_PARAM_STA_KICKOUT, 1126 WMI_VDEV_PARAM_CAPABILITIES, 1127 WMI_VDEV_PARAM_TSF_INCREMENT, 1128 WMI_VDEV_PARAM_AMPDU_PER_AC, 1129 WMI_VDEV_PARAM_RX_FILTER, 1130 WMI_VDEV_PARAM_MGMT_TX_POWER, 1131 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1132 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1133 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1134 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1135 WMI_VDEV_PARAM_HE_DCM, 1136 WMI_VDEV_PARAM_HE_RANGE_EXT, 1137 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1138 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1139 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1140 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1141 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1142 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1143 WMI_VDEV_PARAM_BSS_COLOR, 1144 WMI_VDEV_PARAM_SET_HEMU_MODE, 1145 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1146 }; 1147 1148 enum wmi_tlv_peer_flags { 1149 WMI_PEER_AUTH = 0x00000001, 1150 WMI_PEER_QOS = 0x00000002, 1151 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1152 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1153 WMI_PEER_HE = 0x00000400, 1154 WMI_PEER_APSD = 0x00000800, 1155 WMI_PEER_HT = 0x00001000, 1156 WMI_PEER_40MHZ = 0x00002000, 1157 WMI_PEER_STBC = 0x00008000, 1158 WMI_PEER_LDPC = 0x00010000, 1159 WMI_PEER_DYN_MIMOPS = 0x00020000, 1160 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1161 WMI_PEER_SPATIAL_MUX = 0x00200000, 1162 WMI_PEER_TWT_REQ = 0x00400000, 1163 WMI_PEER_TWT_RESP = 0x00800000, 1164 WMI_PEER_VHT = 0x02000000, 1165 WMI_PEER_80MHZ = 0x04000000, 1166 WMI_PEER_PMF = 0x08000000, 1167 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1168 WMI_PEER_160MHZ = 0x40000000, 1169 WMI_PEER_SAFEMODE_EN = 0x80000000, 1170 }; 1171 1172 enum wmi_tlv_peer_flags_ext { 1173 WMI_PEER_EXT_EHT = BIT(0), 1174 WMI_PEER_EXT_320MHZ = BIT(1), 1175 }; 1176 1177 /** Enum list of TLV Tags for each parameter structure type. */ 1178 enum wmi_tlv_tag { 1179 WMI_TAG_LAST_RESERVED = 15, 1180 WMI_TAG_FIRST_ARRAY_ENUM, 1181 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1182 WMI_TAG_ARRAY_BYTE, 1183 WMI_TAG_ARRAY_STRUCT, 1184 WMI_TAG_ARRAY_FIXED_STRUCT, 1185 WMI_TAG_LAST_ARRAY_ENUM = 31, 1186 WMI_TAG_SERVICE_READY_EVENT, 1187 WMI_TAG_HAL_REG_CAPABILITIES, 1188 WMI_TAG_WLAN_HOST_MEM_REQ, 1189 WMI_TAG_READY_EVENT, 1190 WMI_TAG_SCAN_EVENT, 1191 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1192 WMI_TAG_CHAN_INFO_EVENT, 1193 WMI_TAG_COMB_PHYERR_RX_HDR, 1194 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1195 WMI_TAG_VDEV_STOPPED_EVENT, 1196 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1197 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1198 WMI_TAG_MGMT_RX_HDR, 1199 WMI_TAG_TBTT_OFFSET_EVENT, 1200 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1201 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1202 WMI_TAG_ROAM_EVENT, 1203 WMI_TAG_WOW_EVENT_INFO, 1204 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1205 WMI_TAG_RTT_EVENT_HEADER, 1206 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1207 WMI_TAG_RTT_MEAS_EVENT, 1208 WMI_TAG_ECHO_EVENT, 1209 WMI_TAG_FTM_INTG_EVENT, 1210 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1211 WMI_TAG_GPIO_INPUT_EVENT, 1212 WMI_TAG_CSA_EVENT, 1213 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1214 WMI_TAG_IGTK_INFO, 1215 WMI_TAG_DCS_INTERFERENCE_EVENT, 1216 WMI_TAG_ATH_DCS_CW_INT, 1217 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1218 WMI_TAG_ATH_DCS_CW_INT, 1219 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1220 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1221 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1222 WMI_TAG_WLAN_PROFILE_CTX_T, 1223 WMI_TAG_WLAN_PROFILE_T, 1224 WMI_TAG_PDEV_QVIT_EVENT, 1225 WMI_TAG_HOST_SWBA_EVENT, 1226 WMI_TAG_TIM_INFO, 1227 WMI_TAG_P2P_NOA_INFO, 1228 WMI_TAG_STATS_EVENT, 1229 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1230 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1231 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1232 WMI_TAG_INIT_CMD, 1233 WMI_TAG_RESOURCE_CONFIG, 1234 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1235 WMI_TAG_START_SCAN_CMD, 1236 WMI_TAG_STOP_SCAN_CMD, 1237 WMI_TAG_SCAN_CHAN_LIST_CMD, 1238 WMI_TAG_CHANNEL, 1239 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1240 WMI_TAG_PDEV_SET_PARAM_CMD, 1241 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1242 WMI_TAG_WMM_PARAMS, 1243 WMI_TAG_PDEV_SET_QUIET_CMD, 1244 WMI_TAG_VDEV_CREATE_CMD, 1245 WMI_TAG_VDEV_DELETE_CMD, 1246 WMI_TAG_VDEV_START_REQUEST_CMD, 1247 WMI_TAG_P2P_NOA_DESCRIPTOR, 1248 WMI_TAG_P2P_GO_SET_BEACON_IE, 1249 WMI_TAG_GTK_OFFLOAD_CMD, 1250 WMI_TAG_VDEV_UP_CMD, 1251 WMI_TAG_VDEV_STOP_CMD, 1252 WMI_TAG_VDEV_DOWN_CMD, 1253 WMI_TAG_VDEV_SET_PARAM_CMD, 1254 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1255 WMI_TAG_PEER_CREATE_CMD, 1256 WMI_TAG_PEER_DELETE_CMD, 1257 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1258 WMI_TAG_PEER_SET_PARAM_CMD, 1259 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1260 WMI_TAG_VHT_RATE_SET, 1261 WMI_TAG_BCN_TMPL_CMD, 1262 WMI_TAG_PRB_TMPL_CMD, 1263 WMI_TAG_BCN_PRB_INFO, 1264 WMI_TAG_PEER_TID_ADDBA_CMD, 1265 WMI_TAG_PEER_TID_DELBA_CMD, 1266 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1267 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1268 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1269 WMI_TAG_ROAM_SCAN_MODE, 1270 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1271 WMI_TAG_ROAM_SCAN_PERIOD, 1272 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1273 WMI_TAG_PDEV_SUSPEND_CMD, 1274 WMI_TAG_PDEV_RESUME_CMD, 1275 WMI_TAG_ADD_BCN_FILTER_CMD, 1276 WMI_TAG_RMV_BCN_FILTER_CMD, 1277 WMI_TAG_WOW_ENABLE_CMD, 1278 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1279 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1280 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1281 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1282 WMI_TAG_ARP_OFFLOAD_TUPLE, 1283 WMI_TAG_NS_OFFLOAD_TUPLE, 1284 WMI_TAG_FTM_INTG_CMD, 1285 WMI_TAG_STA_KEEPALIVE_CMD, 1286 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1287 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1288 WMI_TAG_AP_PS_PEER_CMD, 1289 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1290 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1291 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1292 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1293 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1294 WMI_TAG_WOW_DEL_PATTERN_CMD, 1295 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1296 WMI_TAG_RTT_MEASREQ_HEAD, 1297 WMI_TAG_RTT_MEASREQ_BODY, 1298 WMI_TAG_RTT_TSF_CMD, 1299 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1300 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1301 WMI_TAG_REQUEST_STATS_CMD, 1302 WMI_TAG_NLO_CONFIG_CMD, 1303 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1304 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1305 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1306 WMI_TAG_CHATTER_SET_MODE_CMD, 1307 WMI_TAG_ECHO_CMD, 1308 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1309 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1310 WMI_TAG_FORCE_FW_HANG_CMD, 1311 WMI_TAG_GPIO_CONFIG_CMD, 1312 WMI_TAG_GPIO_OUTPUT_CMD, 1313 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1314 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1315 WMI_TAG_BCN_TX_HDR, 1316 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1317 WMI_TAG_MGMT_TX_HDR, 1318 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1319 WMI_TAG_ADDBA_SEND_CMD, 1320 WMI_TAG_DELBA_SEND_CMD, 1321 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1322 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1323 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1324 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1325 WMI_TAG_PDEV_SET_HT_IE_CMD, 1326 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1327 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1328 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1329 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1330 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1331 WMI_TAG_PEER_MCAST_GROUP_CMD, 1332 WMI_TAG_ROAM_AP_PROFILE, 1333 WMI_TAG_AP_PROFILE, 1334 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1335 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1336 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1337 WMI_TAG_WOW_ADD_PATTERN_CMD, 1338 WMI_TAG_WOW_BITMAP_PATTERN_T, 1339 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1340 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1341 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1342 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1343 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1344 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1345 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1346 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1347 WMI_TAG_TXBF_CMD, 1348 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1349 WMI_TAG_NLO_EVENT, 1350 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1351 WMI_TAG_UPLOAD_H_HDR, 1352 WMI_TAG_CAPTURE_H_EVENT_HDR, 1353 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1354 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1355 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1356 WMI_TAG_VDEV_WMM_DELTS_CMD, 1357 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1358 WMI_TAG_TDLS_SET_STATE_CMD, 1359 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1360 WMI_TAG_TDLS_PEER_EVENT, 1361 WMI_TAG_TDLS_PEER_CAPABILITIES, 1362 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1363 WMI_TAG_ROAM_CHAN_LIST, 1364 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1365 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1366 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1367 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1368 WMI_TAG_BA_REQ_SSN_CMD, 1369 WMI_TAG_BA_RSP_SSN_EVENT, 1370 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1371 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1372 WMI_TAG_P2P_SET_OPPPS_CMD, 1373 WMI_TAG_P2P_SET_NOA_CMD, 1374 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1375 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1376 WMI_TAG_STA_SMPS_PARAM_CMD, 1377 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1378 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1379 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1380 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1381 WMI_TAG_P2P_NOA_EVENT, 1382 WMI_TAG_HB_SET_ENABLE_CMD, 1383 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1384 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1385 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1386 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1387 WMI_TAG_HB_IND_EVENT, 1388 WMI_TAG_TX_PAUSE_EVENT, 1389 WMI_TAG_RFKILL_EVENT, 1390 WMI_TAG_DFS_RADAR_EVENT, 1391 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1392 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1393 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1394 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1395 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1396 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1397 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1398 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1399 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1400 WMI_TAG_VDEV_PLMREQ_START_CMD, 1401 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1402 WMI_TAG_THERMAL_MGMT_CMD, 1403 WMI_TAG_THERMAL_MGMT_EVENT, 1404 WMI_TAG_PEER_INFO_REQ_CMD, 1405 WMI_TAG_PEER_INFO_EVENT, 1406 WMI_TAG_PEER_INFO, 1407 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1408 WMI_TAG_RMC_SET_MODE_CMD, 1409 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1410 WMI_TAG_RMC_CONFIG_CMD, 1411 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1412 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1413 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1414 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1415 WMI_TAG_NAN_CMD_PARAM, 1416 WMI_TAG_NAN_EVENT_HDR, 1417 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1418 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1419 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1420 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1421 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1422 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1423 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1424 WMI_TAG_ROAM_SCAN_CMD, 1425 WMI_TAG_REQ_STATS_EXT_CMD, 1426 WMI_TAG_STATS_EXT_EVENT, 1427 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1428 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1429 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1430 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1431 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1432 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1433 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1434 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1435 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1436 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1437 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1438 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1439 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1440 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1441 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1442 WMI_TAG_START_LINK_STATS_CMD, 1443 WMI_TAG_CLEAR_LINK_STATS_CMD, 1444 WMI_TAG_REQUEST_LINK_STATS_CMD, 1445 WMI_TAG_IFACE_LINK_STATS_EVENT, 1446 WMI_TAG_RADIO_LINK_STATS_EVENT, 1447 WMI_TAG_PEER_STATS_EVENT, 1448 WMI_TAG_CHANNEL_STATS, 1449 WMI_TAG_RADIO_LINK_STATS, 1450 WMI_TAG_RATE_STATS, 1451 WMI_TAG_PEER_LINK_STATS, 1452 WMI_TAG_WMM_AC_STATS, 1453 WMI_TAG_IFACE_LINK_STATS, 1454 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1455 WMI_TAG_LPI_START_SCAN_CMD, 1456 WMI_TAG_LPI_STOP_SCAN_CMD, 1457 WMI_TAG_LPI_RESULT_EVENT, 1458 WMI_TAG_PEER_STATE_EVENT, 1459 WMI_TAG_EXTSCAN_BUCKET_CMD, 1460 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1461 WMI_TAG_EXTSCAN_START_CMD, 1462 WMI_TAG_EXTSCAN_STOP_CMD, 1463 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1464 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1465 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1466 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1467 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1468 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1469 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1470 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1471 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1472 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1473 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1474 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1475 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1476 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1477 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1478 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1479 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1480 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1481 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1482 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1483 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1484 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1485 WMI_TAG_UNIT_TEST_CMD, 1486 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1487 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1488 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1489 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1490 WMI_TAG_ROAM_SYNCH_EVENT, 1491 WMI_TAG_ROAM_SYNCH_COMPLETE, 1492 WMI_TAG_EXTWOW_ENABLE_CMD, 1493 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1494 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1495 WMI_TAG_LPI_STATUS_EVENT, 1496 WMI_TAG_LPI_HANDOFF_EVENT, 1497 WMI_TAG_VDEV_RATE_STATS_EVENT, 1498 WMI_TAG_VDEV_RATE_HT_INFO, 1499 WMI_TAG_RIC_REQUEST, 1500 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1501 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1502 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1503 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1504 WMI_TAG_RIC_TSPEC, 1505 WMI_TAG_TPC_CHAINMASK_CONFIG, 1506 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1507 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1508 WMI_TAG_KEY_MATERIAL, 1509 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1510 WMI_TAG_SET_LED_FLASHING_CMD, 1511 WMI_TAG_MDNS_OFFLOAD_CMD, 1512 WMI_TAG_MDNS_SET_FQDN_CMD, 1513 WMI_TAG_MDNS_SET_RESP_CMD, 1514 WMI_TAG_MDNS_GET_STATS_CMD, 1515 WMI_TAG_MDNS_STATS_EVENT, 1516 WMI_TAG_ROAM_INVOKE_CMD, 1517 WMI_TAG_PDEV_RESUME_EVENT, 1518 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1519 WMI_TAG_SAP_OFL_ENABLE_CMD, 1520 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1521 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1522 WMI_TAG_APFIND_CMD_PARAM, 1523 WMI_TAG_APFIND_EVENT_HDR, 1524 WMI_TAG_OCB_SET_SCHED_CMD, 1525 WMI_TAG_OCB_SET_SCHED_EVENT, 1526 WMI_TAG_OCB_SET_CONFIG_CMD, 1527 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1528 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1529 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1530 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1531 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1532 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1533 WMI_TAG_DCC_GET_STATS_CMD, 1534 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1535 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1536 WMI_TAG_DCC_CLEAR_STATS_CMD, 1537 WMI_TAG_DCC_UPDATE_NDL_CMD, 1538 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1539 WMI_TAG_DCC_STATS_EVENT, 1540 WMI_TAG_OCB_CHANNEL, 1541 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1542 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1543 WMI_TAG_DCC_NDL_CHAN, 1544 WMI_TAG_QOS_PARAMETER, 1545 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1546 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1547 WMI_TAG_ROAM_FILTER, 1548 WMI_TAG_PASSPOINT_CONFIG_CMD, 1549 WMI_TAG_PASSPOINT_EVENT_HDR, 1550 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1551 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1552 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1553 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1554 WMI_TAG_GET_FW_MEM_DUMP, 1555 WMI_TAG_UPDATE_FW_MEM_DUMP, 1556 WMI_TAG_FW_MEM_DUMP_PARAMS, 1557 WMI_TAG_DEBUG_MESG_FLUSH, 1558 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1559 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1560 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1561 WMI_TAG_VDEV_SET_IE_CMD, 1562 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1563 WMI_TAG_RSSI_BREACH_EVENT, 1564 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1565 WMI_TAG_SOC_SET_PCL_CMD, 1566 WMI_TAG_SOC_SET_HW_MODE_CMD, 1567 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1568 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1569 WMI_TAG_VDEV_TXRX_STREAMS, 1570 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1571 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1572 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1573 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1574 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1575 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1576 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1577 WMI_TAG_PACKET_FILTER_CONFIG, 1578 WMI_TAG_PACKET_FILTER_ENABLE, 1579 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1580 WMI_TAG_MGMT_TX_SEND_CMD, 1581 WMI_TAG_MGMT_TX_COMPL_EVENT, 1582 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1583 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1584 WMI_TAG_LRO_INFO_CMD, 1585 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1586 WMI_TAG_SERVICE_READY_EXT_EVENT, 1587 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1588 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1589 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1590 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1591 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1592 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1593 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1594 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1595 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1596 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1597 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1598 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1599 WMI_TAG_SCPC_EVENT, 1600 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1601 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1602 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1603 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1604 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1605 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1606 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1607 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1608 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1609 WMI_TAG_PEER_DELETE_RESP_EVENT, 1610 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1611 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1612 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1613 WMI_TAG_VDEV_CONFIG_RATEMASK, 1614 WMI_TAG_PDEV_FIPS_CMD, 1615 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1616 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1617 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1618 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1619 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1620 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1621 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1622 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1623 WMI_TAG_FWTEST_SET_PARAM_CMD, 1624 WMI_TAG_PEER_ATF_REQUEST, 1625 WMI_TAG_VDEV_ATF_REQUEST, 1626 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1627 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1628 WMI_TAG_INST_RSSI_STATS_RESP, 1629 WMI_TAG_MED_UTIL_REPORT_EVENT, 1630 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1631 WMI_TAG_WDS_ADDR_EVENT, 1632 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1633 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1634 WMI_TAG_PDEV_TPC_EVENT, 1635 WMI_TAG_ANI_OFDM_EVENT, 1636 WMI_TAG_ANI_CCK_EVENT, 1637 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1638 WMI_TAG_PDEV_FIPS_EVENT, 1639 WMI_TAG_ATF_PEER_INFO, 1640 WMI_TAG_PDEV_GET_TPC_CMD, 1641 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1642 WMI_TAG_QBOOST_CFG_CMD, 1643 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1644 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1645 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1646 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1647 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1648 WMI_TAG_PEER_MCS_RATE_INFO, 1649 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1650 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1651 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1652 WMI_TAG_MU_REPORT_TOTAL_MU, 1653 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1654 WMI_TAG_ROAM_SET_MBO, 1655 WMI_TAG_MIB_STATS_ENABLE_CMD, 1656 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1657 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1658 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1659 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1660 WMI_TAG_NDI_GET_CAP_REQ, 1661 WMI_TAG_NDP_INITIATOR_REQ, 1662 WMI_TAG_NDP_RESPONDER_REQ, 1663 WMI_TAG_NDP_END_REQ, 1664 WMI_TAG_NDI_CAP_RSP_EVENT, 1665 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1666 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1667 WMI_TAG_NDP_END_RSP_EVENT, 1668 WMI_TAG_NDP_INDICATION_EVENT, 1669 WMI_TAG_NDP_CONFIRM_EVENT, 1670 WMI_TAG_NDP_END_INDICATION_EVENT, 1671 WMI_TAG_VDEV_SET_QUIET_CMD, 1672 WMI_TAG_PDEV_SET_PCL_CMD, 1673 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1674 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1675 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1676 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1677 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1678 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1679 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1680 WMI_TAG_COEX_CONFIG_CMD, 1681 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1682 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1683 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1684 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1685 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1686 WMI_TAG_MAC_PHY_CAPABILITIES, 1687 WMI_TAG_HW_MODE_CAPABILITIES, 1688 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1689 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1690 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1691 WMI_TAG_VDEV_WISA_CMD, 1692 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1693 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1694 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1695 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1696 WMI_TAG_NDP_END_RSP_PER_NDI, 1697 WMI_TAG_PEER_BWF_REQUEST, 1698 WMI_TAG_BWF_PEER_INFO, 1699 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1700 WMI_TAG_RMC_SET_LEADER_CMD, 1701 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1702 WMI_TAG_PER_CHAIN_RSSI_STATS, 1703 WMI_TAG_RSSI_STATS, 1704 WMI_TAG_P2P_LO_START_CMD, 1705 WMI_TAG_P2P_LO_STOP_CMD, 1706 WMI_TAG_P2P_LO_STOPPED_EVENT, 1707 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1708 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1709 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1710 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1711 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1712 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1713 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1714 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1715 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1716 WMI_TAG_TLV_BUF_LEN_PARAM, 1717 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1718 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1719 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1720 WMI_TAG_PEER_ANTDIV_INFO, 1721 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1722 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1723 WMI_TAG_MNT_FILTER_CMD, 1724 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1725 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1726 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1727 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1728 WMI_TAG_CHAN_CCA_STATS, 1729 WMI_TAG_PEER_SIGNAL_STATS, 1730 WMI_TAG_TX_STATS, 1731 WMI_TAG_PEER_AC_TX_STATS, 1732 WMI_TAG_RX_STATS, 1733 WMI_TAG_PEER_AC_RX_STATS, 1734 WMI_TAG_REPORT_STATS_EVENT, 1735 WMI_TAG_CHAN_CCA_STATS_THRESH, 1736 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1737 WMI_TAG_TX_STATS_THRESH, 1738 WMI_TAG_RX_STATS_THRESH, 1739 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1740 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1741 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1742 WMI_TAG_RX_AGGR_FAILURE_INFO, 1743 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1744 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1745 WMI_TAG_PDEV_BAND_TO_MAC, 1746 WMI_TAG_TBTT_OFFSET_INFO, 1747 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1748 WMI_TAG_SAR_LIMITS_CMD, 1749 WMI_TAG_SAR_LIMIT_CMD_ROW, 1750 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1751 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1752 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1753 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1754 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1755 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1756 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1757 WMI_TAG_VENDOR_OUI, 1758 WMI_TAG_REQUEST_RCPI_CMD, 1759 WMI_TAG_UPDATE_RCPI_EVENT, 1760 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1761 WMI_TAG_PEER_STATS_INFO, 1762 WMI_TAG_PEER_STATS_INFO_EVENT, 1763 WMI_TAG_PKGID_EVENT, 1764 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1765 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1766 WMI_TAG_REGULATORY_RULE_STRUCT, 1767 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1768 WMI_TAG_11D_SCAN_START_CMD, 1769 WMI_TAG_11D_SCAN_STOP_CMD, 1770 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1771 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1772 WMI_TAG_RADIO_CHAN_STATS, 1773 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1774 WMI_TAG_ROAM_PER_CONFIG, 1775 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1776 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1777 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1778 WMI_TAG_HW_DATA_FILTER_CMD, 1779 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1780 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1781 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1782 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1783 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1784 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1785 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1786 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1787 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1788 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1789 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1790 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1791 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1792 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1793 WMI_TAG_IFACE_OFFLOAD_STATS, 1794 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1795 WMI_TAG_RSSI_CTL_EXT, 1796 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1797 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1798 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1799 WMI_TAG_VDEV_TX_POWER_EVENT, 1800 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1801 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1802 WMI_TAG_TX_SEND_PARAMS, 1803 WMI_TAG_HE_RATE_SET, 1804 WMI_TAG_CONGESTION_STATS, 1805 WMI_TAG_SET_INIT_COUNTRY_CMD, 1806 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1807 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1808 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1809 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1810 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1811 WMI_TAG_THERM_THROT_STATS_EVENT, 1812 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1813 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1814 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1815 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1816 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1817 WMI_TAG_OEM_INDIRECT_DATA, 1818 WMI_TAG_OEM_DMA_BUF_RELEASE, 1819 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1820 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1821 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1822 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1823 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1824 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1825 WMI_TAG_UNIT_TEST_EVENT, 1826 WMI_TAG_ROAM_FILS_OFFLOAD, 1827 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1828 WMI_TAG_PMK_CACHE, 1829 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1830 WMI_TAG_ROAM_FILS_SYNCH, 1831 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1832 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1833 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1834 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1835 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1836 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1837 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1838 WMI_TAG_BTM_CONFIG, 1839 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1840 WMI_TAG_WLM_CONFIG_CMD, 1841 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1842 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1843 WMI_TAG_ROAM_CND_SCORING_PARAM, 1844 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1845 WMI_TAG_VENDOR_OUI_EXT, 1846 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1847 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1848 WMI_TAG_ENABLE_FILS_CMD, 1849 WMI_TAG_HOST_SWFDA_EVENT, 1850 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1851 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1852 WMI_TAG_STATS_PERIOD, 1853 WMI_TAG_NDL_SCHEDULE_UPDATE, 1854 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1855 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1856 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1857 WMI_TAG_SAR2_RESULT_EVENT, 1858 WMI_TAG_SAR_CAPABILITIES, 1859 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1860 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1861 WMI_TAG_DMA_RING_CAPABILITIES, 1862 WMI_TAG_DMA_RING_CFG_REQ, 1863 WMI_TAG_DMA_RING_CFG_RSP, 1864 WMI_TAG_DMA_BUF_RELEASE, 1865 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1866 WMI_TAG_SAR_GET_LIMITS_CMD, 1867 WMI_TAG_SAR_GET_LIMITS_EVENT, 1868 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1869 WMI_TAG_OFFLOAD_11K_REPORT, 1870 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1871 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1872 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1873 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1874 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1875 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1876 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1877 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1878 WMI_TAG_PDEV_GET_NFCAL_POWER, 1879 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1880 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1881 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1882 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1883 WMI_TAG_TWT_ENABLE_CMD, 1884 WMI_TAG_TWT_DISABLE_CMD, 1885 WMI_TAG_TWT_ADD_DIALOG_CMD, 1886 WMI_TAG_TWT_DEL_DIALOG_CMD, 1887 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1888 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1889 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1890 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1891 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1892 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1893 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1894 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1895 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1896 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1897 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1898 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1899 WMI_TAG_GET_TPC_POWER_CMD, 1900 WMI_TAG_GET_TPC_POWER_EVENT, 1901 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1902 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1903 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1904 WMI_TAG_MOTION_DET_START_STOP_CMD, 1905 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1906 WMI_TAG_MOTION_DET_EVENT, 1907 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1908 WMI_TAG_NDP_TRANSPORT_IP, 1909 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1910 WMI_TAG_ESP_ESTIMATE_EVENT, 1911 WMI_TAG_NAN_HOST_CONFIG, 1912 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1913 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1914 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1915 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1916 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1917 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1918 WMI_TAG_PEER_EXTD2_STATS, 1919 WMI_TAG_HPCS_PULSE_START_CMD, 1920 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1921 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1922 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1923 WMI_TAG_NAN_EVENT_INFO, 1924 WMI_TAG_NDP_CHANNEL_INFO, 1925 WMI_TAG_NDP_CMD, 1926 WMI_TAG_NDP_EVENT, 1927 /* TODO add all the missing cmds */ 1928 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1929 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1930 WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334, 1931 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1932 WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F, 1933 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1934 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1935 WMI_TAG_EHT_RATE_SET = 0x3C4, 1936 WMI_TAG_MAX 1937 }; 1938 1939 enum wmi_tlv_service { 1940 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1941 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1942 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1943 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1944 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1945 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1946 WMI_TLV_SERVICE_AP_UAPSD = 6, 1947 WMI_TLV_SERVICE_AP_DFS = 7, 1948 WMI_TLV_SERVICE_11AC = 8, 1949 WMI_TLV_SERVICE_BLOCKACK = 9, 1950 WMI_TLV_SERVICE_PHYERR = 10, 1951 WMI_TLV_SERVICE_BCN_FILTER = 11, 1952 WMI_TLV_SERVICE_RTT = 12, 1953 WMI_TLV_SERVICE_WOW = 13, 1954 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1955 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1956 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1957 WMI_TLV_SERVICE_NLO = 17, 1958 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1959 WMI_TLV_SERVICE_SCAN_SCH = 19, 1960 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1961 WMI_TLV_SERVICE_CHATTER = 21, 1962 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1963 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1964 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1965 WMI_TLV_SERVICE_GPIO = 25, 1966 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1967 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1968 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1969 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1970 WMI_TLV_SERVICE_TX_ENCAP = 30, 1971 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1972 WMI_TLV_SERVICE_EARLY_RX = 32, 1973 WMI_TLV_SERVICE_STA_SMPS = 33, 1974 WMI_TLV_SERVICE_FWTEST = 34, 1975 WMI_TLV_SERVICE_STA_WMMAC = 35, 1976 WMI_TLV_SERVICE_TDLS = 36, 1977 WMI_TLV_SERVICE_BURST = 37, 1978 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1979 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1980 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1981 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1982 WMI_TLV_SERVICE_WLAN_HB = 42, 1983 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1984 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1985 WMI_TLV_SERVICE_QPOWER = 45, 1986 WMI_TLV_SERVICE_PLMREQ = 46, 1987 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1988 WMI_TLV_SERVICE_RMC = 48, 1989 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1990 WMI_TLV_SERVICE_COEX_SAR = 50, 1991 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1992 WMI_TLV_SERVICE_NAN = 52, 1993 WMI_TLV_SERVICE_L1SS_STAT = 53, 1994 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1995 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1996 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1997 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1998 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1999 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 2000 WMI_TLV_SERVICE_LPASS = 60, 2001 WMI_TLV_SERVICE_EXTSCAN = 61, 2002 WMI_TLV_SERVICE_D0WOW = 62, 2003 WMI_TLV_SERVICE_HSOFFLOAD = 63, 2004 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 2005 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 2006 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 2007 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 2008 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 2009 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 2010 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 2011 WMI_TLV_SERVICE_OCB = 71, 2012 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 2013 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 2014 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 2015 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 2016 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 2017 WMI_TLV_SERVICE_EXT_MSG = 77, 2018 WMI_TLV_SERVICE_MAWC = 78, 2019 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 2020 WMI_TLV_SERVICE_EGAP = 80, 2021 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 2022 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 2023 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 2024 WMI_TLV_SERVICE_ATF = 84, 2025 WMI_TLV_SERVICE_COEX_GPIO = 85, 2026 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 2027 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 2028 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2029 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2030 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2031 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2032 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2033 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2034 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2035 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2036 WMI_TLV_SERVICE_NAN_DATA = 96, 2037 WMI_TLV_SERVICE_NAN_RTT = 97, 2038 WMI_TLV_SERVICE_11AX = 98, 2039 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2040 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2041 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2042 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2043 WMI_TLV_SERVICE_MESH_11S = 103, 2044 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2045 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2046 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2047 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2048 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2049 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2050 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2051 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2052 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2053 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2054 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2055 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2056 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2057 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2058 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2059 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2060 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2061 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2062 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2063 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2064 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2065 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2066 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2067 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2068 2069 WMI_MAX_SERVICE = 128, 2070 2071 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2072 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2073 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2074 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2075 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2076 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2077 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2078 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2079 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2080 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2081 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2082 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2083 WMI_TLV_SERVICE_THERM_THROT = 140, 2084 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2085 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2086 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2087 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2088 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2089 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2090 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2091 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2092 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2093 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2094 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2095 WMI_TLV_SERVICE_STA_TWT = 152, 2096 WMI_TLV_SERVICE_AP_TWT = 153, 2097 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2098 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2099 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2100 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2101 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2102 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2103 WMI_TLV_SERVICE_MOTION_DET = 160, 2104 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2105 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2106 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2107 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2108 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2109 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2110 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2111 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2112 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2113 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2114 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2115 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2116 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2117 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2118 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2119 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2120 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2121 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2122 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2123 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2124 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2125 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2126 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2127 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2128 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2129 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2130 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2131 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2132 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2133 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2134 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2135 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2136 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2137 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2138 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2139 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2140 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2141 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2142 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2143 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2144 WMI_TLV_SERVICE_PS_TDCC = 201, 2145 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2146 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2147 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2148 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2149 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2150 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2151 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2152 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2153 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2154 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2155 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2156 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2157 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2158 WMI_TLV_SERVICE_EXT2_MSG = 220, 2159 2160 WMI_MAX_EXT_SERVICE = 256, 2161 2162 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2163 2164 WMI_TLV_SERVICE_11BE = 289, 2165 2166 WMI_MAX_EXT2_SERVICE, 2167 }; 2168 2169 enum { 2170 WMI_SMPS_FORCED_MODE_NONE = 0, 2171 WMI_SMPS_FORCED_MODE_DISABLED, 2172 WMI_SMPS_FORCED_MODE_STATIC, 2173 WMI_SMPS_FORCED_MODE_DYNAMIC 2174 }; 2175 2176 enum wmi_tpc_chainmask { 2177 WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0, 2178 WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1, 2179 WMI_NUM_SUPPORTED_BAND_MAX = 2, 2180 }; 2181 2182 enum wmi_peer_param { 2183 WMI_PEER_MIMO_PS_STATE = 1, 2184 WMI_PEER_AMPDU = 2, 2185 WMI_PEER_AUTHORIZE = 3, 2186 WMI_PEER_CHWIDTH = 4, 2187 WMI_PEER_NSS = 5, 2188 WMI_PEER_USE_4ADDR = 6, 2189 WMI_PEER_MEMBERSHIP = 7, 2190 WMI_PEER_USERPOS = 8, 2191 WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9, 2192 WMI_PEER_TX_FAIL_CNT_THR = 10, 2193 WMI_PEER_SET_HW_RETRY_CTS2S = 11, 2194 WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12, 2195 WMI_PEER_PHYMODE = 13, 2196 WMI_PEER_USE_FIXED_PWR = 14, 2197 WMI_PEER_PARAM_FIXED_RATE = 15, 2198 WMI_PEER_SET_MU_WHITELIST = 16, 2199 WMI_PEER_SET_MAX_TX_RATE = 17, 2200 WMI_PEER_SET_MIN_TX_RATE = 18, 2201 WMI_PEER_SET_DEFAULT_ROUTING = 19, 2202 }; 2203 2204 enum wmi_slot_time { 2205 WMI_VDEV_SLOT_TIME_LONG = 1, 2206 WMI_VDEV_SLOT_TIME_SHORT = 2, 2207 }; 2208 2209 enum wmi_preamble { 2210 WMI_VDEV_PREAMBLE_LONG = 1, 2211 WMI_VDEV_PREAMBLE_SHORT = 2, 2212 }; 2213 2214 enum wmi_peer_smps_state { 2215 WMI_PEER_SMPS_PS_NONE = 0, 2216 WMI_PEER_SMPS_STATIC = 1, 2217 WMI_PEER_SMPS_DYNAMIC = 2 2218 }; 2219 2220 enum wmi_peer_chwidth { 2221 WMI_PEER_CHWIDTH_20MHZ = 0, 2222 WMI_PEER_CHWIDTH_40MHZ = 1, 2223 WMI_PEER_CHWIDTH_80MHZ = 2, 2224 WMI_PEER_CHWIDTH_160MHZ = 3, 2225 WMI_PEER_CHWIDTH_320MHZ = 4, 2226 }; 2227 2228 enum wmi_beacon_gen_mode { 2229 WMI_BEACON_STAGGERED_MODE = 0, 2230 WMI_BEACON_BURST_MODE = 1 2231 }; 2232 2233 enum wmi_direct_buffer_module { 2234 WMI_DIRECT_BUF_SPECTRAL = 0, 2235 WMI_DIRECT_BUF_CFR = 1, 2236 2237 /* keep it last */ 2238 WMI_DIRECT_BUF_MAX 2239 }; 2240 2241 struct ath12k_wmi_pdev_band_arg { 2242 u32 pdev_id; 2243 u32 start_freq; 2244 u32 end_freq; 2245 }; 2246 2247 struct ath12k_wmi_ppe_threshold_arg { 2248 u32 numss_m1; 2249 u32 ru_bit_mask; 2250 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2251 }; 2252 2253 #define PSOC_HOST_MAX_PHY_SIZE (3) 2254 #define ATH12K_11B_SUPPORT BIT(0) 2255 #define ATH12K_11G_SUPPORT BIT(1) 2256 #define ATH12K_11A_SUPPORT BIT(2) 2257 #define ATH12K_11N_SUPPORT BIT(3) 2258 #define ATH12K_11AC_SUPPORT BIT(4) 2259 #define ATH12K_11AX_SUPPORT BIT(5) 2260 2261 struct ath12k_wmi_hal_reg_capabilities_ext_arg { 2262 u32 phy_id; 2263 u32 eeprom_reg_domain; 2264 u32 eeprom_reg_domain_ext; 2265 u32 regcap1; 2266 u32 regcap2; 2267 u32 wireless_modes; 2268 u32 low_2ghz_chan; 2269 u32 high_2ghz_chan; 2270 u32 low_5ghz_chan; 2271 u32 high_5ghz_chan; 2272 }; 2273 2274 #define WMI_HOST_MAX_PDEV 3 2275 2276 struct ath12k_wmi_host_mem_chunk_params { 2277 __le32 tlv_header; 2278 __le32 req_id; 2279 __le32 ptr; 2280 __le32 size; 2281 } __packed; 2282 2283 struct ath12k_wmi_host_mem_chunk_arg { 2284 void *vaddr; 2285 dma_addr_t paddr; 2286 u32 len; 2287 u32 req_id; 2288 }; 2289 2290 struct ath12k_wmi_resource_config_arg { 2291 u32 num_vdevs; 2292 u32 num_peers; 2293 u32 num_active_peers; 2294 u32 num_offload_peers; 2295 u32 num_offload_reorder_buffs; 2296 u32 num_peer_keys; 2297 u32 num_tids; 2298 u32 ast_skid_limit; 2299 u32 tx_chain_mask; 2300 u32 rx_chain_mask; 2301 u32 rx_timeout_pri[4]; 2302 u32 rx_decap_mode; 2303 u32 scan_max_pending_req; 2304 u32 bmiss_offload_max_vdev; 2305 u32 roam_offload_max_vdev; 2306 u32 roam_offload_max_ap_profiles; 2307 u32 num_mcast_groups; 2308 u32 num_mcast_table_elems; 2309 u32 mcast2ucast_mode; 2310 u32 tx_dbg_log_size; 2311 u32 num_wds_entries; 2312 u32 dma_burst_size; 2313 u32 mac_aggr_delim; 2314 u32 rx_skip_defrag_timeout_dup_detection_check; 2315 u32 vow_config; 2316 u32 gtk_offload_max_vdev; 2317 u32 num_msdu_desc; 2318 u32 max_frag_entries; 2319 u32 max_peer_ext_stats; 2320 u32 smart_ant_cap; 2321 u32 bk_minfree; 2322 u32 be_minfree; 2323 u32 vi_minfree; 2324 u32 vo_minfree; 2325 u32 rx_batchmode; 2326 u32 tt_support; 2327 u32 atf_config; 2328 u32 iphdr_pad_config; 2329 u32 qwrap_config:16, 2330 alloc_frag_desc_for_data_pkt:16; 2331 u32 num_tdls_vdevs; 2332 u32 num_tdls_conn_table_entries; 2333 u32 beacon_tx_offload_max_vdev; 2334 u32 num_multicast_filter_entries; 2335 u32 num_wow_filters; 2336 u32 num_keep_alive_pattern; 2337 u32 keep_alive_pattern_size; 2338 u32 max_tdls_concurrent_sleep_sta; 2339 u32 max_tdls_concurrent_buffer_sta; 2340 u32 wmi_send_separate; 2341 u32 num_ocb_vdevs; 2342 u32 num_ocb_channels; 2343 u32 num_ocb_schedules; 2344 u32 num_ns_ext_tuples_cfg; 2345 u32 bpf_instruction_size; 2346 u32 max_bssid_rx_filters; 2347 u32 use_pdev_id; 2348 u32 peer_map_unmap_version; 2349 u32 sched_params; 2350 u32 twt_ap_pdev_count; 2351 u32 twt_ap_sta_count; 2352 bool is_reg_cc_ext_event_supported; 2353 }; 2354 2355 struct ath12k_wmi_init_cmd_arg { 2356 struct ath12k_wmi_resource_config_arg res_cfg; 2357 u8 num_mem_chunks; 2358 struct ath12k_wmi_host_mem_chunk_arg *mem_chunks; 2359 u32 hw_mode_id; 2360 u32 num_band_to_mac; 2361 struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV]; 2362 }; 2363 2364 struct ath12k_wmi_pdev_band_to_mac_params { 2365 __le32 tlv_header; 2366 __le32 pdev_id; 2367 __le32 start_freq; 2368 __le32 end_freq; 2369 } __packed; 2370 2371 /* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part 2372 * of WMI_TAG_INIT_CMD. 2373 */ 2374 struct ath12k_wmi_pdev_set_hw_mode_cmd { 2375 __le32 tlv_header; 2376 __le32 pdev_id; 2377 __le32 hw_mode_index; 2378 __le32 num_band_to_mac; 2379 } __packed; 2380 2381 struct ath12k_wmi_ppe_threshold_params { 2382 __le32 numss_m1; /** NSS - 1*/ 2383 __le32 ru_info; 2384 __le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2385 } __packed; 2386 2387 #define HW_BD_INFO_SIZE 5 2388 2389 struct ath12k_wmi_abi_version_params { 2390 __le32 abi_version_0; 2391 __le32 abi_version_1; 2392 __le32 abi_version_ns_0; 2393 __le32 abi_version_ns_1; 2394 __le32 abi_version_ns_2; 2395 __le32 abi_version_ns_3; 2396 } __packed; 2397 2398 struct wmi_init_cmd { 2399 __le32 tlv_header; 2400 struct ath12k_wmi_abi_version_params host_abi_vers; 2401 __le32 num_host_mem_chunks; 2402 } __packed; 2403 2404 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2405 2406 struct ath12k_wmi_resource_config_params { 2407 __le32 tlv_header; 2408 __le32 num_vdevs; 2409 __le32 num_peers; 2410 __le32 num_offload_peers; 2411 __le32 num_offload_reorder_buffs; 2412 __le32 num_peer_keys; 2413 __le32 num_tids; 2414 __le32 ast_skid_limit; 2415 __le32 tx_chain_mask; 2416 __le32 rx_chain_mask; 2417 __le32 rx_timeout_pri[4]; 2418 __le32 rx_decap_mode; 2419 __le32 scan_max_pending_req; 2420 __le32 bmiss_offload_max_vdev; 2421 __le32 roam_offload_max_vdev; 2422 __le32 roam_offload_max_ap_profiles; 2423 __le32 num_mcast_groups; 2424 __le32 num_mcast_table_elems; 2425 __le32 mcast2ucast_mode; 2426 __le32 tx_dbg_log_size; 2427 __le32 num_wds_entries; 2428 __le32 dma_burst_size; 2429 __le32 mac_aggr_delim; 2430 __le32 rx_skip_defrag_timeout_dup_detection_check; 2431 __le32 vow_config; 2432 __le32 gtk_offload_max_vdev; 2433 __le32 num_msdu_desc; 2434 __le32 max_frag_entries; 2435 __le32 num_tdls_vdevs; 2436 __le32 num_tdls_conn_table_entries; 2437 __le32 beacon_tx_offload_max_vdev; 2438 __le32 num_multicast_filter_entries; 2439 __le32 num_wow_filters; 2440 __le32 num_keep_alive_pattern; 2441 __le32 keep_alive_pattern_size; 2442 __le32 max_tdls_concurrent_sleep_sta; 2443 __le32 max_tdls_concurrent_buffer_sta; 2444 __le32 wmi_send_separate; 2445 __le32 num_ocb_vdevs; 2446 __le32 num_ocb_channels; 2447 __le32 num_ocb_schedules; 2448 __le32 flag1; 2449 __le32 smart_ant_cap; 2450 __le32 bk_minfree; 2451 __le32 be_minfree; 2452 __le32 vi_minfree; 2453 __le32 vo_minfree; 2454 __le32 alloc_frag_desc_for_data_pkt; 2455 __le32 num_ns_ext_tuples_cfg; 2456 __le32 bpf_instruction_size; 2457 __le32 max_bssid_rx_filters; 2458 __le32 use_pdev_id; 2459 __le32 max_num_dbs_scan_duty_cycle; 2460 __le32 max_num_group_keys; 2461 __le32 peer_map_unmap_version; 2462 __le32 sched_params; 2463 __le32 twt_ap_pdev_count; 2464 __le32 twt_ap_sta_count; 2465 __le32 max_nlo_ssids; 2466 __le32 num_pkt_filters; 2467 __le32 num_max_sta_vdevs; 2468 __le32 max_bssid_indicator; 2469 __le32 ul_resp_config; 2470 __le32 msdu_flow_override_config0; 2471 __le32 msdu_flow_override_config1; 2472 __le32 flags2; 2473 __le32 host_service_flags; 2474 __le32 max_rnr_neighbours; 2475 __le32 ema_max_vap_cnt; 2476 __le32 ema_max_profile_period; 2477 } __packed; 2478 2479 struct wmi_service_ready_event { 2480 __le32 fw_build_vers; 2481 struct ath12k_wmi_abi_version_params fw_abi_vers; 2482 __le32 phy_capability; 2483 __le32 max_frag_entry; 2484 __le32 num_rf_chains; 2485 __le32 ht_cap_info; 2486 __le32 vht_cap_info; 2487 __le32 vht_supp_mcs; 2488 __le32 hw_min_tx_power; 2489 __le32 hw_max_tx_power; 2490 __le32 sys_cap_info; 2491 __le32 min_pkt_size_enable; 2492 __le32 max_bcn_ie_size; 2493 __le32 num_mem_reqs; 2494 __le32 max_num_scan_channels; 2495 __le32 hw_bd_id; 2496 __le32 hw_bd_info[HW_BD_INFO_SIZE]; 2497 __le32 max_supported_macs; 2498 __le32 wmi_fw_sub_feat_caps; 2499 __le32 num_dbs_hw_modes; 2500 /* txrx_chainmask 2501 * [7:0] - 2G band tx chain mask 2502 * [15:8] - 2G band rx chain mask 2503 * [23:16] - 5G band tx chain mask 2504 * [31:24] - 5G band rx chain mask 2505 */ 2506 __le32 txrx_chainmask; 2507 __le32 default_dbs_hw_mode_index; 2508 __le32 num_msdu_desc; 2509 } __packed; 2510 2511 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2512 2513 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2514 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2515 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2516 #define WMI_SERVICE_BITS_IN_SIZE32 4 2517 2518 struct wmi_service_ready_ext_event { 2519 __le32 default_conc_scan_config_bits; 2520 __le32 default_fw_config_bits; 2521 struct ath12k_wmi_ppe_threshold_params ppet; 2522 __le32 he_cap_info; 2523 __le32 mpdu_density; 2524 __le32 max_bssid_rx_filters; 2525 __le32 fw_build_vers_ext; 2526 __le32 max_nlo_ssids; 2527 __le32 max_bssid_indicator; 2528 __le32 he_cap_info_ext; 2529 } __packed; 2530 2531 struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params { 2532 __le32 num_hw_modes; 2533 __le32 num_chainmask_tables; 2534 } __packed; 2535 2536 struct ath12k_wmi_hw_mode_cap_params { 2537 __le32 tlv_header; 2538 __le32 hw_mode_id; 2539 __le32 phy_id_map; 2540 __le32 hw_mode_config_type; 2541 } __packed; 2542 2543 #define WMI_MAX_HECAP_PHY_SIZE (3) 2544 2545 struct ath12k_wmi_mac_phy_caps_params { 2546 __le32 hw_mode_id; 2547 __le32 pdev_id; 2548 __le32 phy_id; 2549 __le32 supported_flags; 2550 __le32 supported_bands; 2551 __le32 ampdu_density; 2552 __le32 max_bw_supported_2g; 2553 __le32 ht_cap_info_2g; 2554 __le32 vht_cap_info_2g; 2555 __le32 vht_supp_mcs_2g; 2556 __le32 he_cap_info_2g; 2557 __le32 he_supp_mcs_2g; 2558 __le32 tx_chain_mask_2g; 2559 __le32 rx_chain_mask_2g; 2560 __le32 max_bw_supported_5g; 2561 __le32 ht_cap_info_5g; 2562 __le32 vht_cap_info_5g; 2563 __le32 vht_supp_mcs_5g; 2564 __le32 he_cap_info_5g; 2565 __le32 he_supp_mcs_5g; 2566 __le32 tx_chain_mask_5g; 2567 __le32 rx_chain_mask_5g; 2568 __le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2569 __le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2570 struct ath12k_wmi_ppe_threshold_params he_ppet2g; 2571 struct ath12k_wmi_ppe_threshold_params he_ppet5g; 2572 __le32 chainmask_table_id; 2573 __le32 lmac_id; 2574 __le32 he_cap_info_2g_ext; 2575 __le32 he_cap_info_5g_ext; 2576 __le32 he_cap_info_internal; 2577 } __packed; 2578 2579 struct ath12k_wmi_hal_reg_caps_ext_params { 2580 __le32 tlv_header; 2581 __le32 phy_id; 2582 __le32 eeprom_reg_domain; 2583 __le32 eeprom_reg_domain_ext; 2584 __le32 regcap1; 2585 __le32 regcap2; 2586 __le32 wireless_modes; 2587 __le32 low_2ghz_chan; 2588 __le32 high_2ghz_chan; 2589 __le32 low_5ghz_chan; 2590 __le32 high_5ghz_chan; 2591 } __packed; 2592 2593 struct ath12k_wmi_soc_hal_reg_caps_params { 2594 __le32 num_phy; 2595 } __packed; 2596 2597 #define WMI_MAX_EHTCAP_MAC_SIZE 2 2598 #define WMI_MAX_EHTCAP_PHY_SIZE 3 2599 #define WMI_MAX_EHTCAP_RATE_SET 3 2600 2601 /* Used for EHT MCS-NSS array. Data at each array index follows the format given 2602 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4. 2603 * 2604 * Index interpretation: 2605 * 0 - 20 MHz only sta, all 4 bytes valid 2606 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid 2607 * 2 - index for 160 MHz, first 3 bytes valid 2608 * 3 - index for 320 MHz, first 3 bytes valid 2609 */ 2610 #define WMI_MAX_EHT_SUPP_MCS_2G_SIZE 2 2611 #define WMI_MAX_EHT_SUPP_MCS_5G_SIZE 4 2612 2613 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2614 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 2615 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2 2616 2617 #define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0) 2618 #define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4) 2619 #define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8) 2620 #define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12) 2621 2622 struct wmi_service_ready_ext2_event { 2623 __le32 reg_db_version; 2624 __le32 hw_min_max_tx_power_2ghz; 2625 __le32 hw_min_max_tx_power_5ghz; 2626 __le32 chwidth_num_peer_caps; 2627 __le32 preamble_puncture_bw; 2628 __le32 max_user_per_ppdu_ofdma; 2629 __le32 max_user_per_ppdu_mumimo; 2630 __le32 target_cap_flags; 2631 __le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 2632 __le32 max_num_linkview_peers; 2633 __le32 max_num_msduq_supported_per_tid; 2634 __le32 default_num_msduq_supported_per_tid; 2635 } __packed; 2636 2637 struct ath12k_wmi_caps_ext_params { 2638 __le32 hw_mode_id; 2639 union { 2640 struct { 2641 __le16 pdev_id; 2642 __le16 hw_link_id; 2643 } __packed ath12k_wmi_pdev_to_link_map; 2644 __le32 pdev_id; 2645 }; 2646 __le32 phy_id; 2647 __le32 wireless_modes_ext; 2648 __le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2649 __le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2650 __le32 rsvd0[2]; 2651 __le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2652 __le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2653 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2654 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2655 __le32 eht_cap_info_internal; 2656 __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2G_SIZE]; 2657 __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5G_SIZE]; 2658 } __packed; 2659 2660 /* 2 word representation of MAC addr */ 2661 struct ath12k_wmi_mac_addr_params { 2662 u8 addr[ETH_ALEN]; 2663 u8 padding[2]; 2664 } __packed; 2665 2666 struct ath12k_wmi_dma_ring_caps_params { 2667 __le32 tlv_header; 2668 __le32 pdev_id; 2669 __le32 module_id; 2670 __le32 min_elem; 2671 __le32 min_buf_sz; 2672 __le32 min_buf_align; 2673 } __packed; 2674 2675 struct ath12k_wmi_ready_event_min_params { 2676 struct ath12k_wmi_abi_version_params fw_abi_vers; 2677 struct ath12k_wmi_mac_addr_params mac_addr; 2678 __le32 status; 2679 __le32 num_dscp_table; 2680 __le32 num_extra_mac_addr; 2681 __le32 num_total_peers; 2682 __le32 num_extra_peers; 2683 } __packed; 2684 2685 struct wmi_ready_event { 2686 struct ath12k_wmi_ready_event_min_params ready_event_min; 2687 __le32 max_ast_index; 2688 __le32 pktlog_defs_checksum; 2689 } __packed; 2690 2691 struct wmi_service_available_event { 2692 __le32 wmi_service_segment_offset; 2693 __le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2694 } __packed; 2695 2696 struct ath12k_wmi_vdev_create_arg { 2697 u8 if_id; 2698 u32 type; 2699 u32 subtype; 2700 struct { 2701 u8 tx; 2702 u8 rx; 2703 } chains[NUM_NL80211_BANDS]; 2704 u32 pdev_id; 2705 u8 if_stats_id; 2706 }; 2707 2708 #define ATH12K_MAX_VDEV_STATS_ID 0x30 2709 #define ATH12K_INVAL_VDEV_STATS_ID 0xFF 2710 2711 struct wmi_vdev_create_cmd { 2712 __le32 tlv_header; 2713 __le32 vdev_id; 2714 __le32 vdev_type; 2715 __le32 vdev_subtype; 2716 struct ath12k_wmi_mac_addr_params vdev_macaddr; 2717 __le32 num_cfg_txrx_streams; 2718 __le32 pdev_id; 2719 __le32 vdev_stats_id; 2720 } __packed; 2721 2722 struct ath12k_wmi_vdev_txrx_streams_params { 2723 __le32 tlv_header; 2724 u32 band; 2725 u32 supported_tx_streams; 2726 u32 supported_rx_streams; 2727 } __packed; 2728 2729 struct wmi_vdev_delete_cmd { 2730 __le32 tlv_header; 2731 __le32 vdev_id; 2732 } __packed; 2733 2734 struct wmi_vdev_up_cmd { 2735 __le32 tlv_header; 2736 __le32 vdev_id; 2737 __le32 vdev_assoc_id; 2738 struct ath12k_wmi_mac_addr_params vdev_bssid; 2739 struct ath12k_wmi_mac_addr_params trans_bssid; 2740 __le32 profile_idx; 2741 __le32 profile_num; 2742 } __packed; 2743 2744 struct wmi_vdev_stop_cmd { 2745 __le32 tlv_header; 2746 __le32 vdev_id; 2747 } __packed; 2748 2749 struct wmi_vdev_down_cmd { 2750 __le32 tlv_header; 2751 __le32 vdev_id; 2752 } __packed; 2753 2754 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2755 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2756 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2757 2758 #define ATH12K_WMI_SSID_LEN 32 2759 2760 struct ath12k_wmi_ssid_params { 2761 __le32 ssid_len; 2762 u8 ssid[ATH12K_WMI_SSID_LEN]; 2763 } __packed; 2764 2765 #define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 2766 2767 struct wmi_vdev_start_request_cmd { 2768 __le32 tlv_header; 2769 __le32 vdev_id; 2770 __le32 requestor_id; 2771 __le32 beacon_interval; 2772 __le32 dtim_period; 2773 __le32 flags; 2774 struct ath12k_wmi_ssid_params ssid; 2775 __le32 bcn_tx_rate; 2776 __le32 bcn_txpower; 2777 __le32 num_noa_descriptors; 2778 __le32 disable_hw_ack; 2779 __le32 preferred_tx_streams; 2780 __le32 preferred_rx_streams; 2781 __le32 he_ops; 2782 __le32 cac_duration_ms; 2783 __le32 regdomain; 2784 __le32 min_data_rate; 2785 __le32 mbssid_flags; 2786 __le32 mbssid_tx_vdev_id; 2787 __le32 eht_ops; 2788 __le32 punct_bitmap; 2789 } __packed; 2790 2791 #define MGMT_TX_DL_FRM_LEN 64 2792 2793 struct ath12k_wmi_channel_arg { 2794 u8 chan_id; 2795 u8 pwr; 2796 u32 mhz; 2797 u32 half_rate:1, 2798 quarter_rate:1, 2799 dfs_set:1, 2800 dfs_set_cfreq2:1, 2801 is_chan_passive:1, 2802 allow_ht:1, 2803 allow_vht:1, 2804 allow_he:1, 2805 set_agile:1, 2806 psc_channel:1; 2807 u32 phy_mode; 2808 u32 cfreq1; 2809 u32 cfreq2; 2810 char maxpower; 2811 char minpower; 2812 char maxregpower; 2813 u8 antennamax; 2814 u8 reg_class_id; 2815 }; 2816 2817 enum wmi_phy_mode { 2818 MODE_11A = 0, 2819 MODE_11G = 1, /* 11b/g Mode */ 2820 MODE_11B = 2, /* 11b Mode */ 2821 MODE_11GONLY = 3, /* 11g only Mode */ 2822 MODE_11NA_HT20 = 4, 2823 MODE_11NG_HT20 = 5, 2824 MODE_11NA_HT40 = 6, 2825 MODE_11NG_HT40 = 7, 2826 MODE_11AC_VHT20 = 8, 2827 MODE_11AC_VHT40 = 9, 2828 MODE_11AC_VHT80 = 10, 2829 MODE_11AC_VHT20_2G = 11, 2830 MODE_11AC_VHT40_2G = 12, 2831 MODE_11AC_VHT80_2G = 13, 2832 MODE_11AC_VHT80_80 = 14, 2833 MODE_11AC_VHT160 = 15, 2834 MODE_11AX_HE20 = 16, 2835 MODE_11AX_HE40 = 17, 2836 MODE_11AX_HE80 = 18, 2837 MODE_11AX_HE80_80 = 19, 2838 MODE_11AX_HE160 = 20, 2839 MODE_11AX_HE20_2G = 21, 2840 MODE_11AX_HE40_2G = 22, 2841 MODE_11AX_HE80_2G = 23, 2842 MODE_11BE_EHT20 = 24, 2843 MODE_11BE_EHT40 = 25, 2844 MODE_11BE_EHT80 = 26, 2845 MODE_11BE_EHT80_80 = 27, 2846 MODE_11BE_EHT160 = 28, 2847 MODE_11BE_EHT160_160 = 29, 2848 MODE_11BE_EHT320 = 30, 2849 MODE_11BE_EHT20_2G = 31, 2850 MODE_11BE_EHT40_2G = 32, 2851 MODE_UNKNOWN = 33, 2852 MODE_MAX = 33, 2853 }; 2854 2855 struct wmi_vdev_start_req_arg { 2856 u32 vdev_id; 2857 u32 freq; 2858 u32 band_center_freq1; 2859 u32 band_center_freq2; 2860 bool passive; 2861 bool allow_ibss; 2862 bool allow_ht; 2863 bool allow_vht; 2864 bool ht40plus; 2865 bool chan_radar; 2866 bool freq2_radar; 2867 bool allow_he; 2868 u32 min_power; 2869 u32 max_power; 2870 u32 max_reg_power; 2871 u32 max_antenna_gain; 2872 enum wmi_phy_mode mode; 2873 u32 bcn_intval; 2874 u32 dtim_period; 2875 u8 *ssid; 2876 u32 ssid_len; 2877 u32 bcn_tx_rate; 2878 u32 bcn_tx_power; 2879 bool disable_hw_ack; 2880 bool hidden_ssid; 2881 bool pmf_enabled; 2882 u32 he_ops; 2883 u32 cac_duration_ms; 2884 u32 regdomain; 2885 u32 pref_rx_streams; 2886 u32 pref_tx_streams; 2887 u32 num_noa_descriptors; 2888 u32 min_data_rate; 2889 u32 mbssid_flags; 2890 u32 mbssid_tx_vdev_id; 2891 u32 punct_bitmap; 2892 }; 2893 2894 struct ath12k_wmi_peer_create_arg { 2895 const u8 *peer_addr; 2896 u32 peer_type; 2897 u32 vdev_id; 2898 }; 2899 2900 struct ath12k_wmi_pdev_set_regdomain_arg { 2901 u16 current_rd_in_use; 2902 u16 current_rd_2g; 2903 u16 current_rd_5g; 2904 u32 ctl_2g; 2905 u32 ctl_5g; 2906 u8 dfs_domain; 2907 u32 pdev_id; 2908 }; 2909 2910 struct ath12k_wmi_rx_reorder_queue_remove_arg { 2911 u8 *peer_macaddr; 2912 u16 vdev_id; 2913 u32 peer_tid_bitmap; 2914 }; 2915 2916 #define WMI_HOST_PDEV_ID_SOC 0xFF 2917 #define WMI_HOST_PDEV_ID_0 0 2918 #define WMI_HOST_PDEV_ID_1 1 2919 #define WMI_HOST_PDEV_ID_2 2 2920 2921 #define WMI_PDEV_ID_SOC 0 2922 #define WMI_PDEV_ID_1ST 1 2923 #define WMI_PDEV_ID_2ND 2 2924 #define WMI_PDEV_ID_3RD 3 2925 2926 /* Freq units in MHz */ 2927 #define REG_RULE_START_FREQ 0x0000ffff 2928 #define REG_RULE_END_FREQ 0xffff0000 2929 #define REG_RULE_FLAGS 0x0000ffff 2930 #define REG_RULE_MAX_BW 0x0000ffff 2931 #define REG_RULE_REG_PWR 0x00ff0000 2932 #define REG_RULE_ANT_GAIN 0xff000000 2933 #define REG_RULE_PSD_INFO BIT(2) 2934 #define REG_RULE_PSD_EIRP 0xffff0000 2935 2936 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2937 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2938 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2939 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2940 2941 #define HECAP_PHYDWORD_0 0 2942 #define HECAP_PHYDWORD_1 1 2943 #define HECAP_PHYDWORD_2 2 2944 2945 #define HECAP_PHY_SU_BFER BIT(31) 2946 #define HECAP_PHY_SU_BFEE BIT(0) 2947 #define HECAP_PHY_MU_BFER BIT(1) 2948 #define HECAP_PHY_UL_MUMIMO BIT(22) 2949 #define HECAP_PHY_UL_MUOFDMA BIT(23) 2950 2951 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2952 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_SU_BFER) 2953 2954 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2955 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_SU_BFEE) 2956 2957 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2958 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_MU_BFER) 2959 2960 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2961 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUMIMO) 2962 2963 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2964 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUOFDMA) 2965 2966 #define HE_MODE_SU_TX_BFEE BIT(0) 2967 #define HE_MODE_SU_TX_BFER BIT(1) 2968 #define HE_MODE_MU_TX_BFEE BIT(2) 2969 #define HE_MODE_MU_TX_BFER BIT(3) 2970 #define HE_MODE_DL_OFDMA BIT(4) 2971 #define HE_MODE_UL_OFDMA BIT(5) 2972 #define HE_MODE_UL_MUMIMO BIT(6) 2973 2974 #define HE_DL_MUOFDMA_ENABLE 1 2975 #define HE_UL_MUOFDMA_ENABLE 1 2976 #define HE_DL_MUMIMO_ENABLE 1 2977 #define HE_MU_BFEE_ENABLE 1 2978 #define HE_SU_BFEE_ENABLE 1 2979 2980 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2981 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2982 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2983 2984 /* HE or VHT Sounding */ 2985 #define HE_VHT_SOUNDING_MODE BIT(0) 2986 /* SU or MU Sounding */ 2987 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2988 /* Trig or Non-Trig Sounding */ 2989 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2990 2991 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2992 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2993 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2994 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2995 2996 enum wmi_peer_type { 2997 WMI_PEER_TYPE_DEFAULT = 0, 2998 WMI_PEER_TYPE_BSS = 1, 2999 WMI_PEER_TYPE_TDLS = 2, 3000 }; 3001 3002 struct wmi_peer_create_cmd { 3003 __le32 tlv_header; 3004 __le32 vdev_id; 3005 struct ath12k_wmi_mac_addr_params peer_macaddr; 3006 __le32 peer_type; 3007 } __packed; 3008 3009 struct wmi_peer_delete_cmd { 3010 __le32 tlv_header; 3011 __le32 vdev_id; 3012 struct ath12k_wmi_mac_addr_params peer_macaddr; 3013 } __packed; 3014 3015 struct wmi_peer_reorder_queue_setup_cmd { 3016 __le32 tlv_header; 3017 __le32 vdev_id; 3018 struct ath12k_wmi_mac_addr_params peer_macaddr; 3019 __le32 tid; 3020 __le32 queue_ptr_lo; 3021 __le32 queue_ptr_hi; 3022 __le32 queue_no; 3023 __le32 ba_window_size_valid; 3024 __le32 ba_window_size; 3025 } __packed; 3026 3027 struct wmi_peer_reorder_queue_remove_cmd { 3028 __le32 tlv_header; 3029 __le32 vdev_id; 3030 struct ath12k_wmi_mac_addr_params peer_macaddr; 3031 __le32 tid_mask; 3032 } __packed; 3033 3034 enum wmi_bss_chan_info_req_type { 3035 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3036 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3037 }; 3038 3039 struct wmi_pdev_set_param_cmd { 3040 __le32 tlv_header; 3041 __le32 pdev_id; 3042 __le32 param_id; 3043 __le32 param_value; 3044 } __packed; 3045 3046 struct wmi_pdev_set_ps_mode_cmd { 3047 __le32 tlv_header; 3048 __le32 vdev_id; 3049 __le32 sta_ps_mode; 3050 } __packed; 3051 3052 struct wmi_pdev_suspend_cmd { 3053 __le32 tlv_header; 3054 __le32 pdev_id; 3055 __le32 suspend_opt; 3056 } __packed; 3057 3058 struct wmi_pdev_resume_cmd { 3059 __le32 tlv_header; 3060 __le32 pdev_id; 3061 } __packed; 3062 3063 struct wmi_pdev_bss_chan_info_req_cmd { 3064 __le32 tlv_header; 3065 /* ref wmi_bss_chan_info_req_type */ 3066 __le32 req_type; 3067 } __packed; 3068 3069 struct wmi_ap_ps_peer_cmd { 3070 __le32 tlv_header; 3071 __le32 vdev_id; 3072 struct ath12k_wmi_mac_addr_params peer_macaddr; 3073 __le32 param; 3074 __le32 value; 3075 } __packed; 3076 3077 struct wmi_sta_powersave_param_cmd { 3078 __le32 tlv_header; 3079 __le32 vdev_id; 3080 __le32 param; 3081 __le32 value; 3082 } __packed; 3083 3084 struct wmi_pdev_set_regdomain_cmd { 3085 __le32 tlv_header; 3086 __le32 pdev_id; 3087 __le32 reg_domain; 3088 __le32 reg_domain_2g; 3089 __le32 reg_domain_5g; 3090 __le32 conformance_test_limit_2g; 3091 __le32 conformance_test_limit_5g; 3092 __le32 dfs_domain; 3093 } __packed; 3094 3095 struct wmi_peer_set_param_cmd { 3096 __le32 tlv_header; 3097 __le32 vdev_id; 3098 struct ath12k_wmi_mac_addr_params peer_macaddr; 3099 __le32 param_id; 3100 __le32 param_value; 3101 } __packed; 3102 3103 struct wmi_peer_flush_tids_cmd { 3104 __le32 tlv_header; 3105 __le32 vdev_id; 3106 struct ath12k_wmi_mac_addr_params peer_macaddr; 3107 __le32 peer_tid_bitmap; 3108 } __packed; 3109 3110 struct wmi_dfs_phyerr_offload_cmd { 3111 __le32 tlv_header; 3112 __le32 pdev_id; 3113 } __packed; 3114 3115 struct wmi_bcn_offload_ctrl_cmd { 3116 __le32 tlv_header; 3117 __le32 vdev_id; 3118 __le32 bcn_ctrl_op; 3119 } __packed; 3120 3121 enum scan_dwelltime_adaptive_mode { 3122 SCAN_DWELL_MODE_DEFAULT = 0, 3123 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3124 SCAN_DWELL_MODE_MODERATE = 2, 3125 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3126 SCAN_DWELL_MODE_STATIC = 4 3127 }; 3128 3129 #define WLAN_SCAN_MAX_NUM_SSID 10 3130 #define WLAN_SCAN_MAX_NUM_BSSID 10 3131 3132 struct ath12k_wmi_element_info_arg { 3133 u32 len; 3134 u8 *ptr; 3135 }; 3136 3137 #define WMI_IE_BITMAP_SIZE 8 3138 3139 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3140 /* prefix used by scan requestor ids on the host */ 3141 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3142 3143 /* prefix used by scan request ids generated on the host */ 3144 /* host cycles through the lower 12 bits to generate ids */ 3145 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3146 3147 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3148 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3149 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 3150 3151 /* Values lower than this may be refused by some firmware revisions with a scan 3152 * completion with a timedout reason. 3153 */ 3154 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3155 3156 /* Scan priority numbers must be sequential, starting with 0 */ 3157 enum wmi_scan_priority { 3158 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3159 WMI_SCAN_PRIORITY_LOW, 3160 WMI_SCAN_PRIORITY_MEDIUM, 3161 WMI_SCAN_PRIORITY_HIGH, 3162 WMI_SCAN_PRIORITY_VERY_HIGH, 3163 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3164 }; 3165 3166 enum wmi_scan_event_type { 3167 WMI_SCAN_EVENT_STARTED = BIT(0), 3168 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3169 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3170 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3171 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3172 /* possibly by high-prio scan */ 3173 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3174 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3175 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3176 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3177 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3178 WMI_SCAN_EVENT_RESUMED = BIT(10), 3179 WMI_SCAN_EVENT_MAX = BIT(15), 3180 }; 3181 3182 enum wmi_scan_completion_reason { 3183 WMI_SCAN_REASON_COMPLETED, 3184 WMI_SCAN_REASON_CANCELLED, 3185 WMI_SCAN_REASON_PREEMPTED, 3186 WMI_SCAN_REASON_TIMEDOUT, 3187 WMI_SCAN_REASON_INTERNAL_FAILURE, 3188 WMI_SCAN_REASON_MAX, 3189 }; 3190 3191 struct wmi_start_scan_cmd { 3192 __le32 tlv_header; 3193 __le32 scan_id; 3194 __le32 scan_req_id; 3195 __le32 vdev_id; 3196 __le32 scan_priority; 3197 __le32 notify_scan_events; 3198 __le32 dwell_time_active; 3199 __le32 dwell_time_passive; 3200 __le32 min_rest_time; 3201 __le32 max_rest_time; 3202 __le32 repeat_probe_time; 3203 __le32 probe_spacing_time; 3204 __le32 idle_time; 3205 __le32 max_scan_time; 3206 __le32 probe_delay; 3207 __le32 scan_ctrl_flags; 3208 __le32 burst_duration; 3209 __le32 num_chan; 3210 __le32 num_bssid; 3211 __le32 num_ssids; 3212 __le32 ie_len; 3213 __le32 n_probes; 3214 struct ath12k_wmi_mac_addr_params mac_addr; 3215 struct ath12k_wmi_mac_addr_params mac_mask; 3216 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3217 __le32 num_vendor_oui; 3218 __le32 scan_ctrl_flags_ext; 3219 __le32 dwell_time_active_2g; 3220 __le32 dwell_time_active_6g; 3221 __le32 dwell_time_passive_6g; 3222 __le32 scan_start_offset; 3223 } __packed; 3224 3225 #define WMI_SCAN_FLAG_PASSIVE 0x1 3226 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3227 #define WMI_SCAN_ADD_CCK_RATES 0x4 3228 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3229 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3230 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3231 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3232 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3233 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3234 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3235 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3236 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3237 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3238 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3239 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3240 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3241 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3242 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3243 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3244 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3245 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3246 3247 #define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21) 3248 3249 enum { 3250 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3251 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3252 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3253 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3254 WMI_SCAN_DWELL_MODE_STATIC = 4, 3255 }; 3256 3257 struct ath12k_wmi_hint_short_ssid_arg { 3258 u32 freq_flags; 3259 u32 short_ssid; 3260 }; 3261 3262 struct ath12k_wmi_hint_bssid_arg { 3263 u32 freq_flags; 3264 struct ath12k_wmi_mac_addr_params bssid; 3265 }; 3266 3267 struct ath12k_wmi_scan_req_arg { 3268 u32 scan_id; 3269 u32 scan_req_id; 3270 u32 vdev_id; 3271 u32 pdev_id; 3272 enum wmi_scan_priority scan_priority; 3273 union { 3274 struct { 3275 u32 scan_ev_started:1, 3276 scan_ev_completed:1, 3277 scan_ev_bss_chan:1, 3278 scan_ev_foreign_chan:1, 3279 scan_ev_dequeued:1, 3280 scan_ev_preempted:1, 3281 scan_ev_start_failed:1, 3282 scan_ev_restarted:1, 3283 scan_ev_foreign_chn_exit:1, 3284 scan_ev_invalid:1, 3285 scan_ev_gpio_timeout:1, 3286 scan_ev_suspended:1, 3287 scan_ev_resumed:1; 3288 }; 3289 u32 scan_events; 3290 }; 3291 u32 dwell_time_active; 3292 u32 dwell_time_active_2g; 3293 u32 dwell_time_passive; 3294 u32 dwell_time_active_6g; 3295 u32 dwell_time_passive_6g; 3296 u32 min_rest_time; 3297 u32 max_rest_time; 3298 u32 repeat_probe_time; 3299 u32 probe_spacing_time; 3300 u32 idle_time; 3301 u32 max_scan_time; 3302 u32 probe_delay; 3303 union { 3304 struct { 3305 u32 scan_f_passive:1, 3306 scan_f_bcast_probe:1, 3307 scan_f_cck_rates:1, 3308 scan_f_ofdm_rates:1, 3309 scan_f_chan_stat_evnt:1, 3310 scan_f_filter_prb_req:1, 3311 scan_f_bypass_dfs_chn:1, 3312 scan_f_continue_on_err:1, 3313 scan_f_offchan_mgmt_tx:1, 3314 scan_f_offchan_data_tx:1, 3315 scan_f_promisc_mode:1, 3316 scan_f_capture_phy_err:1, 3317 scan_f_strict_passive_pch:1, 3318 scan_f_half_rate:1, 3319 scan_f_quarter_rate:1, 3320 scan_f_force_active_dfs_chn:1, 3321 scan_f_add_tpc_ie_in_probe:1, 3322 scan_f_add_ds_ie_in_probe:1, 3323 scan_f_add_spoofed_mac_in_probe:1, 3324 scan_f_add_rand_seq_in_probe:1, 3325 scan_f_en_ie_whitelist_in_probe:1, 3326 scan_f_forced:1, 3327 scan_f_2ghz:1, 3328 scan_f_5ghz:1, 3329 scan_f_80mhz:1; 3330 }; 3331 u32 scan_flags; 3332 }; 3333 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3334 u32 burst_duration; 3335 u32 num_chan; 3336 u32 num_bssid; 3337 u32 num_ssids; 3338 u32 n_probes; 3339 u32 *chan_list; 3340 u32 notify_scan_events; 3341 struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3342 struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3343 struct ath12k_wmi_element_info_arg extraie; 3344 u32 num_hint_s_ssid; 3345 u32 num_hint_bssid; 3346 struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3347 struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3348 }; 3349 3350 struct wmi_ssid_arg { 3351 int len; 3352 const u8 *ssid; 3353 }; 3354 3355 struct wmi_bssid_arg { 3356 const u8 *bssid; 3357 }; 3358 3359 struct wmi_start_scan_arg { 3360 u32 scan_id; 3361 u32 scan_req_id; 3362 u32 vdev_id; 3363 u32 scan_priority; 3364 u32 notify_scan_events; 3365 u32 dwell_time_active; 3366 u32 dwell_time_passive; 3367 u32 min_rest_time; 3368 u32 max_rest_time; 3369 u32 repeat_probe_time; 3370 u32 probe_spacing_time; 3371 u32 idle_time; 3372 u32 max_scan_time; 3373 u32 probe_delay; 3374 u32 scan_ctrl_flags; 3375 3376 u32 ie_len; 3377 u32 n_channels; 3378 u32 n_ssids; 3379 u32 n_bssids; 3380 3381 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3382 u32 channels[64]; 3383 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3384 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3385 }; 3386 3387 #define WMI_SCAN_STOP_ONE 0x00000000 3388 #define WMI_SCAN_STOP_VAP_ALL 0x01000000 3389 #define WMI_SCAN_STOP_ALL 0x04000000 3390 3391 /* Prefix 0xA000 indicates that the scan request 3392 * is trigger by HOST 3393 */ 3394 #define ATH12K_SCAN_ID 0xA000 3395 3396 enum scan_cancel_req_type { 3397 WLAN_SCAN_CANCEL_SINGLE = 1, 3398 WLAN_SCAN_CANCEL_VDEV_ALL, 3399 WLAN_SCAN_CANCEL_PDEV_ALL, 3400 }; 3401 3402 struct ath12k_wmi_scan_cancel_arg { 3403 u32 requester; 3404 u32 scan_id; 3405 enum scan_cancel_req_type req_type; 3406 u32 vdev_id; 3407 u32 pdev_id; 3408 }; 3409 3410 struct wmi_bcn_send_from_host_cmd { 3411 __le32 tlv_header; 3412 __le32 vdev_id; 3413 __le32 data_len; 3414 union { 3415 __le32 frag_ptr; 3416 __le32 frag_ptr_lo; 3417 }; 3418 __le32 frame_ctrl; 3419 __le32 dtim_flag; 3420 __le32 bcn_antenna; 3421 __le32 frag_ptr_hi; 3422 }; 3423 3424 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3425 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3426 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3427 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3428 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3429 #define WMI_CHAN_INFO_DFS BIT(10) 3430 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3431 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3432 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3433 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3434 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3435 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3436 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3437 #define WMI_CHAN_INFO_PSC BIT(18) 3438 3439 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3440 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3441 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3442 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3443 3444 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3445 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3446 3447 struct ath12k_wmi_channel_params { 3448 __le32 tlv_header; 3449 __le32 mhz; 3450 __le32 band_center_freq1; 3451 __le32 band_center_freq2; 3452 __le32 info; 3453 __le32 reg_info_1; 3454 __le32 reg_info_2; 3455 } __packed; 3456 3457 enum wmi_sta_ps_mode { 3458 WMI_STA_PS_MODE_DISABLED = 0, 3459 WMI_STA_PS_MODE_ENABLED = 1, 3460 }; 3461 3462 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3463 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3464 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3465 3466 #define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1 3467 #define ATH12K_WMI_FW_HANG_DELAY 0 3468 3469 /* type, 0:unused 1: ASSERT 2: not respond detect command 3470 * delay_time_ms, the simulate will delay time 3471 */ 3472 3473 struct wmi_force_fw_hang_cmd { 3474 __le32 tlv_header; 3475 __le32 type; 3476 __le32 delay_time_ms; 3477 } __packed; 3478 3479 struct wmi_vdev_set_param_cmd { 3480 __le32 tlv_header; 3481 __le32 vdev_id; 3482 __le32 param_id; 3483 __le32 param_value; 3484 } __packed; 3485 3486 struct wmi_get_pdev_temperature_cmd { 3487 __le32 tlv_header; 3488 __le32 param; 3489 __le32 pdev_id; 3490 } __packed; 3491 3492 #define WMI_BEACON_TX_BUFFER_SIZE 512 3493 3494 struct wmi_bcn_tmpl_cmd { 3495 __le32 tlv_header; 3496 __le32 vdev_id; 3497 __le32 tim_ie_offset; 3498 __le32 buf_len; 3499 __le32 csa_switch_count_offset; 3500 __le32 ext_csa_switch_count_offset; 3501 __le32 csa_event_bitmap; 3502 __le32 mbssid_ie_offset; 3503 __le32 esp_ie_offset; 3504 } __packed; 3505 3506 struct wmi_vdev_install_key_cmd { 3507 __le32 tlv_header; 3508 __le32 vdev_id; 3509 struct ath12k_wmi_mac_addr_params peer_macaddr; 3510 __le32 key_idx; 3511 __le32 key_flags; 3512 __le32 key_cipher; 3513 __le64 key_rsc_counter; 3514 __le64 key_global_rsc_counter; 3515 __le64 key_tsc_counter; 3516 u8 wpi_key_rsc_counter[16]; 3517 u8 wpi_key_tsc_counter[16]; 3518 __le32 key_len; 3519 __le32 key_txmic_len; 3520 __le32 key_rxmic_len; 3521 __le32 is_group_key_id_valid; 3522 __le32 group_key_id; 3523 3524 /* Followed by key_data containing key followed by 3525 * tx mic and then rx mic 3526 */ 3527 } __packed; 3528 3529 struct wmi_vdev_install_key_arg { 3530 u32 vdev_id; 3531 const u8 *macaddr; 3532 u32 key_idx; 3533 u32 key_flags; 3534 u32 key_cipher; 3535 u32 key_len; 3536 u32 key_txmic_len; 3537 u32 key_rxmic_len; 3538 u64 key_rsc_counter; 3539 const void *key_data; 3540 }; 3541 3542 #define WMI_MAX_SUPPORTED_RATES 128 3543 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3544 #define WMI_HOST_MAX_HE_RATE_SET 3 3545 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3546 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3547 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3548 3549 struct wmi_rate_set_arg { 3550 u32 num_rates; 3551 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3552 }; 3553 3554 struct ath12k_wmi_peer_assoc_arg { 3555 u32 vdev_id; 3556 u32 peer_new_assoc; 3557 u32 peer_associd; 3558 u32 peer_flags; 3559 u32 peer_caps; 3560 u32 peer_listen_intval; 3561 u32 peer_ht_caps; 3562 u32 peer_max_mpdu; 3563 u32 peer_mpdu_density; 3564 u32 peer_rate_caps; 3565 u32 peer_nss; 3566 u32 peer_vht_caps; 3567 u32 peer_phymode; 3568 u32 peer_ht_info[2]; 3569 struct wmi_rate_set_arg peer_legacy_rates; 3570 struct wmi_rate_set_arg peer_ht_rates; 3571 u32 rx_max_rate; 3572 u32 rx_mcs_set; 3573 u32 tx_max_rate; 3574 u32 tx_mcs_set; 3575 u8 vht_capable; 3576 u8 min_data_rate; 3577 u32 tx_max_mcs_nss; 3578 u32 peer_bw_rxnss_override; 3579 bool is_pmf_enabled; 3580 bool is_wme_set; 3581 bool qos_flag; 3582 bool apsd_flag; 3583 bool ht_flag; 3584 bool bw_40; 3585 bool bw_80; 3586 bool bw_160; 3587 bool bw_320; 3588 bool stbc_flag; 3589 bool ldpc_flag; 3590 bool static_mimops_flag; 3591 bool dynamic_mimops_flag; 3592 bool spatial_mux_flag; 3593 bool vht_flag; 3594 bool vht_ng_flag; 3595 bool need_ptk_4_way; 3596 bool need_gtk_2_way; 3597 bool auth_flag; 3598 bool safe_mode_enabled; 3599 bool amsdu_disable; 3600 /* Use common structure */ 3601 u8 peer_mac[ETH_ALEN]; 3602 3603 bool he_flag; 3604 u32 peer_he_cap_macinfo[2]; 3605 u32 peer_he_cap_macinfo_internal; 3606 u32 peer_he_caps_6ghz; 3607 u32 peer_he_ops; 3608 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3609 u32 peer_he_mcs_count; 3610 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3611 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3612 bool twt_responder; 3613 bool twt_requester; 3614 struct ath12k_wmi_ppe_threshold_arg peer_ppet; 3615 bool eht_flag; 3616 u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3617 u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3618 u32 peer_eht_mcs_count; 3619 u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3620 u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3621 struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet; 3622 u32 punct_bitmap; 3623 }; 3624 3625 struct wmi_peer_assoc_complete_cmd { 3626 __le32 tlv_header; 3627 struct ath12k_wmi_mac_addr_params peer_macaddr; 3628 __le32 vdev_id; 3629 __le32 peer_new_assoc; 3630 __le32 peer_associd; 3631 __le32 peer_flags; 3632 __le32 peer_caps; 3633 __le32 peer_listen_intval; 3634 __le32 peer_ht_caps; 3635 __le32 peer_max_mpdu; 3636 __le32 peer_mpdu_density; 3637 __le32 peer_rate_caps; 3638 __le32 peer_nss; 3639 __le32 peer_vht_caps; 3640 __le32 peer_phymode; 3641 __le32 peer_ht_info[2]; 3642 __le32 num_peer_legacy_rates; 3643 __le32 num_peer_ht_rates; 3644 __le32 peer_bw_rxnss_override; 3645 struct ath12k_wmi_ppe_threshold_params peer_ppet; 3646 __le32 peer_he_cap_info; 3647 __le32 peer_he_ops; 3648 __le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3649 __le32 peer_he_mcs; 3650 __le32 peer_he_cap_info_ext; 3651 __le32 peer_he_cap_info_internal; 3652 __le32 min_data_rate; 3653 __le32 peer_he_caps_6ghz; 3654 __le32 sta_type; 3655 __le32 bss_max_idle_option; 3656 __le32 auth_mode; 3657 __le32 peer_flags_ext; 3658 __le32 punct_bitmap; 3659 __le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3660 __le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3661 __le32 peer_eht_ops; 3662 struct ath12k_wmi_ppe_threshold_params peer_eht_ppet; 3663 } __packed; 3664 3665 struct wmi_stop_scan_cmd { 3666 __le32 tlv_header; 3667 __le32 requestor; 3668 __le32 scan_id; 3669 __le32 req_type; 3670 __le32 vdev_id; 3671 __le32 pdev_id; 3672 } __packed; 3673 3674 struct ath12k_wmi_scan_chan_list_arg { 3675 u32 pdev_id; 3676 u16 nallchans; 3677 struct ath12k_wmi_channel_arg channel[]; 3678 }; 3679 3680 struct wmi_scan_chan_list_cmd { 3681 __le32 tlv_header; 3682 __le32 num_scan_chans; 3683 __le32 flags; 3684 __le32 pdev_id; 3685 } __packed; 3686 3687 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3688 3689 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3690 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3691 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3692 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3693 3694 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3695 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3696 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3697 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3698 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3699 3700 struct wmi_mgmt_send_cmd { 3701 __le32 tlv_header; 3702 __le32 vdev_id; 3703 __le32 desc_id; 3704 __le32 chanfreq; 3705 __le32 paddr_lo; 3706 __le32 paddr_hi; 3707 __le32 frame_len; 3708 __le32 buf_len; 3709 __le32 tx_params_valid; 3710 3711 /* This TLV is followed by struct wmi_mgmt_frame */ 3712 3713 /* Followed by struct wmi_mgmt_send_params */ 3714 } __packed; 3715 3716 struct wmi_sta_powersave_mode_cmd { 3717 __le32 tlv_header; 3718 __le32 vdev_id; 3719 __le32 sta_ps_mode; 3720 } __packed; 3721 3722 struct wmi_sta_smps_force_mode_cmd { 3723 __le32 tlv_header; 3724 __le32 vdev_id; 3725 __le32 forced_mode; 3726 } __packed; 3727 3728 struct wmi_sta_smps_param_cmd { 3729 __le32 tlv_header; 3730 __le32 vdev_id; 3731 __le32 param; 3732 __le32 value; 3733 } __packed; 3734 3735 struct ath12k_wmi_bcn_prb_info_params { 3736 __le32 tlv_header; 3737 __le32 caps; 3738 __le32 erp; 3739 } __packed; 3740 3741 enum { 3742 WMI_PDEV_SUSPEND, 3743 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3744 }; 3745 3746 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3747 __le32 tlv_header; 3748 __le32 pdev_id; 3749 __le32 enable; 3750 } __packed; 3751 3752 struct ath12k_wmi_ap_ps_arg { 3753 u32 vdev_id; 3754 u32 param; 3755 u32 value; 3756 }; 3757 3758 enum set_init_cc_type { 3759 WMI_COUNTRY_INFO_TYPE_ALPHA, 3760 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3761 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3762 }; 3763 3764 enum set_init_cc_flags { 3765 INVALID_CC, 3766 CC_IS_SET, 3767 REGDMN_IS_SET, 3768 ALPHA_IS_SET, 3769 }; 3770 3771 struct ath12k_wmi_init_country_arg { 3772 union { 3773 u16 country_code; 3774 u16 regdom_id; 3775 u8 alpha2[3]; 3776 } cc_info; 3777 enum set_init_cc_flags flags; 3778 }; 3779 3780 struct wmi_init_country_cmd { 3781 __le32 tlv_header; 3782 __le32 pdev_id; 3783 __le32 init_cc_type; 3784 union { 3785 __le32 country_code; 3786 __le32 regdom_id; 3787 __le32 alpha2; 3788 } cc_info; 3789 } __packed; 3790 3791 struct wmi_delba_send_cmd { 3792 __le32 tlv_header; 3793 __le32 vdev_id; 3794 struct ath12k_wmi_mac_addr_params peer_macaddr; 3795 __le32 tid; 3796 __le32 initiator; 3797 __le32 reasoncode; 3798 } __packed; 3799 3800 struct wmi_addba_setresponse_cmd { 3801 __le32 tlv_header; 3802 __le32 vdev_id; 3803 struct ath12k_wmi_mac_addr_params peer_macaddr; 3804 __le32 tid; 3805 __le32 statuscode; 3806 } __packed; 3807 3808 struct wmi_addba_send_cmd { 3809 __le32 tlv_header; 3810 __le32 vdev_id; 3811 struct ath12k_wmi_mac_addr_params peer_macaddr; 3812 __le32 tid; 3813 __le32 buffersize; 3814 } __packed; 3815 3816 struct wmi_addba_clear_resp_cmd { 3817 __le32 tlv_header; 3818 __le32 vdev_id; 3819 struct ath12k_wmi_mac_addr_params peer_macaddr; 3820 } __packed; 3821 3822 #define DFS_PHYERR_UNIT_TEST_CMD 0 3823 #define DFS_UNIT_TEST_MODULE 0x2b 3824 #define DFS_UNIT_TEST_TOKEN 0xAA 3825 3826 enum dfs_test_args_idx { 3827 DFS_TEST_CMDID = 0, 3828 DFS_TEST_PDEV_ID, 3829 DFS_TEST_RADAR_PARAM, 3830 DFS_MAX_TEST_ARGS, 3831 }; 3832 3833 struct wmi_dfs_unit_test_arg { 3834 u32 cmd_id; 3835 u32 pdev_id; 3836 u32 radar_param; 3837 }; 3838 3839 struct wmi_unit_test_cmd { 3840 __le32 tlv_header; 3841 __le32 vdev_id; 3842 __le32 module_id; 3843 __le32 num_args; 3844 __le32 diag_token; 3845 /* Followed by test args*/ 3846 } __packed; 3847 3848 #define MAX_SUPPORTED_RATES 128 3849 3850 struct ath12k_wmi_vht_rate_set_params { 3851 __le32 tlv_header; 3852 __le32 rx_max_rate; 3853 __le32 rx_mcs_set; 3854 __le32 tx_max_rate; 3855 __le32 tx_mcs_set; 3856 __le32 tx_max_mcs_nss; 3857 } __packed; 3858 3859 struct ath12k_wmi_he_rate_set_params { 3860 __le32 tlv_header; 3861 __le32 rx_mcs_set; 3862 __le32 tx_mcs_set; 3863 } __packed; 3864 3865 struct ath12k_wmi_eht_rate_set_params { 3866 __le32 tlv_header; 3867 __le32 rx_mcs_set; 3868 __le32 tx_mcs_set; 3869 } __packed; 3870 3871 #define MAX_REG_RULES 10 3872 #define REG_ALPHA2_LEN 2 3873 #define MAX_6G_REG_RULES 5 3874 #define REG_US_5G_NUM_REG_RULES 4 3875 3876 enum wmi_start_event_param { 3877 WMI_VDEV_START_RESP_EVENT = 0, 3878 WMI_VDEV_RESTART_RESP_EVENT, 3879 }; 3880 3881 struct wmi_vdev_start_resp_event { 3882 __le32 vdev_id; 3883 __le32 requestor_id; 3884 /* enum wmi_start_event_param */ 3885 __le32 resp_type; 3886 __le32 status; 3887 __le32 chain_mask; 3888 __le32 smps_mode; 3889 union { 3890 __le32 mac_id; 3891 __le32 pdev_id; 3892 }; 3893 __le32 cfgd_tx_streams; 3894 __le32 cfgd_rx_streams; 3895 } __packed; 3896 3897 /* VDEV start response status codes */ 3898 enum wmi_vdev_start_resp_status_code { 3899 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 3900 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 3901 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 3902 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 3903 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 3904 }; 3905 3906 enum wmi_reg_6g_ap_type { 3907 WMI_REG_INDOOR_AP = 0, 3908 WMI_REG_STD_POWER_AP = 1, 3909 WMI_REG_VLP_AP = 2, 3910 WMI_REG_CURRENT_MAX_AP_TYPE, 3911 WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP, 3912 WMI_REG_MAX_AP_TYPE = 7, 3913 }; 3914 3915 enum wmi_reg_6g_client_type { 3916 WMI_REG_DEFAULT_CLIENT = 0, 3917 WMI_REG_SUBORDINATE_CLIENT = 1, 3918 WMI_REG_MAX_CLIENT_TYPE = 2, 3919 }; 3920 3921 /* Regulatory Rule Flags Passed by FW */ 3922 #define REGULATORY_CHAN_DISABLED BIT(0) 3923 #define REGULATORY_CHAN_NO_IR BIT(1) 3924 #define REGULATORY_CHAN_RADAR BIT(3) 3925 #define REGULATORY_CHAN_NO_OFDM BIT(6) 3926 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 3927 3928 #define REGULATORY_CHAN_NO_HT40 BIT(4) 3929 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 3930 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 3931 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 3932 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 3933 3934 enum { 3935 WMI_REG_SET_CC_STATUS_PASS = 0, 3936 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3937 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 3938 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3939 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 3940 WMI_REG_SET_CC_STATUS_FAIL = 5, 3941 }; 3942 3943 #define WMI_REG_CLIENT_MAX 4 3944 3945 struct wmi_reg_chan_list_cc_ext_event { 3946 __le32 status_code; 3947 __le32 phy_id; 3948 __le32 alpha2; 3949 __le32 num_phy; 3950 __le32 country_id; 3951 __le32 domain_code; 3952 __le32 dfs_region; 3953 __le32 phybitmap; 3954 __le32 min_bw_2g; 3955 __le32 max_bw_2g; 3956 __le32 min_bw_5g; 3957 __le32 max_bw_5g; 3958 __le32 num_2g_reg_rules; 3959 __le32 num_5g_reg_rules; 3960 __le32 client_type; 3961 __le32 rnr_tpe_usable; 3962 __le32 unspecified_ap_usable; 3963 __le32 domain_code_6g_ap_lpi; 3964 __le32 domain_code_6g_ap_sp; 3965 __le32 domain_code_6g_ap_vlp; 3966 __le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX]; 3967 __le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX]; 3968 __le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX]; 3969 __le32 domain_code_6g_super_id; 3970 __le32 min_bw_6g_ap_sp; 3971 __le32 max_bw_6g_ap_sp; 3972 __le32 min_bw_6g_ap_lpi; 3973 __le32 max_bw_6g_ap_lpi; 3974 __le32 min_bw_6g_ap_vlp; 3975 __le32 max_bw_6g_ap_vlp; 3976 __le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 3977 __le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 3978 __le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 3979 __le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 3980 __le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 3981 __le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 3982 __le32 num_6g_reg_rules_ap_sp; 3983 __le32 num_6g_reg_rules_ap_lpi; 3984 __le32 num_6g_reg_rules_ap_vlp; 3985 __le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX]; 3986 __le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX]; 3987 __le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX]; 3988 } __packed; 3989 3990 struct ath12k_wmi_reg_rule_ext_params { 3991 __le32 tlv_header; 3992 __le32 freq_info; 3993 __le32 bw_pwr_info; 3994 __le32 flag_info; 3995 __le32 psd_power_info; 3996 } __packed; 3997 3998 struct wmi_vdev_delete_resp_event { 3999 __le32 vdev_id; 4000 } __packed; 4001 4002 struct wmi_peer_delete_resp_event { 4003 __le32 vdev_id; 4004 struct ath12k_wmi_mac_addr_params peer_macaddr; 4005 } __packed; 4006 4007 struct wmi_bcn_tx_status_event { 4008 __le32 vdev_id; 4009 __le32 tx_status; 4010 } __packed; 4011 4012 struct wmi_vdev_stopped_event { 4013 __le32 vdev_id; 4014 } __packed; 4015 4016 struct wmi_pdev_bss_chan_info_event { 4017 __le32 pdev_id; 4018 __le32 freq; /* Units in MHz */ 4019 __le32 noise_floor; /* units are dBm */ 4020 /* rx clear - how often the channel was unused */ 4021 __le32 rx_clear_count_low; 4022 __le32 rx_clear_count_high; 4023 /* cycle count - elapsed time during measured period, in clock ticks */ 4024 __le32 cycle_count_low; 4025 __le32 cycle_count_high; 4026 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4027 __le32 tx_cycle_count_low; 4028 __le32 tx_cycle_count_high; 4029 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4030 __le32 rx_cycle_count_low; 4031 __le32 rx_cycle_count_high; 4032 /*rx_cycle cnt for my bss in 64bits format */ 4033 __le32 rx_bss_cycle_count_low; 4034 __le32 rx_bss_cycle_count_high; 4035 } __packed; 4036 4037 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4038 4039 struct wmi_vdev_install_key_compl_event { 4040 __le32 vdev_id; 4041 struct ath12k_wmi_mac_addr_params peer_macaddr; 4042 __le32 key_idx; 4043 __le32 key_flags; 4044 __le32 status; 4045 } __packed; 4046 4047 struct wmi_vdev_install_key_complete_arg { 4048 u32 vdev_id; 4049 const u8 *macaddr; 4050 u32 key_idx; 4051 u32 key_flags; 4052 u32 status; 4053 }; 4054 4055 struct wmi_peer_assoc_conf_event { 4056 __le32 vdev_id; 4057 struct ath12k_wmi_mac_addr_params peer_macaddr; 4058 } __packed; 4059 4060 struct wmi_peer_assoc_conf_arg { 4061 u32 vdev_id; 4062 const u8 *macaddr; 4063 }; 4064 4065 struct wmi_fils_discovery_event { 4066 __le32 vdev_id; 4067 __le32 fils_tt; 4068 __le32 tbtt; 4069 } __packed; 4070 4071 struct wmi_probe_resp_tx_status_event { 4072 __le32 vdev_id; 4073 __le32 tx_status; 4074 } __packed; 4075 4076 struct wmi_pdev_ctl_failsafe_chk_event { 4077 __le32 pdev_id; 4078 __le32 ctl_failsafe_status; 4079 } __packed; 4080 4081 struct ath12k_wmi_pdev_csa_event { 4082 __le32 pdev_id; 4083 __le32 current_switch_count; 4084 __le32 num_vdevs; 4085 } __packed; 4086 4087 struct ath12k_wmi_pdev_radar_event { 4088 __le32 pdev_id; 4089 __le32 detection_mode; 4090 __le32 chan_freq; 4091 __le32 chan_width; 4092 __le32 detector_id; 4093 __le32 segment_id; 4094 __le32 timestamp; 4095 __le32 is_chirp; 4096 a_sle32 freq_offset; 4097 a_sle32 sidx; 4098 } __packed; 4099 4100 struct wmi_pdev_temperature_event { 4101 /* temperature value in Celsius degree */ 4102 a_sle32 temp; 4103 __le32 pdev_id; 4104 } __packed; 4105 4106 #define WMI_RX_STATUS_OK 0x00 4107 #define WMI_RX_STATUS_ERR_CRC 0x01 4108 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4109 #define WMI_RX_STATUS_ERR_MIC 0x10 4110 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4111 4112 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4113 4114 struct ath12k_wmi_mgmt_rx_arg { 4115 u32 chan_freq; 4116 u32 channel; 4117 u32 snr; 4118 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4119 u32 rate; 4120 enum wmi_phy_mode phy_mode; 4121 u32 buf_len; 4122 int status; 4123 u32 flags; 4124 int rssi; 4125 u32 tsf_delta; 4126 u8 pdev_id; 4127 }; 4128 4129 #define ATH_MAX_ANTENNA 4 4130 4131 struct ath12k_wmi_mgmt_rx_params { 4132 __le32 channel; 4133 __le32 snr; 4134 __le32 rate; 4135 __le32 phy_mode; 4136 __le32 buf_len; 4137 __le32 status; 4138 __le32 rssi_ctl[ATH_MAX_ANTENNA]; 4139 __le32 flags; 4140 a_sle32 rssi; 4141 __le32 tsf_delta; 4142 __le32 rx_tsf_l32; 4143 __le32 rx_tsf_u32; 4144 __le32 pdev_id; 4145 __le32 chan_freq; 4146 } __packed; 4147 4148 #define MAX_ANTENNA_EIGHT 8 4149 4150 struct wmi_mgmt_tx_compl_event { 4151 __le32 desc_id; 4152 __le32 status; 4153 __le32 pdev_id; 4154 } __packed; 4155 4156 struct wmi_scan_event { 4157 __le32 event_type; /* %WMI_SCAN_EVENT_ */ 4158 __le32 reason; /* %WMI_SCAN_REASON_ */ 4159 __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4160 __le32 scan_req_id; 4161 __le32 scan_id; 4162 __le32 vdev_id; 4163 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4164 * In case of AP it is TSF of the AP vdev 4165 * In case of STA connected state, this is the TSF of the AP 4166 * In case of STA not connected, it will be the free running HW timer 4167 */ 4168 __le32 tsf_timestamp; 4169 } __packed; 4170 4171 struct wmi_peer_sta_kickout_arg { 4172 const u8 *mac_addr; 4173 }; 4174 4175 struct wmi_peer_sta_kickout_event { 4176 struct ath12k_wmi_mac_addr_params peer_macaddr; 4177 } __packed; 4178 4179 enum wmi_roam_reason { 4180 WMI_ROAM_REASON_BETTER_AP = 1, 4181 WMI_ROAM_REASON_BEACON_MISS = 2, 4182 WMI_ROAM_REASON_LOW_RSSI = 3, 4183 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4184 WMI_ROAM_REASON_HO_FAILED = 5, 4185 4186 /* keep last */ 4187 WMI_ROAM_REASON_MAX, 4188 }; 4189 4190 struct wmi_roam_event { 4191 __le32 vdev_id; 4192 __le32 reason; 4193 __le32 rssi; 4194 } __packed; 4195 4196 #define WMI_CHAN_INFO_START_RESP 0 4197 #define WMI_CHAN_INFO_END_RESP 1 4198 4199 struct wmi_chan_info_event { 4200 __le32 err_code; 4201 __le32 freq; 4202 __le32 cmd_flags; 4203 __le32 noise_floor; 4204 __le32 rx_clear_count; 4205 __le32 cycle_count; 4206 __le32 chan_tx_pwr_range; 4207 __le32 chan_tx_pwr_tp; 4208 __le32 rx_frame_count; 4209 __le32 my_bss_rx_cycle_count; 4210 __le32 rx_11b_mode_data_duration; 4211 __le32 tx_frame_cnt; 4212 __le32 mac_clk_mhz; 4213 __le32 vdev_id; 4214 } __packed; 4215 4216 struct ath12k_wmi_target_cap_arg { 4217 u32 phy_capability; 4218 u32 max_frag_entry; 4219 u32 num_rf_chains; 4220 u32 ht_cap_info; 4221 u32 vht_cap_info; 4222 u32 vht_supp_mcs; 4223 u32 hw_min_tx_power; 4224 u32 hw_max_tx_power; 4225 u32 sys_cap_info; 4226 u32 min_pkt_size_enable; 4227 u32 max_bcn_ie_size; 4228 u32 max_num_scan_channels; 4229 u32 max_supported_macs; 4230 u32 wmi_fw_sub_feat_caps; 4231 u32 txrx_chainmask; 4232 u32 default_dbs_hw_mode_index; 4233 u32 num_msdu_desc; 4234 }; 4235 4236 enum wmi_vdev_type { 4237 WMI_VDEV_TYPE_AP = 1, 4238 WMI_VDEV_TYPE_STA = 2, 4239 WMI_VDEV_TYPE_IBSS = 3, 4240 WMI_VDEV_TYPE_MONITOR = 4, 4241 }; 4242 4243 enum wmi_vdev_subtype { 4244 WMI_VDEV_SUBTYPE_NONE, 4245 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4246 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4247 WMI_VDEV_SUBTYPE_P2P_GO, 4248 WMI_VDEV_SUBTYPE_PROXY_STA, 4249 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4250 WMI_VDEV_SUBTYPE_MESH_11S, 4251 }; 4252 4253 enum wmi_sta_powersave_param { 4254 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4255 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4256 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4257 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4258 WMI_STA_PS_PARAM_UAPSD = 4, 4259 }; 4260 4261 enum wmi_sta_ps_param_uapsd { 4262 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4263 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4264 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4265 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4266 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4267 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4268 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4269 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4270 }; 4271 4272 enum wmi_sta_ps_param_tx_wake_threshold { 4273 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4274 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4275 4276 /* Values greater than one indicate that many TX attempts per beacon 4277 * interval before the STA will wake up 4278 */ 4279 }; 4280 4281 /* The maximum number of PS-Poll frames the FW will send in response to 4282 * traffic advertised in TIM before waking up (by sending a null frame with PS 4283 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4284 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4285 * parameter is used when the RX wake policy is 4286 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4287 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4288 */ 4289 enum wmi_sta_ps_param_pspoll_count { 4290 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4291 /* Values greater than 0 indicate the maximum number of PS-Poll frames 4292 * FW will send before waking up. 4293 */ 4294 }; 4295 4296 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4297 enum wmi_ap_ps_param_uapsd { 4298 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4299 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4300 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4301 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4302 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4303 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4304 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4305 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4306 }; 4307 4308 /* U-APSD maximum service period of peer station */ 4309 enum wmi_ap_ps_peer_param_max_sp { 4310 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4311 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4312 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4313 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4314 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4315 }; 4316 4317 enum wmi_ap_ps_peer_param { 4318 /** Set uapsd configuration for a given peer. 4319 * 4320 * This include the delivery and trigger enabled state for each AC. 4321 * The host MLME needs to set this based on AP capability and stations 4322 * request Set in the association request received from the station. 4323 * 4324 * Lower 8 bits of the value specify the UAPSD configuration. 4325 * 4326 * (see enum wmi_ap_ps_param_uapsd) 4327 * The default value is 0. 4328 */ 4329 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4330 4331 /** 4332 * Set the service period for a UAPSD capable station 4333 * 4334 * The service period from wme ie in the (re)assoc request frame. 4335 * 4336 * (see enum wmi_ap_ps_peer_param_max_sp) 4337 */ 4338 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4339 4340 /** Time in seconds for aging out buffered frames 4341 * for STA in power save 4342 */ 4343 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4344 4345 /** Specify frame types that are considered SIFS 4346 * RESP trigger frame 4347 */ 4348 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4349 4350 /** Specifies the trigger state of TID. 4351 * Valid only for UAPSD frame type 4352 */ 4353 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4354 4355 /* Specifies the WNM sleep state of a STA */ 4356 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4357 }; 4358 4359 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4360 4361 #define WMI_MAX_KEY_INDEX 3 4362 #define WMI_MAX_KEY_LEN 32 4363 4364 enum wmi_key_type { 4365 WMI_KEY_PAIRWISE = 0, 4366 WMI_KEY_GROUP = 1, 4367 }; 4368 4369 enum wmi_cipher_type { 4370 WMI_CIPHER_NONE = 0, /* clear key */ 4371 WMI_CIPHER_WEP = 1, 4372 WMI_CIPHER_TKIP = 2, 4373 WMI_CIPHER_AES_OCB = 3, 4374 WMI_CIPHER_AES_CCM = 4, 4375 WMI_CIPHER_WAPI = 5, 4376 WMI_CIPHER_CKIP = 6, 4377 WMI_CIPHER_AES_CMAC = 7, 4378 WMI_CIPHER_ANY = 8, 4379 WMI_CIPHER_AES_GCM = 9, 4380 WMI_CIPHER_AES_GMAC = 10, 4381 }; 4382 4383 /* Value to disable fixed rate setting */ 4384 #define WMI_FIXED_RATE_NONE (0xffff) 4385 4386 #define ATH12K_RC_VERSION_OFFSET 28 4387 #define ATH12K_RC_PREAMBLE_OFFSET 8 4388 #define ATH12K_RC_NSS_OFFSET 5 4389 4390 #define ATH12K_HW_RATE_CODE(rate, nss, preamble) \ 4391 ((1 << ATH12K_RC_VERSION_OFFSET) | \ 4392 ((nss) << ATH12K_RC_NSS_OFFSET) | \ 4393 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \ 4394 (rate)) 4395 4396 /* Preamble types to be used with VDEV fixed rate configuration */ 4397 enum wmi_rate_preamble { 4398 WMI_RATE_PREAMBLE_OFDM, 4399 WMI_RATE_PREAMBLE_CCK, 4400 WMI_RATE_PREAMBLE_HT, 4401 WMI_RATE_PREAMBLE_VHT, 4402 WMI_RATE_PREAMBLE_HE, 4403 }; 4404 4405 /** 4406 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4407 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 4408 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 4409 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 4410 */ 4411 enum wmi_rtscts_prot_mode { 4412 WMI_RTS_CTS_DISABLED = 0, 4413 WMI_USE_RTS_CTS = 1, 4414 WMI_USE_CTS2SELF = 2, 4415 }; 4416 4417 /** 4418 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4419 * protection mode. 4420 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 4421 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 4422 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 4423 * but if there's a sw retry, both the rate 4424 * series will use RTS-CTS. 4425 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 4426 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 4427 */ 4428 enum wmi_rtscts_profile { 4429 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4430 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4431 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4432 WMI_RTSCTS_ERP = 3, 4433 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4434 }; 4435 4436 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4437 4438 enum wmi_sta_ps_param_rx_wake_policy { 4439 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4440 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4441 }; 4442 4443 /* Do not change existing values! Used by ath12k_frame_mode parameter 4444 * module parameter. 4445 */ 4446 enum ath12k_hw_txrx_mode { 4447 ATH12K_HW_TXRX_RAW = 0, 4448 ATH12K_HW_TXRX_NATIVE_WIFI = 1, 4449 ATH12K_HW_TXRX_ETHERNET = 2, 4450 }; 4451 4452 struct wmi_wmm_params { 4453 __le32 tlv_header; 4454 __le32 cwmin; 4455 __le32 cwmax; 4456 __le32 aifs; 4457 __le32 txoplimit; 4458 __le32 acm; 4459 __le32 no_ack; 4460 } __packed; 4461 4462 struct wmi_wmm_params_arg { 4463 u8 acm; 4464 u8 aifs; 4465 u16 cwmin; 4466 u16 cwmax; 4467 u16 txop; 4468 u8 no_ack; 4469 }; 4470 4471 struct wmi_vdev_set_wmm_params_cmd { 4472 __le32 tlv_header; 4473 __le32 vdev_id; 4474 struct wmi_wmm_params wmm_params[4]; 4475 __le32 wmm_param_type; 4476 } __packed; 4477 4478 struct wmi_wmm_params_all_arg { 4479 struct wmi_wmm_params_arg ac_be; 4480 struct wmi_wmm_params_arg ac_bk; 4481 struct wmi_wmm_params_arg ac_vi; 4482 struct wmi_wmm_params_arg ac_vo; 4483 }; 4484 4485 #define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000 4486 #define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4487 #define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4488 #define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4489 #define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4490 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4491 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4492 #define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10 4493 #define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4494 #define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4495 #define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4496 #define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500 4497 #define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4498 #define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4499 #define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4500 4501 struct wmi_twt_enable_params_cmd { 4502 __le32 tlv_header; 4503 __le32 pdev_id; 4504 __le32 sta_cong_timer_ms; 4505 __le32 mbss_support; 4506 __le32 default_slot_size; 4507 __le32 congestion_thresh_setup; 4508 __le32 congestion_thresh_teardown; 4509 __le32 congestion_thresh_critical; 4510 __le32 interference_thresh_teardown; 4511 __le32 interference_thresh_setup; 4512 __le32 min_no_sta_setup; 4513 __le32 min_no_sta_teardown; 4514 __le32 no_of_bcast_mcast_slots; 4515 __le32 min_no_twt_slots; 4516 __le32 max_no_sta_twt; 4517 __le32 mode_check_interval; 4518 __le32 add_sta_slot_interval; 4519 __le32 remove_sta_slot_interval; 4520 } __packed; 4521 4522 struct wmi_twt_disable_params_cmd { 4523 __le32 tlv_header; 4524 __le32 pdev_id; 4525 } __packed; 4526 4527 struct wmi_obss_spatial_reuse_params_cmd { 4528 __le32 tlv_header; 4529 __le32 pdev_id; 4530 __le32 enable; 4531 a_sle32 obss_min; 4532 a_sle32 obss_max; 4533 __le32 vdev_id; 4534 } __packed; 4535 4536 #define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4537 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4538 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1 4539 4540 #define ATH12K_BSS_COLOR_STA_PERIODS 10000 4541 #define ATH12K_BSS_COLOR_AP_PERIODS 5000 4542 4543 struct wmi_obss_color_collision_cfg_params_cmd { 4544 __le32 tlv_header; 4545 __le32 vdev_id; 4546 __le32 flags; 4547 __le32 evt_type; 4548 __le32 current_bss_color; 4549 __le32 detection_period_ms; 4550 __le32 scan_period_ms; 4551 __le32 free_slot_expiry_time_ms; 4552 } __packed; 4553 4554 struct wmi_bss_color_change_enable_params_cmd { 4555 __le32 tlv_header; 4556 __le32 vdev_id; 4557 __le32 enable; 4558 } __packed; 4559 4560 #define ATH12K_IPV4_TH_SEED_SIZE 5 4561 #define ATH12K_IPV6_TH_SEED_SIZE 11 4562 4563 struct ath12k_wmi_pdev_lro_config_cmd { 4564 __le32 tlv_header; 4565 __le32 lro_enable; 4566 __le32 res; 4567 u32 th_4[ATH12K_IPV4_TH_SEED_SIZE]; 4568 u32 th_6[ATH12K_IPV6_TH_SEED_SIZE]; 4569 __le32 pdev_id; 4570 } __packed; 4571 4572 #define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0 4573 #define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4574 #define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4575 #define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4576 #define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4577 #define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4578 #define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4579 #define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4580 #define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4581 #define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4582 #define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4583 #define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4584 #define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4585 #define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4586 #define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4587 #define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4588 #define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4589 #define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4590 4591 struct ath12k_wmi_vdev_spectral_conf_arg { 4592 u32 vdev_id; 4593 u32 scan_count; 4594 u32 scan_period; 4595 u32 scan_priority; 4596 u32 scan_fft_size; 4597 u32 scan_gc_ena; 4598 u32 scan_restart_ena; 4599 u32 scan_noise_floor_ref; 4600 u32 scan_init_delay; 4601 u32 scan_nb_tone_thr; 4602 u32 scan_str_bin_thr; 4603 u32 scan_wb_rpt_mode; 4604 u32 scan_rssi_rpt_mode; 4605 u32 scan_rssi_thr; 4606 u32 scan_pwr_format; 4607 u32 scan_rpt_mode; 4608 u32 scan_bin_scale; 4609 u32 scan_dbm_adj; 4610 u32 scan_chn_mask; 4611 }; 4612 4613 struct ath12k_wmi_vdev_spectral_conf_cmd { 4614 __le32 tlv_header; 4615 __le32 vdev_id; 4616 __le32 scan_count; 4617 __le32 scan_period; 4618 __le32 scan_priority; 4619 __le32 scan_fft_size; 4620 __le32 scan_gc_ena; 4621 __le32 scan_restart_ena; 4622 __le32 scan_noise_floor_ref; 4623 __le32 scan_init_delay; 4624 __le32 scan_nb_tone_thr; 4625 __le32 scan_str_bin_thr; 4626 __le32 scan_wb_rpt_mode; 4627 __le32 scan_rssi_rpt_mode; 4628 __le32 scan_rssi_thr; 4629 __le32 scan_pwr_format; 4630 __le32 scan_rpt_mode; 4631 __le32 scan_bin_scale; 4632 __le32 scan_dbm_adj; 4633 __le32 scan_chn_mask; 4634 } __packed; 4635 4636 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4637 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4638 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4639 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4640 4641 struct ath12k_wmi_vdev_spectral_enable_cmd { 4642 __le32 tlv_header; 4643 __le32 vdev_id; 4644 __le32 trigger_cmd; 4645 __le32 enable_cmd; 4646 } __packed; 4647 4648 struct ath12k_wmi_pdev_dma_ring_cfg_arg { 4649 u32 tlv_header; 4650 u32 pdev_id; 4651 u32 module_id; 4652 u32 base_paddr_lo; 4653 u32 base_paddr_hi; 4654 u32 head_idx_paddr_lo; 4655 u32 head_idx_paddr_hi; 4656 u32 tail_idx_paddr_lo; 4657 u32 tail_idx_paddr_hi; 4658 u32 num_elems; 4659 u32 buf_size; 4660 u32 num_resp_per_event; 4661 u32 event_timeout_ms; 4662 }; 4663 4664 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd { 4665 __le32 tlv_header; 4666 __le32 pdev_id; 4667 __le32 module_id; /* see enum wmi_direct_buffer_module */ 4668 __le32 base_paddr_lo; 4669 __le32 base_paddr_hi; 4670 __le32 head_idx_paddr_lo; 4671 __le32 head_idx_paddr_hi; 4672 __le32 tail_idx_paddr_lo; 4673 __le32 tail_idx_paddr_hi; 4674 __le32 num_elems; /* Number of elems in the ring */ 4675 __le32 buf_size; /* size of allocated buffer in bytes */ 4676 4677 /* Number of wmi_dma_buf_release_entry packed together */ 4678 __le32 num_resp_per_event; 4679 4680 /* Target should timeout and send whatever resp 4681 * it has if this time expires, units in milliseconds 4682 */ 4683 __le32 event_timeout_ms; 4684 } __packed; 4685 4686 struct ath12k_wmi_dma_buf_release_fixed_params { 4687 __le32 pdev_id; 4688 __le32 module_id; 4689 __le32 num_buf_release_entry; 4690 __le32 num_meta_data_entry; 4691 } __packed; 4692 4693 struct ath12k_wmi_dma_buf_release_entry_params { 4694 __le32 tlv_header; 4695 __le32 paddr_lo; 4696 4697 /* Bits 11:0: address of data 4698 * Bits 31:12: host context data 4699 */ 4700 __le32 paddr_hi; 4701 } __packed; 4702 4703 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 4704 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 4705 4706 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 4707 4708 struct ath12k_wmi_dma_buf_release_meta_data_params { 4709 __le32 tlv_header; 4710 a_sle32 noise_floor[WMI_MAX_CHAINS]; 4711 __le32 reset_delay; 4712 __le32 freq1; 4713 __le32 freq2; 4714 __le32 ch_width; 4715 } __packed; 4716 4717 enum wmi_fils_discovery_cmd_type { 4718 WMI_FILS_DISCOVERY_CMD, 4719 WMI_UNSOL_BCAST_PROBE_RESP, 4720 }; 4721 4722 struct wmi_fils_discovery_cmd { 4723 __le32 tlv_header; 4724 __le32 vdev_id; 4725 __le32 interval; 4726 __le32 config; /* enum wmi_fils_discovery_cmd_type */ 4727 } __packed; 4728 4729 struct wmi_fils_discovery_tmpl_cmd { 4730 __le32 tlv_header; 4731 __le32 vdev_id; 4732 __le32 buf_len; 4733 } __packed; 4734 4735 struct wmi_probe_tmpl_cmd { 4736 __le32 tlv_header; 4737 __le32 vdev_id; 4738 __le32 buf_len; 4739 } __packed; 4740 4741 #define WMI_MAX_MEM_REQS 32 4742 4743 #define MAX_RADIOS 3 4744 4745 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 4746 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 4747 4748 struct ath12k_wmi_pdev { 4749 struct ath12k_wmi_base *wmi_ab; 4750 enum ath12k_htc_ep_id eid; 4751 u32 rx_decap_mode; 4752 }; 4753 4754 struct ath12k_wmi_base { 4755 struct ath12k_base *ab; 4756 struct ath12k_wmi_pdev wmi[MAX_RADIOS]; 4757 enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 4758 u32 max_msg_len[MAX_RADIOS]; 4759 4760 struct completion service_ready; 4761 struct completion unified_ready; 4762 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 4763 wait_queue_head_t tx_credits_wq; 4764 u32 num_mem_chunks; 4765 u32 rx_decap_mode; 4766 struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS]; 4767 4768 enum wmi_host_hw_mode_config_type preferred_hw_mode; 4769 4770 struct ath12k_wmi_target_cap_arg *targ_cap; 4771 }; 4772 4773 #define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024) 4774 4775 enum wmi_sys_cap_info_flags { 4776 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 4777 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 4778 }; 4779 4780 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 4781 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 4782 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 4783 4784 enum wmi_rfkill_enable_radio { 4785 WMI_RFKILL_ENABLE_RADIO_ON = 0, 4786 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 4787 }; 4788 4789 enum wmi_rfkill_radio_state { 4790 WMI_RFKILL_RADIO_STATE_OFF = 1, 4791 WMI_RFKILL_RADIO_STATE_ON = 2, 4792 }; 4793 4794 struct wmi_rfkill_state_change_event { 4795 __le32 gpio_pin_num; 4796 __le32 int_type; 4797 __le32 radio_state; 4798 } __packed; 4799 4800 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 4801 struct ath12k_wmi_resource_config_arg *config); 4802 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 4803 struct ath12k_wmi_resource_config_arg *config); 4804 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 4805 u32 cmd_id); 4806 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len); 4807 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 4808 struct sk_buff *frame); 4809 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 4810 struct ieee80211_mutable_offsets *offs, 4811 struct sk_buff *bcn); 4812 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id); 4813 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, 4814 const u8 *bssid); 4815 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id); 4816 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 4817 bool restart); 4818 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 4819 u32 vdev_id, u32 param_id, u32 param_val); 4820 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 4821 u32 param_value, u8 pdev_id); 4822 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable); 4823 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab); 4824 int ath12k_wmi_cmd_init(struct ath12k_base *ab); 4825 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab); 4826 int ath12k_wmi_connect(struct ath12k_base *ab); 4827 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 4828 u8 pdev_id); 4829 int ath12k_wmi_attach(struct ath12k_base *ab); 4830 void ath12k_wmi_detach(struct ath12k_base *ab); 4831 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 4832 struct ath12k_wmi_vdev_create_arg *arg); 4833 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 4834 struct ath12k_wmi_peer_create_arg *arg); 4835 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 4836 u32 param_id, u32 param_value); 4837 4838 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 4839 u32 param, u32 param_value); 4840 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms); 4841 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 4842 const u8 *peer_addr, u8 vdev_id); 4843 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id); 4844 void ath12k_wmi_start_scan_init(struct ath12k *ar, 4845 struct ath12k_wmi_scan_req_arg *arg); 4846 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 4847 struct ath12k_wmi_scan_req_arg *arg); 4848 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 4849 struct ath12k_wmi_scan_cancel_arg *arg); 4850 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 4851 struct wmi_wmm_params_all_arg *param); 4852 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 4853 u32 pdev_id); 4854 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id); 4855 4856 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 4857 struct ath12k_wmi_peer_assoc_arg *arg); 4858 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 4859 struct wmi_vdev_install_key_arg *arg); 4860 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 4861 enum wmi_bss_chan_info_req_type type); 4862 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar); 4863 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 4864 u8 peer_addr[ETH_ALEN], 4865 u32 peer_tid_bitmap, 4866 u8 vdev_id); 4867 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 4868 struct ath12k_wmi_ap_ps_arg *arg); 4869 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 4870 struct ath12k_wmi_scan_chan_list_arg *arg); 4871 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 4872 u32 pdev_id); 4873 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac); 4874 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 4875 u32 tid, u32 buf_size); 4876 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 4877 u32 tid, u32 status); 4878 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 4879 u32 tid, u32 initiator, u32 reason); 4880 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 4881 u32 vdev_id, u32 bcn_ctrl_op); 4882 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 4883 struct ath12k_wmi_init_country_arg *arg); 4884 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 4885 int vdev_id, const u8 *addr, 4886 dma_addr_t paddr, u8 tid, 4887 u8 ba_window_size_valid, 4888 u32 ba_window_size); 4889 int 4890 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 4891 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg); 4892 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 4893 struct ath12k_wmi_pdev_set_regdomain_arg *arg); 4894 int ath12k_wmi_simulate_radar(struct ath12k *ar); 4895 int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id); 4896 int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id); 4897 int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 4898 struct ieee80211_he_obss_pd *he_obss_pd); 4899 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 4900 u8 bss_color, u32 period, 4901 bool enable); 4902 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 4903 bool enable); 4904 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id); 4905 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 4906 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg); 4907 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 4908 u32 trigger, u32 enable); 4909 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 4910 struct ath12k_wmi_vdev_spectral_conf_arg *arg); 4911 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 4912 struct sk_buff *tmpl); 4913 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 4914 bool unsol_bcast_probe_resp_enabled); 4915 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 4916 struct sk_buff *tmpl); 4917 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 4918 enum wmi_host_hw_mode_config_type mode); 4919 4920 #endif 4921