| b9851611 | 25-Jul-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: tc9563: Move Integrated MAC Endpoint out of 'tc9563_pwrctrl_ports' enum
'tc9563_pwrctrl_ports' is supposed to list only the internal ports of the switch. But it currently lists the inte
PCI/pwrctrl: tc9563: Move Integrated MAC Endpoint out of 'tc9563_pwrctrl_ports' enum
'tc9563_pwrctrl_ports' is supposed to list only the internal ports of the switch. But it currently lists the integrated MAC Endpoint as well, which is wrong.
Move it to a separate 'ep_cfg' struct and also configure/parse the ports and the MAC Endpoint separately.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-6-ec4286e31331@oss.qualcomm.com
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| b7f273a4 | 25-Jul-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: tc9563: Rename DSP3 to VDSP
TC9563 Reference Manual calls DSP3 as VDSP (Virtual Downstream Port). Name it as such to avoid ambiguity.
Signed-off-by: Manivannan Sadhasivam <manivannan.
PCI/pwrctrl: tc9563: Rename DSP3 to VDSP
TC9563 Reference Manual calls DSP3 as VDSP (Virtual Downstream Port). Name it as such to avoid ambiguity.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-5-ec4286e31331@oss.qualcomm.com
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| b859b936 | 25-Jul-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: tc9563: Skip Tx amplitude and DFE tuning for DSP3
DSP3 doesn't support tuning Tx amplitude and DFE settings. Skip the setting if DT has passed the tuning properties. There is no need to
PCI/pwrctrl: tc9563: Skip Tx amplitude and DFE tuning for DSP3
DSP3 doesn't support tuning Tx amplitude and DFE settings. Skip the setting if DT has passed the tuning properties. There is no need to error out the whole driver because of it.
Fixes: 4c9c7be47310 ("PCI: pwrctrl: Add power control driver for TC9563") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> [bhelgaas: squash https://lore.kernel.org/all/oefxm7olagbd3dby2npgly7ausiz3g6cvls5igaxdzvlbr3wrv@rjlfebi2p36j] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-4-ec4286e31331@oss.qualcomm.com
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| e41bbfc4 | 25-Jul-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: tc9563: Power off only the external ports in tc9563_pwrctrl_disable_port()
TC9563 supports powering off only the external facing ports like DSP1 and DSP2. It is not recommended to power
PCI/pwrctrl: tc9563: Power off only the external ports in tc9563_pwrctrl_disable_port()
TC9563 supports powering off only the external facing ports like DSP1 and DSP2. It is not recommended to power off USP and DSP3 as they have fixed ports/endpoint connected.
Fix tc9563_pwrctrl_disable_port() to power off only DSP1 and DSP2.
Fixes: 4c9c7be47310 ("PCI: pwrctrl: Add power control driver for TC9563") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-3-ec4286e31331@oss.qualcomm.com
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| 6e5e6c21 | 25-Jul-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: tc9563: Fix parsing the integrated Ethernet MAC Endpoint node
DSP3 has an integrated Ethernet MAC Endpoint which has its own set of config registers for configuring settings such as ASP
PCI/pwrctrl: tc9563: Fix parsing the integrated Ethernet MAC Endpoint node
DSP3 has an integrated Ethernet MAC Endpoint which has its own set of config registers for configuring settings such as ASPM. The Endpoint device has two physical functions and those two functions share the same settings.
Parse the Endpoint node under DSP3 instead of parsing both functions. The existing parsing logic also has one OOB issue as parsing both functions will result in accessing past the tc9563_pwrctrl->cfg array.
Fixes: 4c9c7be47310 ("PCI: pwrctrl: Add power control driver for TC9563") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-2-ec4286e31331@oss.qualcomm.com
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| 548f3d28 | 18-May-2026 |
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> |
PCI/pwrctrl: Lock device when calling device_is_bound()
The kerneldoc for device_is_bound() states that it must be called with the device lock taken. Synchronize the two calls in pwrctrl core.
Fixe
PCI/pwrctrl: Lock device when calling device_is_bound()
The kerneldoc for device_is_bound() states that it must be called with the device lock taken. Synchronize the two calls in pwrctrl core.
Fixes: b35cf3b6aa1e ("PCI/pwrctrl: Add APIs to power on/off pwrctrl devices") Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260518100700.47581-1-bartosz.golaszewski@oss.qualcomm.com
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| 95c49207 | 21-Apr-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Do not try to power on/off devices that don't need pwrctrl
pci_pwrctrl_is_required() detects whether a device needs PCI pwrctrl support. It is currently used in pci_pwrctrl_create_devic
PCI/pwrctrl: Do not try to power on/off devices that don't need pwrctrl
pci_pwrctrl_is_required() detects whether a device needs PCI pwrctrl support. It is currently used in pci_pwrctrl_create_device(), but not in pci_pwrctrl_power_{on/off}_device() APIs. This leads to pwrctrl core trying to power on/off incompatible devices like USB hub downstream ports defined in DT.
Add this check to prevent pwrctrl core from poking at wrong devices.
Fixes: b35cf3b6aa1e ("PCI/pwrctrl: Add APIs to power on/off pwrctrl devices") Reported-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> [bhelgaas: split pci_pwrctrl_is_required() move to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260421104102.12322-1-manivannan.sadhasivam@oss.qualcomm.com
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| 70bb8437 | 23-Mar-2026 |
Felix Gu <ustc.gu@gmail.com> |
PCI/pwrctrl: Fix pci_pwrctrl_is_required() device node leak
The for_each_endpoint_of_node() macro requires calling of_node_put() on the endpoint node when breaking out of the loop early.
Add of_nod
PCI/pwrctrl: Fix pci_pwrctrl_is_required() device node leak
The for_each_endpoint_of_node() macro requires calling of_node_put() on the endpoint node when breaking out of the loop early.
Add of_node_put(endpoint) before the early return to release the reference.
Fixes: cf3287fb2c1f ("PCI/pwrctrl: Ensure that remote endpoint node parent has supply requirement") Signed-off-by: Felix Gu <ustc.gu@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260323-pwctrl-v1-1-f5c03a2df7fb@gmail.com
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| bd3622e5 | 20-Feb-2026 |
Neil Armstrong <neil.armstrong@linaro.org> |
PCI/pwrctrl: generic: Add UPD720201/UPD720202 USB 3.0 xHCI Host Controller support
Enable the generic pwrctrl driver to control power of PCIe UPD720201/UPD720202 USB 3.0 xHCI Host Controller.
Signe
PCI/pwrctrl: generic: Add UPD720201/UPD720202 USB 3.0 xHCI Host Controller support
Enable the generic pwrctrl driver to control power of PCIe UPD720201/UPD720202 USB 3.0 xHCI Host Controller.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260220-topic-sm8650-ayaneo-pocket-s2-base-v5-4-1ad79caa1efa@linaro.org
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| 0862e2b0 | 20-Feb-2026 |
Neil Armstrong <neil.armstrong@linaro.org> |
PCI/pwrctrl: generic: Simplify dev_err_probe() usage
dev_err_probe() returns the error code passed to it, so this:
dev_err_probe(dev, ret, "Failed to get slot regulators\n"); return ret;
is eq
PCI/pwrctrl: generic: Simplify dev_err_probe() usage
dev_err_probe() returns the error code passed to it, so this:
dev_err_probe(dev, ret, "Failed to get slot regulators\n"); return ret;
is equivalent to this:
return dev_err_probe(dev, ret, "Failed to get slot regulators\n");
Simplify by using the latter.
Suggested-by: Bartosz Golaszewski <brgl@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260220-topic-sm8650-ayaneo-pocket-s2-base-v5-2-1ad79caa1efa@linaro.org
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| ee226656 | 23-Feb-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Create pwrctrl devices only for PCI device nodes
A PCI host bridge node can have non-PCI child nodes (OPP tables, USB hub, etc.) as well as PCI device child nodes.
Ensure that pwrctrl
PCI/pwrctrl: Create pwrctrl devices only for PCI device nodes
A PCI host bridge node can have non-PCI child nodes (OPP tables, USB hub, etc.) as well as PCI device child nodes.
Ensure that pwrctrl devices are only created for PCI device nodes by checking for the 'pci' prefix in the compatible property.
Fixes: 4c4132489201 ("PCI/pwrctrl: Add APIs to create, destroy pwrctrl devices") Reported-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Closes: https://lore.kernel.org/all/20260212-rb3gen2-upd-gl3590-v1-1-18fb04bb32b0@oss.qualcomm.com Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260223-pwrctrl-fixes-7-0-v2-2-97566dfb1809@oss.qualcomm.com
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| 9db82620 | 28-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Create pwrctrl device if graph port is found
The devicetree node of the PCIe Root Port/Slot could have the graph port to link the PCIe M.2 connector node. Since the M.2 connectors are m
PCI/pwrctrl: Create pwrctrl device if graph port is found
The devicetree node of the PCIe Root Port/Slot could have the graph port to link the PCIe M.2 connector node. Since the M.2 connectors are modeled as Power Sequencing devices, they need to be controlled by the pwrctrl driver like the Root Port/Slot supplies.
Hence, create the pwrctrl device if the graph port is found in the node.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260128-pci-m2-v7-2-9b3a5fe3d244@oss.qualcomm.com
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| 9cb64f61 | 28-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Add PCIe M.2 connector support
Add support for handling PCIe M.2 connectors as Power Sequencing devices. These connectors are exposed as Power Sequencing devices as they often support m
PCI/pwrctrl: Add PCIe M.2 connector support
Add support for handling PCIe M.2 connectors as Power Sequencing devices. These connectors are exposed as Power Sequencing devices as they often support multiple interfaces like PCIe/SATA, USB/UART to the host machine, and the interfaces may be driven by different client drivers at the same time.
This driver handles the PCIe interface of these connectors. It first checks for the presence of the graph port in the Root Port node with the help of of_graph_is_present() API. If present, it acquires/powers ON the corresponding pwrseq device.
Once the pwrseq device is powered ON, the driver will skip parsing the Root Port/Slot resources and register with the pwrctrl framework.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260128-pci-m2-v7-1-9b3a5fe3d244@oss.qualcomm.com
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| b921aa3f | 15-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Switch to pwrctrl create, power on/off, destroy APIs
Adopt pwrctrl APIs to create, power on/off, and destroy pwrctrl devices.
In qcom_pcie_host_init(), call pci_pwrctrl_create_devices(
PCI/pwrctrl: Switch to pwrctrl create, power on/off, destroy APIs
Adopt pwrctrl APIs to create, power on/off, and destroy pwrctrl devices.
In qcom_pcie_host_init(), call pci_pwrctrl_create_devices() to create devices, then pci_pwrctrl_power_on_devices() to power them on, both after controller resource initialization. Once successful, deassert PERST# for all devices.
In qcom_pcie_host_deinit(), call pci_pwrctrl_power_off_devices() after asserting PERST#. Note that pci_pwrctrl_destroy_devices() is not called here, as deinit is only invoked during system suspend where device destruction is unnecessary. If the driver becomes removable in future, pci_pwrctrl_destroy_devices() should be called in the remove() handler.
Remove the old pwrctrl framework code from the PCI core (including devlinks) as the new APIs are now the sole consumer of pwrctrl functionality. And also do not power on the pwrctrl drivers during probe() as this is now handled by the APIs.
Co-developed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-12-9d26da3ce903@oss.qualcomm.com
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| b35cf3b6 | 15-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Add APIs to power on/off pwrctrl devices
To fix bridge resource allocation issues when powering PCI bridges with the pwrctrl driver, introduce APIs to explicitly power on and off all re
PCI/pwrctrl: Add APIs to power on/off pwrctrl devices
To fix bridge resource allocation issues when powering PCI bridges with the pwrctrl driver, introduce APIs to explicitly power on and off all related devices simultaneously.
Previously, the individual pwrctrl drivers powered on/off the PCI devices autonomously, without any control from the controller drivers. But to enforce ordering with respect to powering on the devices, these APIs will power on/off all the devices at the same time.
The pci_pwrctrl_power_on_devices() API recursively scans the PCI child nodes, makes sure that pwrctrl drivers are bound to devices, and calls their power_on() callbacks. If any pwrctrl driver is not bound, it will return -EPROBE_DEFER.
Similarly, pci_pwrctrl_power_off_devices() API powers off devices recursively via their power_off() callbacks.
These APIs are expected to be called during the controller probe and suspend/resume time to power on/off the devices. But before calling these APIs, the pwrctrl devices should be created using the pci_pwrctrl_{create/destroy}_devices() APIs.
Co-developed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-11-9d26da3ce903@oss.qualcomm.com
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