xref: /linux/drivers/gpu/drm/xe/xe_svm.c (revision 570f7e331f5febb30f1384817463c7e42b65ca7d)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2024 Intel Corporation
4  */
5 
6 #include <linux/pci-p2pdma.h>
7 
8 #include <drm/drm_drv.h>
9 #include <drm/drm_managed.h>
10 #include <drm/drm_pagemap.h>
11 #include <drm/drm_pagemap_util.h>
12 
13 #include "xe_bo.h"
14 #include "xe_exec_queue_types.h"
15 #include "xe_gt_stats.h"
16 #include "xe_migrate.h"
17 #include "xe_module.h"
18 #include "xe_pm.h"
19 #include "xe_pt.h"
20 #include "xe_svm.h"
21 #include "xe_tile.h"
22 #include "xe_tlb_inval.h"
23 #include "xe_ttm_vram_mgr.h"
24 #include "xe_vm.h"
25 #include "xe_vm_types.h"
26 #include "xe_vram_types.h"
27 
28 /* Identifies subclasses of struct drm_pagemap_peer */
29 #define XE_PEER_PAGEMAP ((void *)0ul)
30 #define XE_PEER_VM ((void *)1ul)
31 
32 /**
33  * DOC: drm_pagemap reference-counting in xe:
34  *
35  * In addition to the drm_pagemap internal reference counting by its zone
36  * device data, the xe driver holds the following long-time references:
37  *
38  * - struct xe_pagemap:
39  *	The xe_pagemap struct derives from struct drm_pagemap and uses its
40  *	reference count.
41  * - SVM-enabled VMs:
42  *	SVM-enabled VMs look up and keeps a reference to all xe_pagemaps on
43  *	the same device.
44  * - VMAs:
45  *	vmas keep a reference on the drm_pagemap indicated by a gpu_madvise()
46  *	call.
47  *
48  * In addition, all drm_pagemap or xe_pagemap pointers where lifetime cannot
49  * be guaranteed by a vma reference under the vm lock should keep a reference.
50  * That includes the range->pages.dpagemap pointer.
51  */
52 
53 static int xe_svm_get_pagemaps(struct xe_vm *vm);
54 
55 void *xe_svm_private_page_owner(struct xe_vm *vm, bool force_smem)
56 {
57 	return force_smem ? NULL : vm->svm.peer.owner;
58 }
59 
60 static bool xe_svm_range_in_vram(struct xe_svm_range *range)
61 {
62 	/*
63 	 * Advisory only check whether the range is currently backed by VRAM
64 	 * memory.
65 	 */
66 
67 	struct drm_gpusvm_pages_flags flags = {
68 		/* Pairs with WRITE_ONCE in drm_gpusvm.c */
69 		.__flags = READ_ONCE(range->pages.flags.__flags),
70 	};
71 
72 	return flags.has_devmem_pages;
73 }
74 
75 static bool xe_svm_range_has_vram_binding(struct xe_svm_range *range)
76 {
77 	/* Not reliable without notifier lock */
78 	return xe_svm_range_in_vram(range) && range->tile_present;
79 }
80 
81 static struct xe_vm *gpusvm_to_vm(struct drm_gpusvm *gpusvm)
82 {
83 	return container_of(gpusvm, struct xe_vm, svm.gpusvm);
84 }
85 
86 static struct xe_vm *range_to_vm(struct drm_gpusvm_range *r)
87 {
88 	return gpusvm_to_vm(r->gpusvm);
89 }
90 
91 #define range_debug(r__, operation__)					\
92 	vm_dbg(&range_to_vm(&(r__)->base)->xe->drm,			\
93 	       "%s: asid=%u, gpusvm=%p, vram=%d,%d, seqno=%lu, " \
94 	       "start=0x%014lx, end=0x%014lx, size=%lu",		\
95 	       (operation__), range_to_vm(&(r__)->base)->usm.asid,	\
96 	       (r__)->base.gpusvm,					\
97 	       xe_svm_range_in_vram((r__)) ? 1 : 0,			\
98 	       xe_svm_range_has_vram_binding((r__)) ? 1 : 0,		\
99 	       (r__)->pages.notifier_seq,				\
100 	       xe_svm_range_start((r__)), xe_svm_range_end((r__)),	\
101 	       xe_svm_range_size((r__)))
102 
103 void xe_svm_range_debug(struct xe_svm_range *range, const char *operation)
104 {
105 	range_debug(range, operation);
106 }
107 
108 static struct drm_gpusvm_range *
109 xe_svm_range_alloc(struct drm_gpusvm *gpusvm)
110 {
111 	struct xe_svm_range *range;
112 
113 	range = kzalloc_obj(*range);
114 	if (!range)
115 		return NULL;
116 
117 	INIT_LIST_HEAD(&range->garbage_collector_link);
118 	drm_gpusvm_init_pages(&range->pages, &gpusvm_to_vm(gpusvm)->xe->drm);
119 	xe_vm_get(gpusvm_to_vm(gpusvm));
120 
121 	return &range->base;
122 }
123 
124 static void xe_svm_range_free(struct drm_gpusvm_range *range)
125 {
126 	drm_gpusvm_free_pages(range->gpusvm, &(to_xe_range(range)->pages),
127 			      drm_gpusvm_range_size(range) >> PAGE_SHIFT);
128 	xe_vm_put(range_to_vm(range));
129 	kfree(to_xe_range(range));
130 }
131 
132 static void
133 xe_svm_garbage_collector_add_range(struct xe_vm *vm, struct xe_svm_range *range,
134 				   const struct mmu_notifier_range *mmu_range)
135 {
136 	struct xe_device *xe = vm->xe;
137 
138 	range_debug(range, "GARBAGE COLLECTOR ADD");
139 
140 	drm_gpusvm_range_set_unmapped(&range->base, &range->pages, 1,
141 				      mmu_range);
142 
143 	spin_lock(&vm->svm.garbage_collector.lock);
144 	if (list_empty(&range->garbage_collector_link))
145 		list_add_tail(&range->garbage_collector_link,
146 			      &vm->svm.garbage_collector.range_list);
147 	spin_unlock(&vm->svm.garbage_collector.lock);
148 
149 	queue_work(xe->usm.pf_wq, &vm->svm.garbage_collector.work);
150 }
151 
152 static void xe_svm_tlb_inval_count_stats_incr(struct xe_gt *gt)
153 {
154 	xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_TLB_INVAL_COUNT, 1);
155 }
156 
157 static u8
158 xe_svm_range_notifier_event_begin(struct xe_vm *vm, struct drm_gpusvm_range *r,
159 				  const struct mmu_notifier_range *mmu_range,
160 				  u64 *adj_start, u64 *adj_end)
161 {
162 	struct xe_svm_range *range = to_xe_range(r);
163 	struct xe_device *xe = vm->xe;
164 	struct xe_tile *tile;
165 	u8 tile_mask = 0;
166 	u8 id;
167 
168 	xe_svm_assert_in_notifier(vm);
169 
170 	range_debug(range, "NOTIFIER");
171 
172 	/* Skip if already unmapped or if no binding exist */
173 	if (range->base.flags.unmapped || !range->tile_present)
174 		return 0;
175 
176 	range_debug(range, "NOTIFIER - EXECUTE");
177 
178 	/* Adjust invalidation to range boundaries */
179 	*adj_start = min(xe_svm_range_start(range), mmu_range->start);
180 	*adj_end = max(xe_svm_range_end(range), mmu_range->end);
181 
182 	/*
183 	 * XXX: Ideally would zap PTEs in one shot in xe_svm_invalidate but the
184 	 * invalidation code can't correctly cope with sparse ranges or
185 	 * invalidations spanning multiple ranges.
186 	 */
187 	for_each_tile(tile, xe, id)
188 		if (xe_pt_zap_ptes_range(tile, vm, range)) {
189 			/*
190 			 * WRITE_ONCE pairs with READ_ONCE in
191 			 * xe_vm_has_valid_gpu_mapping()
192 			 */
193 			WRITE_ONCE(range->tile_invalidated,
194 				   range->tile_invalidated | BIT(id));
195 
196 			if (!(tile_mask & BIT(id))) {
197 				xe_svm_tlb_inval_count_stats_incr(tile->primary_gt);
198 				if (tile->media_gt)
199 					xe_svm_tlb_inval_count_stats_incr(tile->media_gt);
200 				tile_mask |= BIT(id);
201 			}
202 		}
203 
204 	return tile_mask;
205 }
206 
207 static void
208 xe_svm_range_notifier_event_end(struct xe_vm *vm, struct drm_gpusvm_range *r,
209 				const struct mmu_notifier_range *mmu_range)
210 {
211 	struct drm_gpusvm_ctx ctx = { .in_notifier = true, };
212 
213 	xe_svm_assert_in_notifier(vm);
214 
215 	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &(to_xe_range(r)->pages),
216 			       drm_gpusvm_range_size(r) >> PAGE_SHIFT, &ctx);
217 	if (!xe_vm_is_closed(vm) && mmu_range->event == MMU_NOTIFY_UNMAP)
218 		xe_svm_garbage_collector_add_range(vm, to_xe_range(r),
219 						   mmu_range);
220 }
221 
222 static void xe_svm_tlb_inval_us_stats_incr(struct xe_gt *gt, ktime_t start)
223 {
224 	s64 us_delta = xe_gt_stats_ktime_us_delta(start);
225 
226 	xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_TLB_INVAL_US, us_delta);
227 }
228 
229 static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
230 			      struct drm_gpusvm_notifier *notifier,
231 			      const struct mmu_notifier_range *mmu_range)
232 {
233 	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
234 	struct xe_tlb_inval_batch batch;
235 	struct xe_device *xe = vm->xe;
236 	struct drm_gpusvm_range *r, *first;
237 	struct xe_tile *tile;
238 	ktime_t start = xe_gt_stats_ktime_get();
239 	u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
240 	u8 tile_mask = 0, id;
241 	long err;
242 
243 	xe_svm_assert_in_notifier(vm);
244 
245 	vm_dbg(&gpusvm_to_vm(gpusvm)->xe->drm,
246 	       "INVALIDATE: asid=%u, gpusvm=%p, seqno=%lu, start=0x%016lx, end=0x%016lx, event=%d",
247 	       vm->usm.asid, gpusvm, notifier->notifier.invalidate_seq,
248 	       mmu_range->start, mmu_range->end, mmu_range->event);
249 
250 	/* Adjust invalidation to notifier boundaries */
251 	adj_start = max(drm_gpusvm_notifier_start(notifier), adj_start);
252 	adj_end = min(drm_gpusvm_notifier_end(notifier), adj_end);
253 
254 	first = drm_gpusvm_range_find(notifier, adj_start, adj_end);
255 	if (!first)
256 		return;
257 
258 	/*
259 	 * PTs may be getting destroyed so not safe to touch these but PT should
260 	 * be invalidated at this point in time. Regardless we still need to
261 	 * ensure any dma mappings are unmapped in the here.
262 	 */
263 	if (xe_vm_is_closed(vm))
264 		goto range_notifier_event_end;
265 
266 	/*
267 	 * XXX: Less than ideal to always wait on VM's resv slots if an
268 	 * invalidation is not required. Could walk range list twice to figure
269 	 * out if an invalidations is need, but also not ideal.
270 	 */
271 	err = dma_resv_wait_timeout(xe_vm_resv(vm),
272 				    DMA_RESV_USAGE_BOOKKEEP,
273 				    false, MAX_SCHEDULE_TIMEOUT);
274 	XE_WARN_ON(err <= 0);
275 
276 	r = first;
277 	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
278 		tile_mask |= xe_svm_range_notifier_event_begin(vm, r, mmu_range,
279 							       &adj_start,
280 							       &adj_end);
281 	if (!tile_mask)
282 		goto range_notifier_event_end;
283 
284 	xe_device_wmb(xe);
285 
286 	err = xe_tlb_inval_range_tilemask_submit(xe, vm->usm.asid, adj_start, adj_end,
287 						 tile_mask, &batch);
288 	if (!WARN_ON_ONCE(err))
289 		xe_tlb_inval_batch_wait(&batch);
290 
291 range_notifier_event_end:
292 	r = first;
293 	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
294 		xe_svm_range_notifier_event_end(vm, r, mmu_range);
295 	for_each_tile(tile, xe, id) {
296 		if (tile_mask & BIT(id)) {
297 			xe_svm_tlb_inval_us_stats_incr(tile->primary_gt, start);
298 			if (tile->media_gt)
299 				xe_svm_tlb_inval_us_stats_incr(tile->media_gt, start);
300 		}
301 	}
302 }
303 
304 static int __xe_svm_garbage_collector(struct xe_vm *vm,
305 				      struct xe_svm_range *range)
306 {
307 	struct drm_gpusvm_ctx ctx = { .in_notifier = false, };
308 	struct dma_fence *fence;
309 
310 	range_debug(range, "GARBAGE COLLECTOR");
311 
312 	xe_vm_lock(vm, false);
313 	fence = xe_vm_range_unbind(vm, range);
314 	xe_vm_unlock(vm);
315 	if (IS_ERR(fence))
316 		return PTR_ERR(fence);
317 	dma_fence_put(fence);
318 
319 	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &range->pages,
320 			       drm_gpusvm_range_size(&range->base) >> PAGE_SHIFT,
321 			       &ctx);
322 
323 	drm_gpusvm_range_remove(&vm->svm.gpusvm, &range->base);
324 
325 	return 0;
326 }
327 
328 static void xe_vma_set_default_attributes(struct xe_vma *vma)
329 {
330 	struct xe_vma_mem_attr default_attr = {
331 		.preferred_loc.devmem_fd = DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE,
332 		.preferred_loc.migration_policy = DRM_XE_MIGRATE_ALL_PAGES,
333 		.pat_index = vma->attr.default_pat_index,
334 		.atomic_access = DRM_XE_ATOMIC_UNDEFINED,
335 		.purgeable_state = XE_MADV_PURGEABLE_WILLNEED,
336 	};
337 
338 	xe_vma_mem_attr_copy(&vma->attr, &default_attr);
339 }
340 
341 static int xe_svm_range_set_default_attr(struct xe_vm *vm, u64 start, u64 end)
342 {
343 	struct xe_vma *vma;
344 	bool has_default_attr;
345 	int err;
346 
347 	vma = xe_vm_find_vma_by_addr(vm, start);
348 	if (!vma)
349 		return -EINVAL;
350 
351 	if (!(vma->gpuva.flags & XE_VMA_MADV_AUTORESET)) {
352 		drm_dbg(&vm->xe->drm, "Skipping madvise reset for vma.\n");
353 		return 0;
354 	}
355 
356 	vm_dbg(&vm->xe->drm, "Existing VMA start=0x%016llx, vma_end=0x%016llx",
357 	       xe_vma_start(vma), xe_vma_end(vma));
358 
359 	has_default_attr = xe_vma_has_default_mem_attrs(vma);
360 
361 	if (has_default_attr) {
362 		start = xe_vma_start(vma);
363 		end = xe_vma_end(vma);
364 	} else if (xe_vma_start(vma) == start && xe_vma_end(vma) == end) {
365 		xe_vma_set_default_attributes(vma);
366 	}
367 
368 	xe_vm_find_cpu_addr_mirror_vma_range(vm, &start, &end);
369 
370 	if (xe_vma_start(vma) == start && xe_vma_end(vma) == end && has_default_attr)
371 		return 0;
372 
373 	vm_dbg(&vm->xe->drm, "New VMA start=0x%016llx, vma_end=0x%016llx",  start, end);
374 
375 	err = xe_vm_alloc_cpu_addr_mirror_vma(vm, start, end - start);
376 	if (err) {
377 		drm_warn(&vm->xe->drm, "New VMA MAP failed: %pe\n", ERR_PTR(err));
378 		xe_vm_kill(vm, true);
379 		return err;
380 	}
381 
382 	/*
383 	 * On call from xe_svm_handle_pagefault original VMA might be changed
384 	 * signal this to lookup for VMA again.
385 	 */
386 	return -EAGAIN;
387 }
388 
389 static int xe_svm_garbage_collector(struct xe_vm *vm)
390 {
391 	struct xe_svm_range *range;
392 	u64 range_start;
393 	u64 range_end;
394 	int err, ret = 0;
395 
396 	lockdep_assert_held_write(&vm->lock);
397 
398 	if (xe_vm_is_closed_or_banned(vm))
399 		return -ENOENT;
400 
401 	for (;;) {
402 		spin_lock(&vm->svm.garbage_collector.lock);
403 		range = list_first_entry_or_null(&vm->svm.garbage_collector.range_list,
404 						 typeof(*range),
405 						 garbage_collector_link);
406 		if (!range)
407 			break;
408 
409 		range_start = xe_svm_range_start(range);
410 		range_end = xe_svm_range_end(range);
411 
412 		list_del(&range->garbage_collector_link);
413 		spin_unlock(&vm->svm.garbage_collector.lock);
414 
415 		err = __xe_svm_garbage_collector(vm, range);
416 		if (err) {
417 			drm_warn(&vm->xe->drm,
418 				 "Garbage collection failed: %pe\n",
419 				 ERR_PTR(err));
420 			xe_vm_kill(vm, true);
421 			return err;
422 		}
423 
424 		err = xe_svm_range_set_default_attr(vm, range_start, range_end);
425 		if (err) {
426 			if (err == -EAGAIN)
427 				ret = -EAGAIN;
428 			else
429 				return err;
430 		}
431 	}
432 	spin_unlock(&vm->svm.garbage_collector.lock);
433 
434 	return ret;
435 }
436 
437 static void xe_svm_garbage_collector_work_func(struct work_struct *w)
438 {
439 	struct xe_vm *vm = container_of(w, struct xe_vm,
440 					svm.garbage_collector.work);
441 
442 	down_write(&vm->lock);
443 	xe_svm_garbage_collector(vm);
444 	up_write(&vm->lock);
445 }
446 
447 #if IS_ENABLED(CONFIG_DRM_XE_PAGEMAP)
448 
449 static struct xe_vram_region *xe_pagemap_to_vr(struct xe_pagemap *xpagemap)
450 {
451 	return xpagemap->vr;
452 }
453 
454 static struct xe_pagemap *xe_page_to_pagemap(struct page *page)
455 {
456 	return container_of(page_pgmap(page), struct xe_pagemap, pagemap);
457 }
458 
459 static struct xe_vram_region *xe_page_to_vr(struct page *page)
460 {
461 	return xe_pagemap_to_vr(xe_page_to_pagemap(page));
462 }
463 
464 static u64 xe_page_to_dpa(struct page *page)
465 {
466 	struct xe_pagemap *xpagemap = xe_page_to_pagemap(page);
467 	struct xe_vram_region *vr = xe_pagemap_to_vr(xpagemap);
468 	u64 hpa_base = xpagemap->hpa_base;
469 	u64 pfn = page_to_pfn(page);
470 	u64 offset;
471 	u64 dpa;
472 
473 	xe_assert(vr->xe, is_device_private_page(page));
474 	xe_assert(vr->xe, (pfn << PAGE_SHIFT) >= hpa_base);
475 
476 	offset = (pfn << PAGE_SHIFT) - hpa_base;
477 	dpa = vr->dpa_base + offset;
478 
479 	return dpa;
480 }
481 
482 static u64 xe_page_to_pcie(struct page *page)
483 {
484 	struct xe_pagemap *xpagemap = xe_page_to_pagemap(page);
485 	struct xe_vram_region *vr = xe_pagemap_to_vr(xpagemap);
486 
487 	return xe_page_to_dpa(page) - vr->dpa_base + vr->io_start;
488 }
489 
490 enum xe_svm_copy_dir {
491 	XE_SVM_COPY_TO_VRAM,
492 	XE_SVM_COPY_TO_SRAM,
493 };
494 
495 static void xe_svm_copy_kb_stats_incr(struct xe_gt *gt,
496 				      const enum xe_svm_copy_dir dir,
497 				      int kb)
498 {
499 	if (dir == XE_SVM_COPY_TO_VRAM) {
500 		switch (kb) {
501 		case 4:
502 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_4K_DEVICE_COPY_KB, kb);
503 			break;
504 		case 64:
505 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_64K_DEVICE_COPY_KB, kb);
506 			break;
507 		case 2048:
508 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_2M_DEVICE_COPY_KB, kb);
509 			break;
510 		}
511 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_DEVICE_COPY_KB, kb);
512 	} else {
513 		switch (kb) {
514 		case 4:
515 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_4K_CPU_COPY_KB, kb);
516 			break;
517 		case 64:
518 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_64K_CPU_COPY_KB, kb);
519 			break;
520 		case 2048:
521 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_2M_CPU_COPY_KB, kb);
522 			break;
523 		}
524 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_CPU_COPY_KB, kb);
525 	}
526 }
527 
528 static void xe_svm_copy_us_stats_incr(struct xe_gt *gt,
529 				      const enum xe_svm_copy_dir dir,
530 				      unsigned long npages,
531 				      ktime_t start)
532 {
533 	s64 us_delta = xe_gt_stats_ktime_us_delta(start);
534 
535 	if (dir == XE_SVM_COPY_TO_VRAM) {
536 		switch (npages) {
537 		case 1:
538 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_4K_DEVICE_COPY_US,
539 					 us_delta);
540 			break;
541 		case 16:
542 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_64K_DEVICE_COPY_US,
543 					 us_delta);
544 			break;
545 		case 512:
546 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_2M_DEVICE_COPY_US,
547 					 us_delta);
548 			break;
549 		}
550 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_DEVICE_COPY_US,
551 				 us_delta);
552 	} else {
553 		switch (npages) {
554 		case 1:
555 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_4K_CPU_COPY_US,
556 					 us_delta);
557 			break;
558 		case 16:
559 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_64K_CPU_COPY_US,
560 					 us_delta);
561 			break;
562 		case 512:
563 			xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_2M_CPU_COPY_US,
564 					 us_delta);
565 			break;
566 		}
567 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_CPU_COPY_US,
568 				 us_delta);
569 	}
570 }
571 
572 static int xe_svm_copy(struct page **pages,
573 		       struct drm_pagemap_addr *pagemap_addr,
574 		       unsigned long npages, const enum xe_svm_copy_dir dir,
575 		       struct dma_fence *pre_migrate_fence)
576 {
577 	struct xe_vram_region *vr = NULL;
578 	struct xe_gt *gt = NULL;
579 	struct xe_device *xe;
580 	struct dma_fence *fence = NULL;
581 	unsigned long i;
582 #define XE_VRAM_ADDR_INVALID	~0x0ull
583 	u64 vram_addr = XE_VRAM_ADDR_INVALID;
584 	int err = 0, pos = 0;
585 	bool sram = dir == XE_SVM_COPY_TO_SRAM;
586 	ktime_t start = xe_gt_stats_ktime_get();
587 
588 	/*
589 	 * This flow is complex: it locates physically contiguous device pages,
590 	 * derives the starting physical address, and performs a single GPU copy
591 	 * to for every 8M chunk in a DMA address array. Both device pages and
592 	 * DMA addresses may be sparsely populated. If either is NULL, a copy is
593 	 * triggered based on the current search state. The last GPU copy is
594 	 * waited on to ensure all copies are complete.
595 	 */
596 
597 	for (i = 0; i < npages; ++i) {
598 		struct page *spage = pages[i];
599 		struct dma_fence *__fence;
600 		u64 __vram_addr;
601 		bool match = false, chunk, last;
602 
603 #define XE_MIGRATE_CHUNK_SIZE	SZ_8M
604 		chunk = (i - pos) == (XE_MIGRATE_CHUNK_SIZE / PAGE_SIZE);
605 		last = (i + 1) == npages;
606 
607 		/* No CPU page and no device pages queue'd to copy */
608 		if (!pagemap_addr[i].addr && vram_addr == XE_VRAM_ADDR_INVALID)
609 			continue;
610 
611 		if (!vr && spage) {
612 			vr = xe_page_to_vr(spage);
613 			gt = xe_migrate_exec_queue(vr->migrate)->gt;
614 			xe = vr->xe;
615 		}
616 		XE_WARN_ON(spage && xe_page_to_vr(spage) != vr);
617 
618 		/*
619 		 * CPU page and device page valid, capture physical address on
620 		 * first device page, check if physical contiguous on subsequent
621 		 * device pages.
622 		 */
623 		if (pagemap_addr[i].addr && spage) {
624 			__vram_addr = xe_page_to_dpa(spage);
625 			if (vram_addr == XE_VRAM_ADDR_INVALID) {
626 				vram_addr = __vram_addr;
627 				pos = i;
628 			}
629 
630 			match = vram_addr + PAGE_SIZE * (i - pos) == __vram_addr;
631 			/* Expected with contiguous memory */
632 			xe_assert(vr->xe, match);
633 
634 			if (pagemap_addr[i].order) {
635 				i += NR_PAGES(pagemap_addr[i].order) - 1;
636 				chunk = (i - pos) == (XE_MIGRATE_CHUNK_SIZE / PAGE_SIZE);
637 				last = (i + 1) == npages;
638 			}
639 		}
640 
641 		/*
642 		 * Mismatched physical address, 8M copy chunk, or last page -
643 		 * trigger a copy.
644 		 */
645 		if (!match || chunk || last) {
646 			/*
647 			 * Extra page for first copy if last page and matching
648 			 * physical address.
649 			 */
650 			int incr = (match && last) ? 1 : 0;
651 
652 			if (vram_addr != XE_VRAM_ADDR_INVALID) {
653 				xe_svm_copy_kb_stats_incr(gt, dir,
654 							  (i - pos + incr) *
655 							  (PAGE_SIZE / SZ_1K));
656 				if (sram) {
657 					vm_dbg(&xe->drm,
658 					       "COPY TO SRAM - 0x%016llx -> 0x%016llx, NPAGES=%ld",
659 					       vram_addr,
660 					       (u64)pagemap_addr[pos].addr, i - pos + incr);
661 					__fence = xe_migrate_from_vram(vr->migrate,
662 								       i - pos + incr,
663 								       vram_addr,
664 								       &pagemap_addr[pos],
665 								       pre_migrate_fence);
666 				} else {
667 					vm_dbg(&xe->drm,
668 					       "COPY TO VRAM - 0x%016llx -> 0x%016llx, NPAGES=%ld",
669 					       (u64)pagemap_addr[pos].addr, vram_addr,
670 					       i - pos + incr);
671 					__fence = xe_migrate_to_vram(vr->migrate,
672 								     i - pos + incr,
673 								     &pagemap_addr[pos],
674 								     vram_addr,
675 								     pre_migrate_fence);
676 				}
677 				if (IS_ERR(__fence)) {
678 					err = PTR_ERR(__fence);
679 					goto err_out;
680 				}
681 				pre_migrate_fence = NULL;
682 				dma_fence_put(fence);
683 				fence = __fence;
684 			}
685 
686 			/* Setup physical address of next device page */
687 			if (pagemap_addr[i].addr && spage) {
688 				vram_addr = __vram_addr;
689 				pos = i;
690 			} else {
691 				vram_addr = XE_VRAM_ADDR_INVALID;
692 			}
693 
694 			/* Extra mismatched device page, copy it */
695 			if (!match && last && vram_addr != XE_VRAM_ADDR_INVALID) {
696 				xe_svm_copy_kb_stats_incr(gt, dir,
697 							  (PAGE_SIZE / SZ_1K));
698 				if (sram) {
699 					vm_dbg(&xe->drm,
700 					       "COPY TO SRAM - 0x%016llx -> 0x%016llx, NPAGES=%d",
701 					       vram_addr, (u64)pagemap_addr[pos].addr, 1);
702 					__fence = xe_migrate_from_vram(vr->migrate, 1,
703 								       vram_addr,
704 								       &pagemap_addr[pos],
705 								       pre_migrate_fence);
706 				} else {
707 					vm_dbg(&xe->drm,
708 					       "COPY TO VRAM - 0x%016llx -> 0x%016llx, NPAGES=%d",
709 					       (u64)pagemap_addr[pos].addr, vram_addr, 1);
710 					__fence = xe_migrate_to_vram(vr->migrate, 1,
711 								     &pagemap_addr[pos],
712 								     vram_addr,
713 								     pre_migrate_fence);
714 				}
715 				if (IS_ERR(__fence)) {
716 					err = PTR_ERR(__fence);
717 					goto err_out;
718 				}
719 				pre_migrate_fence = NULL;
720 				dma_fence_put(fence);
721 				fence = __fence;
722 			}
723 		}
724 	}
725 
726 err_out:
727 	/* Wait for all copies to complete */
728 	if (fence) {
729 		dma_fence_wait(fence, false);
730 		dma_fence_put(fence);
731 	}
732 	if (pre_migrate_fence)
733 		dma_fence_wait(pre_migrate_fence, false);
734 
735 	/*
736 	 * XXX: We can't derive the GT here (or anywhere in this functions, but
737 	 * compute always uses the primary GT so accumulate stats on the likely
738 	 * GT of the fault.
739 	 */
740 	if (gt)
741 		xe_svm_copy_us_stats_incr(gt, dir, npages, start);
742 
743 	return err;
744 #undef XE_MIGRATE_CHUNK_SIZE
745 #undef XE_VRAM_ADDR_INVALID
746 }
747 
748 static int xe_svm_copy_to_devmem(struct page **pages,
749 				 struct drm_pagemap_addr *pagemap_addr,
750 				 unsigned long npages,
751 				 struct dma_fence *pre_migrate_fence)
752 {
753 	return xe_svm_copy(pages, pagemap_addr, npages, XE_SVM_COPY_TO_VRAM,
754 			   pre_migrate_fence);
755 }
756 
757 static int xe_svm_copy_to_ram(struct page **pages,
758 			      struct drm_pagemap_addr *pagemap_addr,
759 			      unsigned long npages,
760 			      struct dma_fence *pre_migrate_fence)
761 {
762 	return xe_svm_copy(pages, pagemap_addr, npages, XE_SVM_COPY_TO_SRAM,
763 			   pre_migrate_fence);
764 }
765 
766 static struct xe_bo *to_xe_bo(struct drm_pagemap_devmem *devmem_allocation)
767 {
768 	return container_of(devmem_allocation, struct xe_bo, devmem_allocation);
769 }
770 
771 static void xe_svm_devmem_release(struct drm_pagemap_devmem *devmem_allocation)
772 {
773 	struct xe_bo *bo = to_xe_bo(devmem_allocation);
774 	struct xe_device *xe = xe_bo_device(bo);
775 
776 	dma_fence_put(devmem_allocation->pre_migrate_fence);
777 	xe_bo_put_async(bo);
778 	xe_pm_runtime_put(xe);
779 }
780 
781 static u64 block_offset_to_pfn(struct drm_pagemap *dpagemap, u64 offset)
782 {
783 	struct xe_pagemap *xpagemap = container_of(dpagemap, typeof(*xpagemap), dpagemap);
784 
785 	return PHYS_PFN(offset + xpagemap->hpa_base);
786 }
787 
788 static struct gpu_buddy *vram_to_buddy(struct xe_vram_region *vram)
789 {
790 	return &vram->ttm.mm;
791 }
792 
793 static int xe_svm_populate_devmem_pfn(struct drm_pagemap_devmem *devmem_allocation,
794 				      unsigned long npages, unsigned long *pfn)
795 {
796 	struct xe_bo *bo = to_xe_bo(devmem_allocation);
797 	struct ttm_resource *res = bo->ttm.resource;
798 	struct list_head *blocks = &to_xe_ttm_vram_mgr_resource(res)->blocks;
799 	struct xe_vram_region *vr = xe_map_resource_to_region(res);
800 	struct gpu_buddy *buddy = vram_to_buddy(vr);
801 	struct gpu_buddy_block *block;
802 	int j = 0;
803 
804 	list_for_each_entry(block, blocks, link) {
805 		u64 block_pfn = block_offset_to_pfn(devmem_allocation->dpagemap,
806 						    gpu_buddy_block_offset(block));
807 		int i;
808 
809 		for (i = 0; i < gpu_buddy_block_size(buddy, block) >> PAGE_SHIFT; ++i)
810 			pfn[j++] = block_pfn + i;
811 	}
812 
813 	return 0;
814 }
815 
816 static const struct drm_pagemap_devmem_ops dpagemap_devmem_ops = {
817 	.devmem_release = xe_svm_devmem_release,
818 	.populate_devmem_pfn = xe_svm_populate_devmem_pfn,
819 	.copy_to_devmem = xe_svm_copy_to_devmem,
820 	.copy_to_ram = xe_svm_copy_to_ram,
821 };
822 
823 #else
824 static int xe_svm_get_pagemaps(struct xe_vm *vm)
825 {
826 	return 0;
827 }
828 #endif
829 
830 static const struct drm_gpusvm_ops gpusvm_ops = {
831 	.range_alloc = xe_svm_range_alloc,
832 	.range_free = xe_svm_range_free,
833 	.invalidate = xe_svm_invalidate,
834 };
835 
836 static const unsigned long fault_chunk_sizes[] = {
837 	SZ_2M,
838 	SZ_64K,
839 	SZ_4K,
840 };
841 
842 static void xe_pagemap_put(struct xe_pagemap *xpagemap)
843 {
844 	drm_pagemap_put(&xpagemap->dpagemap);
845 }
846 
847 static void xe_svm_put_pagemaps(struct xe_vm *vm)
848 {
849 	struct xe_device *xe = vm->xe;
850 	struct xe_tile *tile;
851 	int id;
852 
853 	for_each_tile(tile, xe, id) {
854 		struct xe_pagemap *xpagemap = vm->svm.pagemaps[id];
855 
856 		if (xpagemap)
857 			xe_pagemap_put(xpagemap);
858 		vm->svm.pagemaps[id] = NULL;
859 	}
860 }
861 
862 static struct device *xe_peer_to_dev(struct drm_pagemap_peer *peer)
863 {
864 	if (peer->private == XE_PEER_PAGEMAP)
865 		return container_of(peer, struct xe_pagemap, peer)->dpagemap.drm->dev;
866 
867 	return container_of(peer, struct xe_vm, svm.peer)->xe->drm.dev;
868 }
869 
870 static bool xe_has_interconnect(struct drm_pagemap_peer *peer1,
871 				struct drm_pagemap_peer *peer2)
872 {
873 	struct device *dev1 = xe_peer_to_dev(peer1);
874 	struct device *dev2 = xe_peer_to_dev(peer2);
875 
876 	if (dev1 == dev2)
877 		return true;
878 
879 	return pci_p2pdma_distance(to_pci_dev(dev1), dev2, true) >= 0;
880 }
881 
882 static DRM_PAGEMAP_OWNER_LIST_DEFINE(xe_owner_list);
883 
884 /**
885  * xe_svm_init() - SVM initialize
886  * @vm: The VM.
887  *
888  * Initialize SVM state which is embedded within the VM.
889  *
890  * Return: 0 on success, negative error code on error.
891  */
892 int xe_svm_init(struct xe_vm *vm)
893 {
894 	int err;
895 
896 	if (vm->flags & XE_VM_FLAG_FAULT_MODE) {
897 		spin_lock_init(&vm->svm.garbage_collector.lock);
898 		INIT_LIST_HEAD(&vm->svm.garbage_collector.range_list);
899 		INIT_WORK(&vm->svm.garbage_collector.work,
900 			  xe_svm_garbage_collector_work_func);
901 
902 		vm->svm.peer.private = XE_PEER_VM;
903 		err = drm_pagemap_acquire_owner(&vm->svm.peer, &xe_owner_list,
904 						xe_has_interconnect);
905 		if (err)
906 			return err;
907 
908 		err = xe_svm_get_pagemaps(vm);
909 		if (err) {
910 			drm_pagemap_release_owner(&vm->svm.peer);
911 			return err;
912 		}
913 
914 		err = drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM",
915 				      current->mm, 0, vm->size,
916 				      xe_modparam.svm_notifier_size * SZ_1M,
917 				      &gpusvm_ops, fault_chunk_sizes,
918 				      ARRAY_SIZE(fault_chunk_sizes));
919 		drm_gpusvm_driver_set_lock(&vm->svm.gpusvm, &vm->lock);
920 
921 		if (err) {
922 			xe_svm_put_pagemaps(vm);
923 			drm_pagemap_release_owner(&vm->svm.peer);
924 			return err;
925 		}
926 	} else {
927 		err = drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM (simple)",
928 				      NULL, 0, 0, 0, NULL,
929 				      NULL, 0);
930 	}
931 
932 	return err;
933 }
934 
935 /**
936  * xe_svm_close() - SVM close
937  * @vm: The VM.
938  *
939  * Close SVM state (i.e., stop and flush all SVM actions).
940  */
941 void xe_svm_close(struct xe_vm *vm)
942 {
943 	xe_assert(vm->xe, xe_vm_is_closed(vm));
944 	disable_work_sync(&vm->svm.garbage_collector.work);
945 	xe_svm_put_pagemaps(vm);
946 	drm_pagemap_release_owner(&vm->svm.peer);
947 }
948 
949 /**
950  * xe_svm_fini() - SVM finalize
951  * @vm: The VM.
952  *
953  * Finalize SVM state which is embedded within the VM.
954  */
955 void xe_svm_fini(struct xe_vm *vm)
956 {
957 	struct drm_gpusvm_notifier *notifier, *next;
958 	struct drm_gpusvm_ctx ctx = { .in_notifier = false, };
959 
960 	xe_assert(vm->xe, xe_vm_is_closed(vm));
961 
962 	drm_gpusvm_for_each_notifier_safe(notifier, next, &vm->svm.gpusvm, 0, LONG_MAX) {
963 		struct drm_gpusvm_range *range, *__next;
964 
965 		drm_gpusvm_for_each_range_safe(range, __next, notifier, 0, LONG_MAX)
966 			drm_gpusvm_unmap_pages(&vm->svm.gpusvm,
967 					       &(to_xe_range(range)->pages),
968 					       drm_gpusvm_range_size(range) >> PAGE_SHIFT,
969 					       &ctx);
970 	}
971 
972 	drm_gpusvm_fini(&vm->svm.gpusvm);
973 }
974 
975 static bool xe_svm_range_has_pagemap_locked(const struct xe_svm_range *range,
976 					    const struct drm_pagemap *dpagemap)
977 {
978 	return range->pages.dpagemap == dpagemap;
979 }
980 
981 static bool xe_svm_range_has_pagemap(struct xe_svm_range *range,
982 				     const struct drm_pagemap *dpagemap)
983 {
984 	struct xe_vm *vm = range_to_vm(&range->base);
985 	bool ret;
986 
987 	xe_svm_notifier_lock(vm);
988 	ret = xe_svm_range_has_pagemap_locked(range, dpagemap);
989 	xe_svm_notifier_unlock(vm);
990 
991 	return ret;
992 }
993 
994 static bool xe_svm_range_is_valid(struct xe_svm_range *range,
995 				  struct xe_tile *tile,
996 				  bool devmem_only,
997 				  const struct drm_pagemap *dpagemap)
998 
999 {
1000 	return (xe_vm_has_valid_gpu_mapping(tile, range->tile_present,
1001 					    range->tile_invalidated) &&
1002 		(!devmem_only || xe_svm_range_has_pagemap(range, dpagemap)));
1003 }
1004 
1005 /** xe_svm_range_migrate_to_smem() - Move range pages from VRAM to SMEM
1006  * @vm: xe_vm pointer
1007  * @range: Pointer to the SVM range structure
1008  *
1009  * The xe_svm_range_migrate_to_smem() checks range has pages in VRAM
1010  * and migrates them to SMEM
1011  */
1012 void xe_svm_range_migrate_to_smem(struct xe_vm *vm, struct xe_svm_range *range)
1013 {
1014 	if (xe_svm_range_in_vram(range))
1015 		drm_gpusvm_range_evict(&vm->svm.gpusvm, &range->base);
1016 }
1017 
1018 /**
1019  * xe_svm_range_validate() - Check if the SVM range is valid
1020  * @vm: xe_vm pointer
1021  * @range: Pointer to the SVM range structure
1022  * @tile_mask: Mask representing the tiles to be checked
1023  * @dpagemap: if !%NULL, the range is expected to be present
1024  * in device memory identified by this parameter.
1025  *
1026  * The xe_svm_range_validate() function checks if a range is
1027  * valid and located in the desired memory region.
1028  *
1029  * Return: true if the range is valid, false otherwise
1030  */
1031 bool xe_svm_range_validate(struct xe_vm *vm,
1032 			   struct xe_svm_range *range,
1033 			   u8 tile_mask, const struct drm_pagemap *dpagemap)
1034 {
1035 	bool ret;
1036 
1037 	xe_svm_notifier_lock(vm);
1038 
1039 	ret = (range->tile_present & ~range->tile_invalidated & tile_mask) == tile_mask;
1040 	if (dpagemap)
1041 		ret = ret && xe_svm_range_has_pagemap_locked(range, dpagemap);
1042 	else
1043 		ret = ret && !range->pages.dpagemap;
1044 
1045 	xe_svm_notifier_unlock(vm);
1046 
1047 	return ret;
1048 }
1049 
1050 /**
1051  * xe_svm_find_vma_start - Find start of CPU VMA
1052  * @vm: xe_vm pointer
1053  * @start: start address
1054  * @end: end address
1055  * @vma: Pointer to struct xe_vma
1056  *
1057  *
1058  * This function searches for a cpu vma, within the specified
1059  * range [start, end] in the given VM. It adjusts the range based on the
1060  * xe_vma start and end addresses. If no cpu VMA is found, it returns ULONG_MAX.
1061  *
1062  * Return: The starting address of the VMA within the range,
1063  * or ULONG_MAX if no VMA is found
1064  */
1065 u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 start, u64 end, struct xe_vma *vma)
1066 {
1067 	return drm_gpusvm_find_vma_start(&vm->svm.gpusvm,
1068 					 max(start, xe_vma_start(vma)),
1069 					 min(end, xe_vma_end(vma)));
1070 }
1071 
1072 #if IS_ENABLED(CONFIG_DRM_XE_PAGEMAP)
1073 static int xe_drm_pagemap_populate_mm(struct drm_pagemap *dpagemap,
1074 				      unsigned long start, unsigned long end,
1075 				      struct mm_struct *mm,
1076 				      unsigned long timeslice_ms)
1077 {
1078 	struct xe_pagemap *xpagemap = container_of(dpagemap, typeof(*xpagemap), dpagemap);
1079 	struct drm_pagemap_migrate_details mdetails = {
1080 		.timeslice_ms = timeslice_ms,
1081 	};
1082 	struct xe_vram_region *vr = xe_pagemap_to_vr(xpagemap);
1083 	struct dma_fence *pre_migrate_fence = NULL;
1084 	struct xe_device *xe = vr->xe;
1085 	struct device *dev = xe->drm.dev;
1086 	struct xe_validation_ctx vctx;
1087 	struct drm_exec exec;
1088 	struct xe_bo *bo;
1089 	int err = 0, idx;
1090 
1091 	if (!drm_dev_enter(&xe->drm, &idx))
1092 		return -ENODEV;
1093 
1094 	xe_pm_runtime_get(xe);
1095 
1096 	xe_validation_guard(&vctx, &xe->val, &exec, (struct xe_val_flags) {}, err) {
1097 		bo = xe_bo_create_locked(xe, NULL, NULL, end - start,
1098 					 ttm_bo_type_device,
1099 					 (IS_DGFX(xe) ? XE_BO_FLAG_VRAM(vr) : XE_BO_FLAG_SYSTEM) |
1100 					 XE_BO_FLAG_CPU_ADDR_MIRROR, &exec);
1101 		drm_exec_retry_on_contention(&exec);
1102 		if (IS_ERR(bo)) {
1103 			err = PTR_ERR(bo);
1104 			xe_validation_retry_on_oom(&vctx, &err);
1105 			break;
1106 		}
1107 
1108 		/* Ensure that any clearing or async eviction will complete before migration. */
1109 		if (!dma_resv_test_signaled(bo->ttm.base.resv, DMA_RESV_USAGE_KERNEL)) {
1110 			err = dma_resv_get_singleton(bo->ttm.base.resv, DMA_RESV_USAGE_KERNEL,
1111 						     &pre_migrate_fence);
1112 			if (err)
1113 				dma_resv_wait_timeout(bo->ttm.base.resv, DMA_RESV_USAGE_KERNEL,
1114 						      false, MAX_SCHEDULE_TIMEOUT);
1115 			else if (pre_migrate_fence)
1116 				dma_fence_enable_signaling(pre_migrate_fence);
1117 		}
1118 
1119 		drm_pagemap_devmem_init(&bo->devmem_allocation, dev, mm,
1120 					&dpagemap_devmem_ops, dpagemap, end - start,
1121 					pre_migrate_fence);
1122 
1123 		xe_bo_get(bo);
1124 
1125 		/* Ensure the device has a pm ref while there are device pages active. */
1126 		xe_pm_runtime_get_noresume(xe);
1127 		/* Consumes the devmem allocation ref. */
1128 		err = drm_pagemap_migrate_to_devmem(&bo->devmem_allocation, mm,
1129 						    start, end, &mdetails);
1130 		xe_bo_unlock(bo);
1131 		xe_bo_put(bo);
1132 	}
1133 	xe_pm_runtime_put(xe);
1134 	drm_dev_exit(idx);
1135 
1136 	return err;
1137 }
1138 #endif
1139 
1140 static bool supports_4K_migration(struct xe_device *xe)
1141 {
1142 	if (xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
1143 		return false;
1144 
1145 	return true;
1146 }
1147 
1148 /**
1149  * xe_svm_range_needs_migrate_to_vram() - SVM range needs migrate to VRAM or not
1150  * @range: SVM range for which migration needs to be decided
1151  * @vma: vma which has range
1152  * @dpagemap: The preferred struct drm_pagemap to migrate to.
1153  *
1154  * Return: True for range needing migration and migration is supported else false
1155  */
1156 bool xe_svm_range_needs_migrate_to_vram(struct xe_svm_range *range, struct xe_vma *vma,
1157 					const struct drm_pagemap *dpagemap)
1158 {
1159 	struct xe_vm *vm = range_to_vm(&range->base);
1160 	u64 range_size = xe_svm_range_size(range);
1161 	struct drm_gpusvm_range_flags flags = {
1162 		/* READ_ONCE pairs with WRITE_ONCE in drm_gpusvm_range_set_unmapped() */
1163 		.__flags = READ_ONCE(range->base.flags.__flags),
1164 	};
1165 
1166 	if (!flags.migrate_devmem || !dpagemap)
1167 		return false;
1168 
1169 	xe_assert(vm->xe, IS_DGFX(vm->xe));
1170 
1171 	if (xe_svm_range_has_pagemap(range, dpagemap)) {
1172 		drm_dbg(&vm->xe->drm, "Range is already in VRAM\n");
1173 		return false;
1174 	}
1175 
1176 	if (range_size < SZ_64K && !supports_4K_migration(vm->xe)) {
1177 		drm_dbg(&vm->xe->drm, "Platform doesn't support SZ_4K range migration\n");
1178 		return false;
1179 	}
1180 
1181 	return true;
1182 }
1183 
1184 #define DECL_SVM_RANGE_COUNT_STATS(elem, stat) \
1185 static void xe_svm_range_##elem##_count_stats_incr(struct xe_gt *gt, \
1186 						   struct xe_svm_range *range) \
1187 { \
1188 	switch (xe_svm_range_size(range)) { \
1189 	case SZ_4K: \
1190 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_4K_##stat##_COUNT, 1); \
1191 		break; \
1192 	case SZ_64K: \
1193 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_64K_##stat##_COUNT, 1); \
1194 		break; \
1195 	case SZ_2M: \
1196 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_2M_##stat##_COUNT, 1); \
1197 		break; \
1198 	} \
1199 } \
1200 
1201 DECL_SVM_RANGE_COUNT_STATS(fault, PAGEFAULT)
1202 DECL_SVM_RANGE_COUNT_STATS(valid_fault, VALID_PAGEFAULT)
1203 DECL_SVM_RANGE_COUNT_STATS(migrate, MIGRATE)
1204 
1205 #define DECL_SVM_RANGE_US_STATS(elem, stat) \
1206 static void xe_svm_range_##elem##_us_stats_incr(struct xe_gt *gt, \
1207 						struct xe_svm_range *range, \
1208 						ktime_t start) \
1209 { \
1210 	s64 us_delta = xe_gt_stats_ktime_us_delta(start); \
1211 \
1212 	switch (xe_svm_range_size(range)) { \
1213 	case SZ_4K: \
1214 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_4K_##stat##_US, \
1215 				 us_delta); \
1216 		break; \
1217 	case SZ_64K: \
1218 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_64K_##stat##_US, \
1219 				 us_delta); \
1220 		break; \
1221 	case SZ_2M: \
1222 		xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_2M_##stat##_US, \
1223 				 us_delta); \
1224 		break; \
1225 	} \
1226 } \
1227 
1228 DECL_SVM_RANGE_US_STATS(migrate, MIGRATE)
1229 DECL_SVM_RANGE_US_STATS(get_pages, GET_PAGES)
1230 DECL_SVM_RANGE_US_STATS(bind, BIND)
1231 DECL_SVM_RANGE_US_STATS(fault, PAGEFAULT)
1232 
1233 static int __xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
1234 				     struct xe_gt *gt, u64 fault_addr,
1235 				     bool need_vram)
1236 {
1237 	int devmem_possible = IS_DGFX(vm->xe) &&
1238 		IS_ENABLED(CONFIG_DRM_XE_PAGEMAP);
1239 	struct drm_gpusvm_ctx ctx = {
1240 		.read_only = xe_vma_read_only(vma),
1241 		.devmem_possible = devmem_possible,
1242 		.check_pages_threshold = devmem_possible ? SZ_64K : 0,
1243 		.devmem_only = need_vram && devmem_possible,
1244 		.timeslice_ms = need_vram && devmem_possible ?
1245 			vm->xe->atomic_svm_timeslice_ms : 0,
1246 	};
1247 	struct xe_validation_ctx vctx;
1248 	struct drm_exec exec;
1249 	struct xe_svm_range *range;
1250 	struct drm_gpusvm_range_flags range_flags;
1251 	struct dma_fence *fence;
1252 	struct drm_pagemap *dpagemap;
1253 	struct xe_tile *tile = gt_to_tile(gt);
1254 	int migrate_try_count = ctx.devmem_only ? 3 : 1;
1255 	ktime_t start = xe_gt_stats_ktime_get(), bind_start, get_pages_start;
1256 	int err;
1257 
1258 	lockdep_assert_held_write(&vm->lock);
1259 	xe_assert(vm->xe, xe_vma_is_cpu_addr_mirror(vma));
1260 
1261 	xe_gt_stats_incr(gt, XE_GT_STATS_ID_SVM_PAGEFAULT_COUNT, 1);
1262 
1263 retry:
1264 	/* Always process UNMAPs first so view SVM ranges is current */
1265 	err = xe_svm_garbage_collector(vm);
1266 	if (err)
1267 		return err;
1268 
1269 	dpagemap = ctx.devmem_only ? xe_tile_local_pagemap(tile) :
1270 		xe_vma_resolve_pagemap(vma, tile);
1271 	ctx.device_private_page_owner = xe_svm_private_page_owner(vm, !dpagemap);
1272 	range = xe_svm_range_find_or_insert(vm, fault_addr, vma, &ctx);
1273 
1274 	if (IS_ERR(range))
1275 		return PTR_ERR(range);
1276 
1277 	xe_svm_range_fault_count_stats_incr(gt, range);
1278 
1279 	/* READ_ONCE pairs with WRITE_ONCE in drm_gpusvm_range_set_unmapped() */
1280 	range_flags.__flags = READ_ONCE(range->base.flags.__flags);
1281 	if (ctx.devmem_only && !range_flags.migrate_devmem)
1282 		return -EACCES;
1283 
1284 	if (xe_svm_range_is_valid(range, tile, ctx.devmem_only, dpagemap)) {
1285 		xe_svm_range_valid_fault_count_stats_incr(gt, range);
1286 		range_debug(range, "PAGE FAULT - VALID");
1287 		goto out;
1288 	}
1289 
1290 	range_debug(range, "PAGE FAULT");
1291 
1292 	if (--migrate_try_count >= 0 &&
1293 	    xe_svm_range_needs_migrate_to_vram(range, vma, dpagemap)) {
1294 		ktime_t migrate_start = xe_gt_stats_ktime_get();
1295 
1296 		xe_svm_range_migrate_count_stats_incr(gt, range);
1297 		err = xe_svm_alloc_vram(range, &ctx, dpagemap);
1298 		xe_svm_range_migrate_us_stats_incr(gt, range, migrate_start);
1299 		ctx.timeslice_ms <<= 1;	/* Double timeslice if we have to retry */
1300 		if (err) {
1301 			if (migrate_try_count || !ctx.devmem_only) {
1302 				drm_dbg(&vm->xe->drm,
1303 					"VRAM allocation failed, falling back to retrying fault, asid=%u, errno=%pe\n",
1304 					vm->usm.asid, ERR_PTR(err));
1305 
1306 				/*
1307 				 * In the devmem-only case, mixed mappings may
1308 				 * be found. The get_pages function will fix
1309 				 * these up to a single location, allowing the
1310 				 * page fault handler to make forward progress.
1311 				 */
1312 				if (ctx.devmem_only)
1313 					goto get_pages;
1314 				else
1315 					goto retry;
1316 			} else {
1317 				drm_err(&vm->xe->drm,
1318 					"VRAM allocation failed, retry count exceeded, asid=%u, errno=%pe\n",
1319 					vm->usm.asid, ERR_PTR(err));
1320 				return err;
1321 			}
1322 		}
1323 	}
1324 
1325 get_pages:
1326 	get_pages_start = xe_gt_stats_ktime_get();
1327 
1328 	range_debug(range, "GET PAGES");
1329 	err = xe_svm_range_get_pages(vm, range, &ctx);
1330 	/* Corner where CPU mappings have changed */
1331 	if (err == -EOPNOTSUPP || err == -EFAULT || err == -EPERM) {
1332 		ctx.timeslice_ms <<= 1;	/* Double timeslice if we have to retry */
1333 		if (migrate_try_count > 0 || !ctx.devmem_only) {
1334 			drm_dbg(&vm->xe->drm,
1335 				"Get pages failed, falling back to retrying, asid=%u, gpusvm=%p, errno=%pe\n",
1336 				vm->usm.asid, &vm->svm.gpusvm, ERR_PTR(err));
1337 			range_debug(range, "PAGE FAULT - RETRY PAGES");
1338 			goto retry;
1339 		} else {
1340 			drm_err(&vm->xe->drm,
1341 				"Get pages failed, retry count exceeded, asid=%u, gpusvm=%p, errno=%pe\n",
1342 				vm->usm.asid, &vm->svm.gpusvm, ERR_PTR(err));
1343 		}
1344 	}
1345 	if (err) {
1346 		range_debug(range, "PAGE FAULT - FAIL PAGE COLLECT");
1347 		goto out;
1348 	} else if (IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM)) {
1349 		drm_dbg(&vm->xe->drm, "After page collect data location is %sin \"%s\".\n",
1350 			xe_svm_range_has_pagemap(range, dpagemap) ? "" : "NOT ",
1351 			dpagemap ? dpagemap->drm->unique : "System.");
1352 	}
1353 
1354 	xe_svm_range_get_pages_us_stats_incr(gt, range, get_pages_start);
1355 	range_debug(range, "PAGE FAULT - BIND");
1356 
1357 	bind_start = xe_gt_stats_ktime_get();
1358 	xe_validation_guard(&vctx, &vm->xe->val, &exec, (struct xe_val_flags) {}, err) {
1359 		err = xe_vm_drm_exec_lock(vm, &exec);
1360 		drm_exec_retry_on_contention(&exec);
1361 
1362 		xe_vm_set_validation_exec(vm, &exec);
1363 		fence = xe_vm_range_rebind(vm, vma, range, BIT(tile->id));
1364 		xe_vm_set_validation_exec(vm, NULL);
1365 		if (IS_ERR(fence)) {
1366 			drm_exec_retry_on_contention(&exec);
1367 			err = PTR_ERR(fence);
1368 			xe_validation_retry_on_oom(&vctx, &err);
1369 			xe_svm_range_bind_us_stats_incr(gt, range, bind_start);
1370 			break;
1371 		}
1372 	}
1373 	if (err)
1374 		goto err_out;
1375 
1376 	dma_fence_wait(fence, false);
1377 	dma_fence_put(fence);
1378 	xe_svm_range_bind_us_stats_incr(gt, range, bind_start);
1379 
1380 out:
1381 	xe_svm_range_fault_us_stats_incr(gt, range, start);
1382 	return 0;
1383 
1384 err_out:
1385 	if (err == -EAGAIN) {
1386 		ctx.timeslice_ms <<= 1;	/* Double timeslice if we have to retry */
1387 		range_debug(range, "PAGE FAULT - RETRY BIND");
1388 		goto retry;
1389 	}
1390 
1391 	return err;
1392 }
1393 
1394 /**
1395  * xe_svm_handle_pagefault() - SVM handle page fault
1396  * @vm: The VM.
1397  * @vma: The CPU address mirror VMA.
1398  * @gt: The gt upon the fault occurred.
1399  * @fault_addr: The GPU fault address.
1400  * @atomic: The fault atomic access bit.
1401  *
1402  * Create GPU bindings for a SVM page fault. Optionally migrate to device
1403  * memory.
1404  *
1405  * Return: 0 on success, negative error code on error.
1406  */
1407 int xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
1408 			    struct xe_gt *gt, u64 fault_addr,
1409 			    bool atomic)
1410 {
1411 	int need_vram, ret;
1412 retry:
1413 	need_vram = xe_vma_need_vram_for_atomic(vm->xe, vma, atomic);
1414 	if (need_vram < 0)
1415 		return need_vram;
1416 
1417 	ret =  __xe_svm_handle_pagefault(vm, vma, gt, fault_addr,
1418 					 need_vram ? true : false);
1419 	if (ret == -EAGAIN) {
1420 		/*
1421 		 * Retry once on -EAGAIN to re-lookup the VMA, as the original VMA
1422 		 * may have been split by xe_svm_range_set_default_attr.
1423 		 */
1424 		vma = xe_vm_find_vma_by_addr(vm, fault_addr);
1425 		if (!vma)
1426 			return -EINVAL;
1427 
1428 		goto retry;
1429 	}
1430 	return ret;
1431 }
1432 
1433 /**
1434  * xe_svm_has_mapping() - SVM has mappings
1435  * @vm: The VM.
1436  * @start: Start address.
1437  * @end: End address.
1438  *
1439  * Check if an address range has SVM mappings.
1440  *
1441  * Return: True if address range has a SVM mapping, False otherwise
1442  */
1443 bool xe_svm_has_mapping(struct xe_vm *vm, u64 start, u64 end)
1444 {
1445 	return drm_gpusvm_has_mapping(&vm->svm.gpusvm, start, end);
1446 }
1447 
1448 /**
1449  * xe_svm_unmap_address_range - UNMAP SVM mappings and ranges
1450  * @vm: The VM
1451  * @start: start addr
1452  * @end: end addr
1453  *
1454  * This function UNMAPS svm ranges if start or end address are inside them.
1455  */
1456 void xe_svm_unmap_address_range(struct xe_vm *vm, u64 start, u64 end)
1457 {
1458 	struct drm_gpusvm_notifier *notifier, *next;
1459 
1460 	lockdep_assert_held_write(&vm->lock);
1461 
1462 	drm_gpusvm_for_each_notifier_safe(notifier, next, &vm->svm.gpusvm, start, end) {
1463 		struct drm_gpusvm_range *range, *__next;
1464 
1465 		drm_gpusvm_for_each_range_safe(range, __next, notifier, start, end) {
1466 			if (start > drm_gpusvm_range_start(range) ||
1467 			    end < drm_gpusvm_range_end(range)) {
1468 				if (IS_DGFX(vm->xe) && xe_svm_range_in_vram(to_xe_range(range)))
1469 					drm_gpusvm_range_evict(&vm->svm.gpusvm, range);
1470 				drm_gpusvm_range_get(range);
1471 				__xe_svm_garbage_collector(vm, to_xe_range(range));
1472 				if (!list_empty(&to_xe_range(range)->garbage_collector_link)) {
1473 					spin_lock(&vm->svm.garbage_collector.lock);
1474 					list_del(&to_xe_range(range)->garbage_collector_link);
1475 					spin_unlock(&vm->svm.garbage_collector.lock);
1476 				}
1477 				drm_gpusvm_range_put(range);
1478 			}
1479 		}
1480 	}
1481 }
1482 
1483 /**
1484  * xe_svm_bo_evict() - SVM evict BO to system memory
1485  * @bo: BO to evict
1486  *
1487  * SVM evict BO to system memory. GPU SVM layer ensures all device pages
1488  * are evicted before returning.
1489  *
1490  * Return: 0 on success standard error code otherwise
1491  */
1492 int xe_svm_bo_evict(struct xe_bo *bo)
1493 {
1494 	return drm_pagemap_evict_to_ram(&bo->devmem_allocation);
1495 }
1496 
1497 /**
1498  * xe_svm_range_find_or_insert- Find or insert GPU SVM range
1499  * @vm: xe_vm pointer
1500  * @addr: address for which range needs to be found/inserted
1501  * @vma:  Pointer to struct xe_vma which mirrors CPU
1502  * @ctx: GPU SVM context
1503  *
1504  * This function finds or inserts a newly allocated a SVM range based on the
1505  * address.
1506  *
1507  * Return: Pointer to the SVM range on success, ERR_PTR() on failure.
1508  */
1509 struct xe_svm_range *xe_svm_range_find_or_insert(struct xe_vm *vm, u64 addr,
1510 						 struct xe_vma *vma, struct drm_gpusvm_ctx *ctx)
1511 {
1512 	struct drm_gpusvm_range *r;
1513 
1514 	r = drm_gpusvm_range_find_or_insert(&vm->svm.gpusvm, max(addr, xe_vma_start(vma)),
1515 					    xe_vma_start(vma), xe_vma_end(vma), ctx);
1516 	if (IS_ERR(r))
1517 		return ERR_CAST(r);
1518 
1519 	return to_xe_range(r);
1520 }
1521 
1522 /**
1523  * xe_svm_range_get_pages() - Get pages for a SVM range
1524  * @vm: Pointer to the struct xe_vm
1525  * @range: Pointer to the xe SVM range structure
1526  * @ctx: GPU SVM context
1527  *
1528  * This function gets pages for a SVM range and ensures they are mapped for
1529  * DMA access. In case of failure with -EOPNOTSUPP, it evicts the range.
1530  *
1531  * Return: 0 on success, negative error code on failure.
1532  */
1533 int xe_svm_range_get_pages(struct xe_vm *vm, struct xe_svm_range *range,
1534 			   struct drm_gpusvm_ctx *ctx)
1535 {
1536 	int err = 0;
1537 
1538 	err = drm_gpusvm_get_pages(&vm->svm.gpusvm, &range->pages,
1539 				   vm->svm.gpusvm.mm,
1540 				   &range->base.notifier->notifier,
1541 				   drm_gpusvm_range_start(&range->base),
1542 				   drm_gpusvm_range_end(&range->base), ctx);
1543 	if (err == -EOPNOTSUPP) {
1544 		range_debug(range, "PAGE FAULT - EVICT PAGES");
1545 		drm_gpusvm_range_evict(&vm->svm.gpusvm, &range->base);
1546 	}
1547 
1548 	return err;
1549 }
1550 
1551 /**
1552  * xe_svm_ranges_zap_ptes_in_range - clear ptes of svm ranges in input range
1553  * @vm: Pointer to the xe_vm structure
1554  * @start: Start of the input range
1555  * @end: End of the input range
1556  *
1557  * This function removes the page table entries (PTEs) associated
1558  * with the svm ranges within the given input start and end
1559  *
1560  * Return: tile_mask for which gt's need to be tlb invalidated.
1561  */
1562 u8 xe_svm_ranges_zap_ptes_in_range(struct xe_vm *vm, u64 start, u64 end)
1563 {
1564 	struct drm_gpusvm_notifier *notifier;
1565 	struct xe_svm_range *range;
1566 	u64 adj_start, adj_end;
1567 	struct xe_tile *tile;
1568 	u8 tile_mask = 0;
1569 	u8 id;
1570 
1571 	lockdep_assert(lockdep_is_held_type(&vm->svm.gpusvm.notifier_lock, 1) &&
1572 		       lockdep_is_held_type(&vm->lock, 0));
1573 
1574 	drm_gpusvm_for_each_notifier(notifier, &vm->svm.gpusvm, start, end) {
1575 		struct drm_gpusvm_range *r = NULL;
1576 
1577 		adj_start = max(start, drm_gpusvm_notifier_start(notifier));
1578 		adj_end = min(end, drm_gpusvm_notifier_end(notifier));
1579 		drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end) {
1580 			range = to_xe_range(r);
1581 			for_each_tile(tile, vm->xe, id) {
1582 				if (xe_pt_zap_ptes_range(tile, vm, range)) {
1583 					tile_mask |= BIT(id);
1584 					/*
1585 					 * WRITE_ONCE pairs with READ_ONCE in
1586 					 * xe_vm_has_valid_gpu_mapping().
1587 					 * Must not fail after setting
1588 					 * tile_invalidated and before
1589 					 * TLB invalidation.
1590 					 */
1591 					WRITE_ONCE(range->tile_invalidated,
1592 						   range->tile_invalidated | BIT(id));
1593 				}
1594 			}
1595 		}
1596 	}
1597 
1598 	return tile_mask;
1599 }
1600 
1601 #if IS_ENABLED(CONFIG_DRM_XE_PAGEMAP)
1602 
1603 /**
1604  * xe_vma_resolve_pagemap - Resolve the appropriate DRM pagemap for a VMA
1605  * @vma: Pointer to the xe_vma structure containing memory attributes
1606  * @tile: Pointer to the xe_tile structure used as fallback for VRAM mapping
1607  *
1608  * This function determines the correct DRM pagemap to use for a given VMA.
1609  * It first checks if a valid devmem_fd is provided in the VMA's preferred
1610  * location. If the devmem_fd is negative, it returns NULL, indicating no
1611  * pagemap is available and smem to be used as preferred location.
1612  * If the devmem_fd is equal to the default faulting
1613  * GT identifier, it returns the VRAM pagemap associated with the tile.
1614  *
1615  * Future support for multi-device configurations may use drm_pagemap_from_fd()
1616  * to resolve pagemaps from arbitrary file descriptors.
1617  *
1618  * Return: A pointer to the resolved drm_pagemap, or NULL if none is applicable.
1619  */
1620 struct drm_pagemap *xe_vma_resolve_pagemap(struct xe_vma *vma, struct xe_tile *tile)
1621 {
1622 	struct drm_pagemap *dpagemap = vma->attr.preferred_loc.dpagemap;
1623 	s32 fd;
1624 
1625 	if (dpagemap)
1626 		return dpagemap;
1627 
1628 	fd = (s32)vma->attr.preferred_loc.devmem_fd;
1629 
1630 	if (fd == DRM_XE_PREFERRED_LOC_DEFAULT_SYSTEM)
1631 		return NULL;
1632 
1633 	if (fd == DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE)
1634 		return IS_DGFX(tile_to_xe(tile)) ? xe_tile_local_pagemap(tile) : NULL;
1635 
1636 	return NULL;
1637 }
1638 
1639 /**
1640  * xe_svm_alloc_vram()- Allocate device memory pages for range,
1641  * migrating existing data.
1642  * @range: SVM range
1643  * @ctx: DRM GPU SVM context
1644  * @dpagemap: The struct drm_pagemap representing the memory to allocate.
1645  *
1646  * Return: 0 on success, error code on failure.
1647  */
1648 int xe_svm_alloc_vram(struct xe_svm_range *range, const struct drm_gpusvm_ctx *ctx,
1649 		      struct drm_pagemap *dpagemap)
1650 {
1651 	static DECLARE_RWSEM(driver_migrate_lock);
1652 	struct xe_vm *vm = range_to_vm(&range->base);
1653 	enum drm_gpusvm_scan_result migration_state;
1654 	struct xe_device *xe = vm->xe;
1655 	int err, retries = 1;
1656 	bool write_locked = false;
1657 	struct drm_gpusvm_range_flags flags = {
1658 		/* READ_ONCE pairs with WRITE_ONCE in drm_gpusvm_range_set_unmapped() */
1659 		.__flags = READ_ONCE(range->base.flags.__flags),
1660 	};
1661 
1662 	xe_assert(range_to_vm(&range->base)->xe, flags.migrate_devmem);
1663 	range_debug(range, "ALLOCATE VRAM");
1664 
1665 	migration_state = drm_gpusvm_scan_mm(&range->base,
1666 					     xe_svm_private_page_owner(vm, false),
1667 					     dpagemap->pagemap);
1668 
1669 	if (migration_state == DRM_GPUSVM_SCAN_EQUAL) {
1670 		if (IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM))
1671 			drm_dbg(dpagemap->drm, "Already migrated!\n");
1672 		return 0;
1673 	}
1674 
1675 	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM))
1676 		drm_dbg(&xe->drm, "Request migration to device memory on \"%s\".\n",
1677 			dpagemap->drm->unique);
1678 
1679 	err = down_read_interruptible(&driver_migrate_lock);
1680 	if (err)
1681 		return err;
1682 	do {
1683 		err = drm_pagemap_populate_mm(dpagemap, xe_svm_range_start(range),
1684 					      xe_svm_range_end(range),
1685 					      range->base.gpusvm->mm,
1686 					      ctx->timeslice_ms);
1687 
1688 		if (err == -EBUSY && retries) {
1689 			if (!write_locked) {
1690 				int lock_err;
1691 
1692 				up_read(&driver_migrate_lock);
1693 				lock_err = down_write_killable(&driver_migrate_lock);
1694 				if (lock_err)
1695 					return lock_err;
1696 				write_locked = true;
1697 			}
1698 			drm_gpusvm_range_evict(range->base.gpusvm, &range->base);
1699 		}
1700 	} while (err == -EBUSY && retries--);
1701 	if (write_locked)
1702 		up_write(&driver_migrate_lock);
1703 	else
1704 		up_read(&driver_migrate_lock);
1705 
1706 	return err;
1707 }
1708 
1709 static struct drm_pagemap_addr
1710 xe_drm_pagemap_device_map(struct drm_pagemap *dpagemap,
1711 			  struct device *dev,
1712 			  struct page *page,
1713 			  unsigned int order,
1714 			  enum dma_data_direction dir)
1715 {
1716 	struct device *pgmap_dev = dpagemap->drm->dev;
1717 	enum drm_interconnect_protocol prot;
1718 	dma_addr_t addr;
1719 
1720 	if (pgmap_dev == dev) {
1721 		addr = xe_page_to_dpa(page);
1722 		prot = XE_INTERCONNECT_VRAM;
1723 	} else {
1724 		addr = dma_map_resource(dev,
1725 					xe_page_to_pcie(page),
1726 					PAGE_SIZE << order, dir,
1727 					DMA_ATTR_SKIP_CPU_SYNC);
1728 		prot = XE_INTERCONNECT_P2P;
1729 	}
1730 
1731 	return drm_pagemap_addr_encode(addr, prot, order, dir);
1732 }
1733 
1734 static void xe_drm_pagemap_device_unmap(struct drm_pagemap *dpagemap,
1735 					struct device *dev,
1736 					const struct drm_pagemap_addr *addr)
1737 {
1738 	if (addr->proto != XE_INTERCONNECT_P2P)
1739 		return;
1740 
1741 	dma_unmap_resource(dev, addr->addr, PAGE_SIZE << addr->order,
1742 			   addr->dir, DMA_ATTR_SKIP_CPU_SYNC);
1743 }
1744 
1745 static void xe_pagemap_destroy_work(struct work_struct *work)
1746 {
1747 	struct xe_pagemap *xpagemap = container_of(work, typeof(*xpagemap), destroy_work);
1748 	struct dev_pagemap *pagemap = &xpagemap->pagemap;
1749 	struct drm_device *drm = xpagemap->dpagemap.drm;
1750 	int idx;
1751 
1752 	/*
1753 	 * Only unmap / release if devm_ release hasn't run yet.
1754 	 * Otherwise the devm_ callbacks have already released, or
1755 	 * will do shortly.
1756 	 */
1757 	if (drm_dev_enter(drm, &idx)) {
1758 		devm_memunmap_pages(drm->dev, pagemap);
1759 		devm_release_mem_region(drm->dev, pagemap->range.start,
1760 					pagemap->range.end - pagemap->range.start + 1);
1761 		drm_dev_exit(idx);
1762 	}
1763 
1764 	drm_pagemap_release_owner(&xpagemap->peer);
1765 	kfree(xpagemap);
1766 }
1767 
1768 static void xe_pagemap_destroy(struct drm_pagemap *dpagemap, bool from_atomic_or_reclaim)
1769 {
1770 	struct xe_pagemap *xpagemap = container_of(dpagemap, typeof(*xpagemap), dpagemap);
1771 	struct xe_device *xe = to_xe_device(dpagemap->drm);
1772 
1773 	if (from_atomic_or_reclaim)
1774 		queue_work(xe->destroy_wq, &xpagemap->destroy_work);
1775 	else
1776 		xe_pagemap_destroy_work(&xpagemap->destroy_work);
1777 }
1778 
1779 static const struct drm_pagemap_ops xe_drm_pagemap_ops = {
1780 	.device_map = xe_drm_pagemap_device_map,
1781 	.device_unmap = xe_drm_pagemap_device_unmap,
1782 	.populate_mm = xe_drm_pagemap_populate_mm,
1783 	.destroy = xe_pagemap_destroy,
1784 };
1785 
1786 /**
1787  * xe_pagemap_create() - Create a struct xe_pagemap object
1788  * @xe: The xe device.
1789  * @vr: Back-pointer to the struct xe_vram_region.
1790  *
1791  * Allocate and initialize a struct xe_pagemap. On successful
1792  * return, drm_pagemap_put() on the embedded struct drm_pagemap
1793  * should be used to unreference.
1794  *
1795  * Return: Pointer to a struct xe_pagemap if successful. Error pointer
1796  * on failure.
1797  */
1798 static struct xe_pagemap *xe_pagemap_create(struct xe_device *xe, struct xe_vram_region *vr)
1799 {
1800 	struct device *dev = xe->drm.dev;
1801 	struct xe_pagemap *xpagemap;
1802 	struct dev_pagemap *pagemap;
1803 	struct drm_pagemap *dpagemap;
1804 	struct resource *res;
1805 	void *addr;
1806 	int err;
1807 
1808 	xpagemap = kzalloc_obj(*xpagemap);
1809 	if (!xpagemap)
1810 		return ERR_PTR(-ENOMEM);
1811 
1812 	pagemap = &xpagemap->pagemap;
1813 	dpagemap = &xpagemap->dpagemap;
1814 	INIT_WORK(&xpagemap->destroy_work, xe_pagemap_destroy_work);
1815 	xpagemap->vr = vr;
1816 	xpagemap->peer.private = XE_PEER_PAGEMAP;
1817 
1818 	err = drm_pagemap_init(dpagemap, pagemap, &xe->drm, &xe_drm_pagemap_ops);
1819 	if (err)
1820 		goto out_no_dpagemap;
1821 
1822 	res = devm_request_free_mem_region(dev, &iomem_resource,
1823 					   vr->usable_size);
1824 	if (IS_ERR(res)) {
1825 		err = PTR_ERR(res);
1826 		goto out_err;
1827 	}
1828 
1829 	err = drm_pagemap_acquire_owner(&xpagemap->peer, &xe_owner_list,
1830 					xe_has_interconnect);
1831 	if (err)
1832 		goto out_no_owner;
1833 
1834 	pagemap->type = MEMORY_DEVICE_PRIVATE;
1835 	pagemap->range.start = res->start;
1836 	pagemap->range.end = res->end;
1837 	pagemap->nr_range = 1;
1838 	pagemap->owner = xpagemap->peer.owner;
1839 	pagemap->ops = drm_pagemap_pagemap_ops_get();
1840 	addr = devm_memremap_pages(dev, pagemap);
1841 	if (IS_ERR(addr)) {
1842 		err = PTR_ERR(addr);
1843 		goto out_no_pages;
1844 	}
1845 	xpagemap->hpa_base = res->start;
1846 	return xpagemap;
1847 
1848 out_no_pages:
1849 	drm_pagemap_release_owner(&xpagemap->peer);
1850 out_no_owner:
1851 	devm_release_mem_region(dev, res->start, res->end - res->start + 1);
1852 out_err:
1853 	drm_pagemap_put(dpagemap);
1854 	return ERR_PTR(err);
1855 
1856 out_no_dpagemap:
1857 	kfree(xpagemap);
1858 	return ERR_PTR(err);
1859 }
1860 
1861 /**
1862  * xe_pagemap_find_or_create() - Find or create a struct xe_pagemap
1863  * @xe: The xe device.
1864  * @cache: The struct xe_pagemap_cache.
1865  * @vr: The VRAM region.
1866  *
1867  * Check if there is an already used xe_pagemap for this tile, and in that case,
1868  * return it.
1869  * If not, check if there is a cached xe_pagemap for this tile, and in that case,
1870  * cancel its destruction, re-initialize it and return it.
1871  * Finally if there is no cached or already used pagemap, create one and
1872  * register it in the tile's pagemap cache.
1873  *
1874  * Note that this function is typically called from within an IOCTL, and waits are
1875  * therefore carried out interruptible if possible.
1876  *
1877  * Return: A pointer to a struct xe_pagemap if successful, Error pointer on failure.
1878  */
1879 static struct xe_pagemap *
1880 xe_pagemap_find_or_create(struct xe_device *xe, struct drm_pagemap_cache *cache,
1881 			  struct xe_vram_region *vr)
1882 {
1883 	struct drm_pagemap *dpagemap;
1884 	struct xe_pagemap *xpagemap;
1885 	int err;
1886 
1887 	err = drm_pagemap_cache_lock_lookup(cache);
1888 	if (err)
1889 		return ERR_PTR(err);
1890 
1891 	dpagemap = drm_pagemap_get_from_cache(cache);
1892 	if (IS_ERR(dpagemap)) {
1893 		xpagemap = ERR_CAST(dpagemap);
1894 	} else if (!dpagemap) {
1895 		xpagemap = xe_pagemap_create(xe, vr);
1896 		if (IS_ERR(xpagemap))
1897 			goto out_unlock;
1898 		drm_pagemap_cache_set_pagemap(cache, &xpagemap->dpagemap);
1899 	} else {
1900 		xpagemap = container_of(dpagemap, typeof(*xpagemap), dpagemap);
1901 	}
1902 
1903 out_unlock:
1904 	drm_pagemap_cache_unlock_lookup(cache);
1905 	return xpagemap;
1906 }
1907 
1908 static int xe_svm_get_pagemaps(struct xe_vm *vm)
1909 {
1910 	struct xe_device *xe = vm->xe;
1911 	struct xe_pagemap *xpagemap;
1912 	struct xe_tile *tile;
1913 	int id;
1914 
1915 	for_each_tile(tile, xe, id) {
1916 		struct xe_vram_region *vr;
1917 
1918 		if (!((BIT(id) << 1) & xe->info.mem_region_mask))
1919 			continue;
1920 
1921 		vr = xe_tile_to_vr(tile);
1922 		xpagemap = xe_pagemap_find_or_create(xe, vr->dpagemap_cache, vr);
1923 		if (IS_ERR(xpagemap))
1924 			break;
1925 		vm->svm.pagemaps[id] = xpagemap;
1926 	}
1927 
1928 	if (IS_ERR(xpagemap)) {
1929 		xe_svm_put_pagemaps(vm);
1930 		return PTR_ERR(xpagemap);
1931 	}
1932 
1933 	return 0;
1934 }
1935 
1936 /**
1937  * xe_pagemap_shrinker_create() - Create a drm_pagemap shrinker
1938  * @xe: The xe device
1939  *
1940  * Create a drm_pagemap shrinker and register with the xe device.
1941  *
1942  * Return: %0 on success, negative error code on failure.
1943  */
1944 int xe_pagemap_shrinker_create(struct xe_device *xe)
1945 {
1946 	xe->usm.dpagemap_shrinker = drm_pagemap_shrinker_create_devm(&xe->drm);
1947 	return PTR_ERR_OR_ZERO(xe->usm.dpagemap_shrinker);
1948 }
1949 
1950 /**
1951  * xe_pagemap_cache_create() - Create a drm_pagemap cache
1952  * @tile: The tile to register the cache with
1953  *
1954  * Create a drm_pagemap cache and register with the tile.
1955  *
1956  * Return: %0 on success, negative error code on failure.
1957  */
1958 int xe_pagemap_cache_create(struct xe_tile *tile)
1959 {
1960 	struct xe_device *xe = tile_to_xe(tile);
1961 
1962 	if (IS_DGFX(xe)) {
1963 		struct drm_pagemap_cache *cache =
1964 			drm_pagemap_cache_create_devm(xe->usm.dpagemap_shrinker);
1965 
1966 		if (IS_ERR(cache))
1967 			return PTR_ERR(cache);
1968 
1969 		tile->mem.vram->dpagemap_cache = cache;
1970 	}
1971 
1972 	return 0;
1973 }
1974 
1975 static struct drm_pagemap *xe_devmem_open(struct xe_device *xe, u32 region_instance)
1976 {
1977 	u32 tile_id = region_instance - 1;
1978 	struct xe_pagemap *xpagemap;
1979 	struct xe_vram_region *vr;
1980 
1981 	if (tile_id >= xe->info.tile_count)
1982 		return ERR_PTR(-ENOENT);
1983 
1984 	if (!((BIT(tile_id) << 1) & xe->info.mem_region_mask))
1985 		return ERR_PTR(-ENOENT);
1986 
1987 	vr = xe_tile_to_vr(&xe->tiles[tile_id]);
1988 
1989 	/* Returns a reference-counted embedded struct drm_pagemap */
1990 	xpagemap = xe_pagemap_find_or_create(xe, vr->dpagemap_cache, vr);
1991 	if (IS_ERR(xpagemap))
1992 		return ERR_CAST(xpagemap);
1993 
1994 	return &xpagemap->dpagemap;
1995 }
1996 
1997 /**
1998  * xe_drm_pagemap_from_fd() - Return a drm_pagemap pointer from a
1999  * (file_descriptor, region_instance) pair.
2000  * @fd: An fd opened against an xe device.
2001  * @region_instance: The region instance representing the device memory
2002  * on the opened xe device.
2003  *
2004  * Opens a struct drm_pagemap pointer on the
2005  * indicated device and region_instance.
2006  *
2007  * Return: A reference-counted struct drm_pagemap pointer on success,
2008  * negative error pointer on failure.
2009  */
2010 struct drm_pagemap *xe_drm_pagemap_from_fd(int fd, u32 region_instance)
2011 {
2012 	struct drm_pagemap *dpagemap;
2013 	struct file *file;
2014 	struct drm_file *fpriv;
2015 	struct drm_device *drm;
2016 	int idx;
2017 
2018 	if (fd <= 0)
2019 		return ERR_PTR(-EINVAL);
2020 
2021 	file = fget(fd);
2022 	if (!file)
2023 		return ERR_PTR(-ENOENT);
2024 
2025 	if (!xe_is_xe_file(file)) {
2026 		dpagemap = ERR_PTR(-ENOENT);
2027 		goto out;
2028 	}
2029 
2030 	fpriv = file->private_data;
2031 	drm = fpriv->minor->dev;
2032 	if (!drm_dev_enter(drm, &idx)) {
2033 		dpagemap = ERR_PTR(-ENODEV);
2034 		goto out;
2035 	}
2036 
2037 	dpagemap = xe_devmem_open(to_xe_device(drm), region_instance);
2038 	drm_dev_exit(idx);
2039 out:
2040 	fput(file);
2041 	return dpagemap;
2042 }
2043 
2044 #else
2045 
2046 int xe_pagemap_shrinker_create(struct xe_device *xe)
2047 {
2048 	return 0;
2049 }
2050 
2051 int xe_pagemap_cache_create(struct xe_tile *tile)
2052 {
2053 	return 0;
2054 }
2055 
2056 int xe_svm_alloc_vram(struct xe_svm_range *range,
2057 		      const struct drm_gpusvm_ctx *ctx,
2058 		      struct drm_pagemap *dpagemap)
2059 {
2060 	return -EOPNOTSUPP;
2061 }
2062 
2063 struct drm_pagemap *xe_vma_resolve_pagemap(struct xe_vma *vma, struct xe_tile *tile)
2064 {
2065 	return NULL;
2066 }
2067 
2068 struct drm_pagemap *xe_drm_pagemap_from_fd(int fd, u32 region_instance)
2069 {
2070 	return ERR_PTR(-ENOENT);
2071 }
2072 
2073 #endif
2074 
2075 /**
2076  * xe_svm_flush() - SVM flush
2077  * @vm: The VM.
2078  *
2079  * Flush all SVM actions.
2080  */
2081 void xe_svm_flush(struct xe_vm *vm)
2082 {
2083 	if (xe_vm_in_fault_mode(vm))
2084 		flush_work(&vm->svm.garbage_collector.work);
2085 }
2086