1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Dave Engebretsen IBM Corporation 4 */ 5 6 #include <linux/sched.h> 7 #include <linux/interrupt.h> 8 #include <linux/irq.h> 9 #include <linux/of.h> 10 #include <linux/overflow.h> 11 #include <linux/fs.h> 12 #include <linux/reboot.h> 13 #include <linux/irq_work.h> 14 15 #include <asm/machdep.h> 16 #include <asm/rtas.h> 17 #include <asm/firmware.h> 18 #include <asm/mce.h> 19 20 #include "pseries.h" 21 22 static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; 23 static DEFINE_SPINLOCK(ras_log_buf_lock); 24 25 static int ras_check_exception_token; 26 27 #define EPOW_SENSOR_TOKEN 9 28 #define EPOW_SENSOR_INDEX 0 29 30 /* EPOW events counter variable */ 31 static int num_epow_events; 32 33 static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id); 34 static irqreturn_t ras_epow_interrupt(int irq, void *dev_id); 35 static irqreturn_t ras_error_interrupt(int irq, void *dev_id); 36 37 /* RTAS pseries MCE errorlog section. */ 38 struct pseries_mc_errorlog { 39 __be32 fru_id; 40 __be32 proc_id; 41 u8 error_type; 42 /* 43 * sub_err_type (1 byte). Bit fields depends on error_type 44 * 45 * MSB0 46 * | 47 * V 48 * 01234567 49 * XXXXXXXX 50 * 51 * For error_type == MC_ERROR_TYPE_UE 52 * XXXXXXXX 53 * X 1: Permanent or Transient UE. 54 * X 1: Effective address provided. 55 * X 1: Logical address provided. 56 * XX 2: Reserved. 57 * XXX 3: Type of UE error. 58 * 59 * For error_type == MC_ERROR_TYPE_SLB/ERAT/TLB 60 * XXXXXXXX 61 * X 1: Effective address provided. 62 * XXXXX 5: Reserved. 63 * XX 2: Type of SLB/ERAT/TLB error. 64 * 65 * For error_type == MC_ERROR_TYPE_CTRL_MEM_ACCESS 66 * XXXXXXXX 67 * X 1: Error causing address provided. 68 * XXX 3: Type of error. 69 * XXXX 4: Reserved. 70 */ 71 u8 sub_err_type; 72 u8 reserved_1[6]; 73 __be64 effective_address; 74 __be64 logical_address; 75 } __packed; 76 77 /* RTAS pseries MCE error types */ 78 #define MC_ERROR_TYPE_UE 0x00 79 #define MC_ERROR_TYPE_SLB 0x01 80 #define MC_ERROR_TYPE_ERAT 0x02 81 #define MC_ERROR_TYPE_UNKNOWN 0x03 82 #define MC_ERROR_TYPE_TLB 0x04 83 #define MC_ERROR_TYPE_D_CACHE 0x05 84 #define MC_ERROR_TYPE_I_CACHE 0x07 85 #define MC_ERROR_TYPE_CTRL_MEM_ACCESS 0x08 86 87 /* RTAS pseries MCE error sub types */ 88 #define MC_ERROR_UE_INDETERMINATE 0 89 #define MC_ERROR_UE_IFETCH 1 90 #define MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH 2 91 #define MC_ERROR_UE_LOAD_STORE 3 92 #define MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE 4 93 94 #define UE_EFFECTIVE_ADDR_PROVIDED 0x40 95 #define UE_LOGICAL_ADDR_PROVIDED 0x20 96 #define MC_EFFECTIVE_ADDR_PROVIDED 0x80 97 98 #define MC_ERROR_SLB_PARITY 0 99 #define MC_ERROR_SLB_MULTIHIT 1 100 #define MC_ERROR_SLB_INDETERMINATE 2 101 102 #define MC_ERROR_ERAT_PARITY 1 103 #define MC_ERROR_ERAT_MULTIHIT 2 104 #define MC_ERROR_ERAT_INDETERMINATE 3 105 106 #define MC_ERROR_TLB_PARITY 1 107 #define MC_ERROR_TLB_MULTIHIT 2 108 #define MC_ERROR_TLB_INDETERMINATE 3 109 110 #define MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK 0 111 #define MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS 1 112 113 static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog) 114 { 115 switch (mlog->error_type) { 116 case MC_ERROR_TYPE_UE: 117 return (mlog->sub_err_type & 0x07); 118 case MC_ERROR_TYPE_SLB: 119 case MC_ERROR_TYPE_ERAT: 120 case MC_ERROR_TYPE_TLB: 121 return (mlog->sub_err_type & 0x03); 122 case MC_ERROR_TYPE_CTRL_MEM_ACCESS: 123 return (mlog->sub_err_type & 0x70) >> 4; 124 default: 125 return 0; 126 } 127 } 128 129 /* 130 * Enable the hotplug interrupt late because processing them may touch other 131 * devices or systems (e.g. hugepages) that have not been initialized at the 132 * subsys stage. 133 */ 134 static int __init init_ras_hotplug_IRQ(void) 135 { 136 struct device_node *np; 137 138 /* Hotplug Events */ 139 np = of_find_node_by_path("/event-sources/hot-plug-events"); 140 if (np != NULL) { 141 if (dlpar_workqueue_init() == 0) 142 request_event_sources_irqs(np, ras_hotplug_interrupt, 143 "RAS_HOTPLUG"); 144 of_node_put(np); 145 } 146 147 return 0; 148 } 149 machine_late_initcall(pseries, init_ras_hotplug_IRQ); 150 151 /* 152 * Initialize handlers for the set of interrupts caused by hardware errors 153 * and power system events. 154 */ 155 static int __init init_ras_IRQ(void) 156 { 157 struct device_node *np; 158 159 ras_check_exception_token = rtas_function_token(RTAS_FN_CHECK_EXCEPTION); 160 161 /* Internal Errors */ 162 np = of_find_node_by_path("/event-sources/internal-errors"); 163 if (np != NULL) { 164 request_event_sources_irqs(np, ras_error_interrupt, 165 "RAS_ERROR"); 166 of_node_put(np); 167 } 168 169 /* EPOW Events */ 170 np = of_find_node_by_path("/event-sources/epow-events"); 171 if (np != NULL) { 172 request_event_sources_irqs(np, ras_epow_interrupt, "RAS_EPOW"); 173 of_node_put(np); 174 } 175 176 return 0; 177 } 178 machine_subsys_initcall(pseries, init_ras_IRQ); 179 180 #define EPOW_SHUTDOWN_NORMAL 1 181 #define EPOW_SHUTDOWN_ON_UPS 2 182 #define EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS 3 183 #define EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH 4 184 185 static void handle_system_shutdown(char event_modifier) 186 { 187 switch (event_modifier) { 188 case EPOW_SHUTDOWN_NORMAL: 189 pr_emerg("Power off requested\n"); 190 orderly_poweroff(true); 191 break; 192 193 case EPOW_SHUTDOWN_ON_UPS: 194 pr_emerg("Loss of system power detected. System is running on" 195 " UPS/battery. Check RTAS error log for details\n"); 196 break; 197 198 case EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS: 199 pr_emerg("Loss of system critical functions detected. Check" 200 " RTAS error log for details\n"); 201 orderly_poweroff(true); 202 break; 203 204 case EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH: 205 pr_emerg("High ambient temperature detected. Check RTAS" 206 " error log for details\n"); 207 orderly_poweroff(true); 208 break; 209 210 default: 211 pr_err("Unknown power/cooling shutdown event (modifier = %d)\n", 212 event_modifier); 213 } 214 } 215 216 struct epow_errorlog { 217 unsigned char sensor_value; 218 unsigned char event_modifier; 219 unsigned char extended_modifier; 220 unsigned char reserved; 221 unsigned char platform_reason; 222 }; 223 224 #define EPOW_RESET 0 225 #define EPOW_WARN_COOLING 1 226 #define EPOW_WARN_POWER 2 227 #define EPOW_SYSTEM_SHUTDOWN 3 228 #define EPOW_SYSTEM_HALT 4 229 #define EPOW_MAIN_ENCLOSURE 5 230 #define EPOW_POWER_OFF 7 231 232 static void rtas_parse_epow_errlog(struct rtas_error_log *log) 233 { 234 struct pseries_errorlog *pseries_log; 235 struct epow_errorlog *epow_log; 236 char action_code; 237 char modifier; 238 239 pseries_log = get_pseries_errorlog(log, PSERIES_ELOG_SECT_ID_EPOW); 240 if (pseries_log == NULL) 241 return; 242 243 epow_log = (struct epow_errorlog *)pseries_log->data; 244 action_code = epow_log->sensor_value & 0xF; /* bottom 4 bits */ 245 modifier = epow_log->event_modifier & 0xF; /* bottom 4 bits */ 246 247 switch (action_code) { 248 case EPOW_RESET: 249 if (num_epow_events) { 250 pr_info("Non critical power/cooling issue cleared\n"); 251 num_epow_events--; 252 } 253 break; 254 255 case EPOW_WARN_COOLING: 256 pr_info("Non-critical cooling issue detected. Check RTAS error" 257 " log for details\n"); 258 break; 259 260 case EPOW_WARN_POWER: 261 pr_info("Non-critical power issue detected. Check RTAS error" 262 " log for details\n"); 263 break; 264 265 case EPOW_SYSTEM_SHUTDOWN: 266 handle_system_shutdown(modifier); 267 break; 268 269 case EPOW_SYSTEM_HALT: 270 pr_emerg("Critical power/cooling issue detected. Check RTAS" 271 " error log for details. Powering off.\n"); 272 orderly_poweroff(true); 273 break; 274 275 case EPOW_MAIN_ENCLOSURE: 276 case EPOW_POWER_OFF: 277 pr_emerg("System about to lose power. Check RTAS error log " 278 " for details. Powering off immediately.\n"); 279 emergency_sync(); 280 kernel_power_off(); 281 break; 282 283 default: 284 pr_err("Unknown power/cooling event (action code = %d)\n", 285 action_code); 286 } 287 288 /* Increment epow events counter variable */ 289 if (action_code != EPOW_RESET) 290 num_epow_events++; 291 } 292 293 static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id) 294 { 295 struct pseries_errorlog *pseries_log; 296 struct pseries_hp_errorlog *hp_elog; 297 298 spin_lock(&ras_log_buf_lock); 299 300 rtas_call(ras_check_exception_token, 6, 1, NULL, 301 RTAS_VECTOR_EXTERNAL_INTERRUPT, virq_to_hw(irq), 302 RTAS_HOTPLUG_EVENTS, 0, __pa(&ras_log_buf), 303 rtas_get_error_log_max()); 304 305 pseries_log = get_pseries_errorlog((struct rtas_error_log *)ras_log_buf, 306 PSERIES_ELOG_SECT_ID_HOTPLUG); 307 hp_elog = (struct pseries_hp_errorlog *)pseries_log->data; 308 309 /* 310 * Since PCI hotplug is not currently supported on pseries, put PCI 311 * hotplug events on the ras_log_buf to be handled by rtas_errd. 312 */ 313 if (hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_MEM || 314 hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU || 315 hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_PMEM) 316 queue_hotplug_event(hp_elog); 317 else 318 log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0); 319 320 spin_unlock(&ras_log_buf_lock); 321 return IRQ_HANDLED; 322 } 323 324 /* Handle environmental and power warning (EPOW) interrupts. */ 325 static irqreturn_t ras_epow_interrupt(int irq, void *dev_id) 326 { 327 int state; 328 int critical; 329 330 rtas_get_sensor_fast(EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX, &state); 331 332 if (state > 3) 333 critical = 1; /* Time Critical */ 334 else 335 critical = 0; 336 337 spin_lock(&ras_log_buf_lock); 338 339 rtas_call(ras_check_exception_token, 6, 1, NULL, RTAS_VECTOR_EXTERNAL_INTERRUPT, 340 virq_to_hw(irq), RTAS_EPOW_WARNING, critical, __pa(&ras_log_buf), 341 rtas_get_error_log_max()); 342 343 log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0); 344 345 rtas_parse_epow_errlog((struct rtas_error_log *)ras_log_buf); 346 347 spin_unlock(&ras_log_buf_lock); 348 return IRQ_HANDLED; 349 } 350 351 /* 352 * Handle hardware error interrupts. 353 * 354 * RTAS check-exception is called to collect data on the exception. If 355 * the error is deemed recoverable, we log a warning and return. 356 * For nonrecoverable errors, an error is logged and we stop all processing 357 * as quickly as possible in order to prevent propagation of the failure. 358 */ 359 static irqreturn_t ras_error_interrupt(int irq, void *dev_id) 360 { 361 struct rtas_error_log *rtas_elog; 362 int status; 363 int fatal; 364 365 spin_lock(&ras_log_buf_lock); 366 367 status = rtas_call(ras_check_exception_token, 6, 1, NULL, 368 RTAS_VECTOR_EXTERNAL_INTERRUPT, 369 virq_to_hw(irq), 370 RTAS_INTERNAL_ERROR, 1 /* Time Critical */, 371 __pa(&ras_log_buf), 372 rtas_get_error_log_max()); 373 374 rtas_elog = (struct rtas_error_log *)ras_log_buf; 375 376 if (status == 0 && 377 rtas_error_severity(rtas_elog) >= RTAS_SEVERITY_ERROR_SYNC) 378 fatal = 1; 379 else 380 fatal = 0; 381 382 /* format and print the extended information */ 383 log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal); 384 385 if (fatal) { 386 pr_emerg("Fatal hardware error detected. Check RTAS error" 387 " log for details. Powering off immediately\n"); 388 emergency_sync(); 389 kernel_power_off(); 390 } else { 391 pr_err("Recoverable hardware error detected\n"); 392 } 393 394 spin_unlock(&ras_log_buf_lock); 395 return IRQ_HANDLED; 396 } 397 398 /* 399 * Some versions of FWNMI place the buffer inside the 4kB page starting at 400 * 0x7000. Other versions place it inside the rtas buffer. We check both. 401 * Minimum size of the buffer is 16 bytes. 402 */ 403 #define VALID_FWNMI_BUFFER(A) \ 404 ((((A) >= 0x7000) && ((A) <= 0x8000 - 16)) || \ 405 (((A) >= rtas.base) && ((A) <= (rtas.base + rtas.size - 16)))) 406 407 static inline struct rtas_error_log *fwnmi_get_errlog(void) 408 { 409 return (struct rtas_error_log *)local_paca->mce_data_buf; 410 } 411 412 static __be64 *fwnmi_get_savep(struct pt_regs *regs) 413 { 414 unsigned long savep_ra; 415 416 /* Mask top two bits */ 417 savep_ra = regs->gpr[3] & ~(0x3UL << 62); 418 if (!VALID_FWNMI_BUFFER(savep_ra)) { 419 printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]); 420 return NULL; 421 } 422 423 return __va(savep_ra); 424 } 425 426 /* 427 * Get the error information for errors coming through the 428 * FWNMI vectors. The pt_regs' r3 will be updated to reflect 429 * the actual r3 if possible, and a ptr to the error log entry 430 * will be returned if found. 431 * 432 * Use one buffer mce_data_buf per cpu to store RTAS error. 433 * 434 * The mce_data_buf does not have any locks or protection around it, 435 * if a second machine check comes in, or a system reset is done 436 * before we have logged the error, then we will get corruption in the 437 * error log. This is preferable over holding off on calling 438 * ibm,nmi-interlock which would result in us checkstopping if a 439 * second machine check did come in. 440 */ 441 static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs) 442 { 443 struct rtas_error_log *h; 444 u32 extended_log_length; 445 size_t len; 446 __be64 *savep; 447 448 savep = fwnmi_get_savep(regs); 449 if (!savep) 450 return NULL; 451 452 regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */ 453 454 h = (struct rtas_error_log *)&savep[1]; 455 extended_log_length = rtas_error_extended(h) ? rtas_error_extended_log_length(h) : 0; 456 len = struct_size(h, buffer, extended_log_length); 457 len = min(len, RTAS_ERROR_LOG_MAX); 458 /* Use the per cpu buffer from paca to store rtas error log */ 459 memset(local_paca->mce_data_buf, 0, RTAS_ERROR_LOG_MAX); 460 memcpy(local_paca->mce_data_buf, h, len); 461 462 return (struct rtas_error_log *)local_paca->mce_data_buf; 463 } 464 465 /* Call this when done with the data returned by FWNMI_get_errinfo. 466 * It will release the saved data area for other CPUs in the 467 * partition to receive FWNMI errors. 468 */ 469 static void fwnmi_release_errinfo(void) 470 { 471 struct rtas_args rtas_args; 472 int ret; 473 474 /* 475 * On pseries, the machine check stack is limited to under 4GB, so 476 * args can be on-stack. 477 */ 478 rtas_call_unlocked(&rtas_args, ibm_nmi_interlock_token, 0, 1, NULL); 479 ret = be32_to_cpu(rtas_args.rets[0]); 480 if (ret != 0) 481 printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret); 482 } 483 484 int pSeries_system_reset_exception(struct pt_regs *regs) 485 { 486 #ifdef __LITTLE_ENDIAN__ 487 /* 488 * Some firmware byteswaps SRR registers and gives incorrect SRR1. Try 489 * to detect the bad SRR1 pattern here. Flip the NIP back to correct 490 * endian for reporting purposes. Unfortunately the MSR can't be fixed, 491 * so clear it. It will be missing MSR_RI so we won't try to recover. 492 */ 493 if ((be64_to_cpu(regs->msr) & 494 (MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR| 495 MSR_ILE|MSR_HV|MSR_SF)) == (MSR_DR|MSR_SF)) { 496 regs_set_return_ip(regs, be64_to_cpu((__be64)regs->nip)); 497 regs_set_return_msr(regs, 0); 498 } 499 #endif 500 501 if (fwnmi_active) { 502 __be64 *savep; 503 504 /* 505 * Firmware (PowerVM and KVM) saves r3 to a save area like 506 * machine check, which is not exactly what PAPR (2.9) 507 * suggests but there is no way to detect otherwise, so this 508 * is the interface now. 509 * 510 * System resets do not save any error log or require an 511 * "ibm,nmi-interlock" rtas call to release. 512 */ 513 514 savep = fwnmi_get_savep(regs); 515 if (savep) 516 regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */ 517 } 518 519 if (smp_handle_nmi_ipi(regs)) 520 return 1; 521 522 return 0; /* need to perform reset */ 523 } 524 525 static int mce_handle_err_realmode(int disposition, u8 error_type) 526 { 527 #ifdef CONFIG_PPC_BOOK3S_64 528 if (disposition == RTAS_DISP_NOT_RECOVERED) { 529 switch (error_type) { 530 case MC_ERROR_TYPE_ERAT: 531 flush_erat(); 532 disposition = RTAS_DISP_FULLY_RECOVERED; 533 break; 534 case MC_ERROR_TYPE_SLB: 535 #ifdef CONFIG_PPC_64S_HASH_MMU 536 /* 537 * Store the old slb content in paca before flushing. 538 * Print this when we go to virtual mode. 539 * There are chances that we may hit MCE again if there 540 * is a parity error on the SLB entry we trying to read 541 * for saving. Hence limit the slb saving to single 542 * level of recursion. 543 */ 544 if (local_paca->in_mce == 1) 545 slb_save_contents(local_paca->mce_faulty_slbs); 546 flush_and_reload_slb(); 547 disposition = RTAS_DISP_FULLY_RECOVERED; 548 #endif 549 break; 550 default: 551 break; 552 } 553 } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) { 554 /* Platform corrected itself but could be degraded */ 555 pr_err("MCE: limited recovery, system may be degraded\n"); 556 disposition = RTAS_DISP_FULLY_RECOVERED; 557 } 558 #endif 559 return disposition; 560 } 561 562 static int mce_handle_err_virtmode(struct pt_regs *regs, 563 struct rtas_error_log *errp, 564 struct pseries_mc_errorlog *mce_log, 565 int disposition) 566 { 567 struct mce_error_info mce_err = { 0 }; 568 int initiator = rtas_error_initiator(errp); 569 int severity = rtas_error_severity(errp); 570 unsigned long eaddr = 0, paddr = 0; 571 u8 error_type, err_sub_type; 572 573 if (!mce_log) 574 goto out; 575 576 error_type = mce_log->error_type; 577 err_sub_type = rtas_mc_error_sub_type(mce_log); 578 579 if (initiator == RTAS_INITIATOR_UNKNOWN) 580 mce_err.initiator = MCE_INITIATOR_UNKNOWN; 581 else if (initiator == RTAS_INITIATOR_CPU) 582 mce_err.initiator = MCE_INITIATOR_CPU; 583 else if (initiator == RTAS_INITIATOR_PCI) 584 mce_err.initiator = MCE_INITIATOR_PCI; 585 else if (initiator == RTAS_INITIATOR_ISA) 586 mce_err.initiator = MCE_INITIATOR_ISA; 587 else if (initiator == RTAS_INITIATOR_MEMORY) 588 mce_err.initiator = MCE_INITIATOR_MEMORY; 589 else if (initiator == RTAS_INITIATOR_POWERMGM) 590 mce_err.initiator = MCE_INITIATOR_POWERMGM; 591 else 592 mce_err.initiator = MCE_INITIATOR_UNKNOWN; 593 594 if (severity == RTAS_SEVERITY_NO_ERROR) 595 mce_err.severity = MCE_SEV_NO_ERROR; 596 else if (severity == RTAS_SEVERITY_EVENT) 597 mce_err.severity = MCE_SEV_WARNING; 598 else if (severity == RTAS_SEVERITY_WARNING) 599 mce_err.severity = MCE_SEV_WARNING; 600 else if (severity == RTAS_SEVERITY_ERROR_SYNC) 601 mce_err.severity = MCE_SEV_SEVERE; 602 else if (severity == RTAS_SEVERITY_ERROR) 603 mce_err.severity = MCE_SEV_SEVERE; 604 else 605 mce_err.severity = MCE_SEV_FATAL; 606 607 if (severity <= RTAS_SEVERITY_ERROR_SYNC) 608 mce_err.sync_error = true; 609 else 610 mce_err.sync_error = false; 611 612 mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN; 613 mce_err.error_class = MCE_ECLASS_UNKNOWN; 614 615 switch (error_type) { 616 case MC_ERROR_TYPE_UE: 617 mce_err.error_type = MCE_ERROR_TYPE_UE; 618 mce_common_process_ue(regs, &mce_err); 619 if (mce_err.ignore_event) 620 disposition = RTAS_DISP_FULLY_RECOVERED; 621 switch (err_sub_type) { 622 case MC_ERROR_UE_IFETCH: 623 mce_err.u.ue_error_type = MCE_UE_ERROR_IFETCH; 624 break; 625 case MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH: 626 mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH; 627 break; 628 case MC_ERROR_UE_LOAD_STORE: 629 mce_err.u.ue_error_type = MCE_UE_ERROR_LOAD_STORE; 630 break; 631 case MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE: 632 mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE; 633 break; 634 case MC_ERROR_UE_INDETERMINATE: 635 default: 636 mce_err.u.ue_error_type = MCE_UE_ERROR_INDETERMINATE; 637 break; 638 } 639 if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) 640 eaddr = be64_to_cpu(mce_log->effective_address); 641 642 if (mce_log->sub_err_type & UE_LOGICAL_ADDR_PROVIDED) { 643 paddr = be64_to_cpu(mce_log->logical_address); 644 } else if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) { 645 unsigned long pfn; 646 647 pfn = addr_to_pfn(regs, eaddr); 648 if (pfn != ULONG_MAX) 649 paddr = pfn << PAGE_SHIFT; 650 } 651 652 break; 653 case MC_ERROR_TYPE_SLB: 654 mce_err.error_type = MCE_ERROR_TYPE_SLB; 655 switch (err_sub_type) { 656 case MC_ERROR_SLB_PARITY: 657 mce_err.u.slb_error_type = MCE_SLB_ERROR_PARITY; 658 break; 659 case MC_ERROR_SLB_MULTIHIT: 660 mce_err.u.slb_error_type = MCE_SLB_ERROR_MULTIHIT; 661 break; 662 case MC_ERROR_SLB_INDETERMINATE: 663 default: 664 mce_err.u.slb_error_type = MCE_SLB_ERROR_INDETERMINATE; 665 break; 666 } 667 if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED) 668 eaddr = be64_to_cpu(mce_log->effective_address); 669 break; 670 case MC_ERROR_TYPE_ERAT: 671 mce_err.error_type = MCE_ERROR_TYPE_ERAT; 672 switch (err_sub_type) { 673 case MC_ERROR_ERAT_PARITY: 674 mce_err.u.erat_error_type = MCE_ERAT_ERROR_PARITY; 675 break; 676 case MC_ERROR_ERAT_MULTIHIT: 677 mce_err.u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT; 678 break; 679 case MC_ERROR_ERAT_INDETERMINATE: 680 default: 681 mce_err.u.erat_error_type = MCE_ERAT_ERROR_INDETERMINATE; 682 break; 683 } 684 if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED) 685 eaddr = be64_to_cpu(mce_log->effective_address); 686 break; 687 case MC_ERROR_TYPE_TLB: 688 mce_err.error_type = MCE_ERROR_TYPE_TLB; 689 switch (err_sub_type) { 690 case MC_ERROR_TLB_PARITY: 691 mce_err.u.tlb_error_type = MCE_TLB_ERROR_PARITY; 692 break; 693 case MC_ERROR_TLB_MULTIHIT: 694 mce_err.u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT; 695 break; 696 case MC_ERROR_TLB_INDETERMINATE: 697 default: 698 mce_err.u.tlb_error_type = MCE_TLB_ERROR_INDETERMINATE; 699 break; 700 } 701 if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED) 702 eaddr = be64_to_cpu(mce_log->effective_address); 703 break; 704 case MC_ERROR_TYPE_D_CACHE: 705 mce_err.error_type = MCE_ERROR_TYPE_DCACHE; 706 break; 707 case MC_ERROR_TYPE_I_CACHE: 708 mce_err.error_type = MCE_ERROR_TYPE_ICACHE; 709 break; 710 case MC_ERROR_TYPE_CTRL_MEM_ACCESS: 711 mce_err.error_type = MCE_ERROR_TYPE_RA; 712 switch (err_sub_type) { 713 case MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK: 714 mce_err.u.ra_error_type = 715 MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN; 716 break; 717 case MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS: 718 mce_err.u.ra_error_type = 719 MCE_RA_ERROR_LOAD_STORE_FOREIGN; 720 break; 721 } 722 if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED) 723 eaddr = be64_to_cpu(mce_log->effective_address); 724 break; 725 case MC_ERROR_TYPE_UNKNOWN: 726 default: 727 mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN; 728 break; 729 } 730 out: 731 save_mce_event(regs, disposition == RTAS_DISP_FULLY_RECOVERED, 732 &mce_err, regs->nip, eaddr, paddr); 733 return disposition; 734 } 735 736 static int mce_handle_error(struct pt_regs *regs, struct rtas_error_log *errp) 737 { 738 struct pseries_errorlog *pseries_log; 739 struct pseries_mc_errorlog *mce_log = NULL; 740 int disposition = rtas_error_disposition(errp); 741 u8 error_type; 742 743 if (!rtas_error_extended(errp)) 744 goto out; 745 746 pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE); 747 if (!pseries_log) 748 goto out; 749 750 mce_log = (struct pseries_mc_errorlog *)pseries_log->data; 751 error_type = mce_log->error_type; 752 753 disposition = mce_handle_err_realmode(disposition, error_type); 754 out: 755 disposition = mce_handle_err_virtmode(regs, errp, mce_log, 756 disposition); 757 return disposition; 758 } 759 760 /* 761 * Process MCE rtas errlog event. 762 */ 763 void pSeries_machine_check_log_err(void) 764 { 765 struct rtas_error_log *err; 766 767 err = fwnmi_get_errlog(); 768 log_error((char *)err, ERR_TYPE_RTAS_LOG, 0); 769 } 770 771 /* 772 * See if we can recover from a machine check exception. 773 * This is only called on power4 (or above) and only via 774 * the Firmware Non-Maskable Interrupts (fwnmi) handler 775 * which provides the error analysis for us. 776 * 777 * Return 1 if corrected (or delivered a signal). 778 * Return 0 if there is nothing we can do. 779 */ 780 static int recover_mce(struct pt_regs *regs, struct machine_check_event *evt) 781 { 782 int recovered = 0; 783 784 if (regs_is_unrecoverable(regs)) { 785 /* If MSR_RI isn't set, we cannot recover */ 786 pr_err("Machine check interrupt unrecoverable: MSR(RI=0)\n"); 787 recovered = 0; 788 } else if (evt->disposition == MCE_DISPOSITION_RECOVERED) { 789 /* Platform corrected itself */ 790 recovered = 1; 791 } else if (evt->severity == MCE_SEV_FATAL) { 792 /* Fatal machine check */ 793 pr_err("Machine check interrupt is fatal\n"); 794 recovered = 0; 795 } 796 797 if (!recovered && evt->sync_error) { 798 /* 799 * Try to kill processes if we get a synchronous machine check 800 * (e.g., one caused by execution of this instruction). This 801 * will devolve into a panic if we try to kill init or are in 802 * an interrupt etc. 803 * 804 * TODO: Queue up this address for hwpoisioning later. 805 * TODO: This is not quite right for d-side machine 806 * checks ->nip is not necessarily the important 807 * address. 808 */ 809 if ((user_mode(regs))) { 810 _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); 811 recovered = 1; 812 } else if (die_will_crash()) { 813 /* 814 * die() would kill the kernel, so better to go via 815 * the platform reboot code that will log the 816 * machine check. 817 */ 818 recovered = 0; 819 } else { 820 die_mce("Machine check", regs, SIGBUS); 821 recovered = 1; 822 } 823 } 824 825 return recovered; 826 } 827 828 /* 829 * Handle a machine check. 830 * 831 * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi) 832 * should be present. If so the handler which called us tells us if the 833 * error was recovered (never true if RI=0). 834 * 835 * On hardware prior to Power 4 these exceptions were asynchronous which 836 * means we can't tell exactly where it occurred and so we can't recover. 837 */ 838 int pSeries_machine_check_exception(struct pt_regs *regs) 839 { 840 struct machine_check_event evt; 841 842 if (!get_mce_event(&evt, MCE_EVENT_RELEASE)) 843 return 0; 844 845 /* Print things out */ 846 if (evt.version != MCE_V1) { 847 pr_err("Machine Check Exception, Unknown event version %d !\n", 848 evt.version); 849 return 0; 850 } 851 machine_check_print_event_info(&evt, user_mode(regs), false); 852 853 if (recover_mce(regs, &evt)) 854 return 1; 855 856 return 0; 857 } 858 859 long pseries_machine_check_realmode(struct pt_regs *regs) 860 { 861 struct rtas_error_log *errp; 862 int disposition; 863 864 if (fwnmi_active) { 865 errp = fwnmi_get_errinfo(regs); 866 /* 867 * Call to fwnmi_release_errinfo() in real mode causes kernel 868 * to panic. Hence we will call it as soon as we go into 869 * virtual mode. 870 */ 871 disposition = mce_handle_error(regs, errp); 872 873 fwnmi_release_errinfo(); 874 875 if (disposition == RTAS_DISP_FULLY_RECOVERED) 876 return 1; 877 } 878 879 return 0; 880 } 881