xref: /linux/arch/riscv/include/uapi/asm/hwprobe.h (revision 570f7e331f5febb30f1384817463c7e42b65ca7d)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3  * Copyright 2023-2024 Rivos, Inc
4  */
5 
6 #ifndef _UAPI_ASM_HWPROBE_H
7 #define _UAPI_ASM_HWPROBE_H
8 
9 #include <linux/types.h>
10 #include <linux/const.h>
11 
12 /*
13  * Interface for probing hardware capabilities from userspace, see
14  * Documentation/arch/riscv/hwprobe.rst for more information.
15  */
16 struct riscv_hwprobe {
17 	__s64 key;
18 	__u64 value;
19 };
20 
21 #define RISCV_HWPROBE_KEY_MVENDORID	0
22 #define RISCV_HWPROBE_KEY_MARCHID	1
23 #define RISCV_HWPROBE_KEY_MIMPID	2
24 #define RISCV_HWPROBE_KEY_BASE_BEHAVIOR	3
25 #define		RISCV_HWPROBE_BASE_BEHAVIOR_IMA	_BITULL(0)
26 #define RISCV_HWPROBE_KEY_IMA_EXT_0	4
27 #define		RISCV_HWPROBE_IMA_FD		_BITULL(0)
28 #define		RISCV_HWPROBE_IMA_C		_BITULL(1)
29 #define		RISCV_HWPROBE_IMA_V		_BITULL(2)
30 #define		RISCV_HWPROBE_EXT_ZBA		_BITULL(3)
31 #define		RISCV_HWPROBE_EXT_ZBB		_BITULL(4)
32 #define		RISCV_HWPROBE_EXT_ZBS		_BITULL(5)
33 #define		RISCV_HWPROBE_EXT_ZICBOZ	_BITULL(6)
34 #define		RISCV_HWPROBE_EXT_ZBC		_BITULL(7)
35 #define		RISCV_HWPROBE_EXT_ZBKB		_BITULL(8)
36 #define		RISCV_HWPROBE_EXT_ZBKC		_BITULL(9)
37 #define		RISCV_HWPROBE_EXT_ZBKX		_BITULL(10)
38 #define		RISCV_HWPROBE_EXT_ZKND		_BITULL(11)
39 #define		RISCV_HWPROBE_EXT_ZKNE		_BITULL(12)
40 #define		RISCV_HWPROBE_EXT_ZKNH		_BITULL(13)
41 #define		RISCV_HWPROBE_EXT_ZKSED		_BITULL(14)
42 #define		RISCV_HWPROBE_EXT_ZKSH		_BITULL(15)
43 #define		RISCV_HWPROBE_EXT_ZKT		_BITULL(16)
44 #define		RISCV_HWPROBE_EXT_ZVBB		_BITULL(17)
45 #define		RISCV_HWPROBE_EXT_ZVBC		_BITULL(18)
46 #define		RISCV_HWPROBE_EXT_ZVKB		_BITULL(19)
47 #define		RISCV_HWPROBE_EXT_ZVKG		_BITULL(20)
48 #define		RISCV_HWPROBE_EXT_ZVKNED	_BITULL(21)
49 #define		RISCV_HWPROBE_EXT_ZVKNHA	_BITULL(22)
50 #define		RISCV_HWPROBE_EXT_ZVKNHB	_BITULL(23)
51 #define		RISCV_HWPROBE_EXT_ZVKSED	_BITULL(24)
52 #define		RISCV_HWPROBE_EXT_ZVKSH		_BITULL(25)
53 #define		RISCV_HWPROBE_EXT_ZVKT		_BITULL(26)
54 #define		RISCV_HWPROBE_EXT_ZFH		_BITULL(27)
55 #define		RISCV_HWPROBE_EXT_ZFHMIN	_BITULL(28)
56 #define		RISCV_HWPROBE_EXT_ZIHINTNTL	_BITULL(29)
57 #define		RISCV_HWPROBE_EXT_ZVFH		_BITULL(30)
58 #define		RISCV_HWPROBE_EXT_ZVFHMIN	_BITULL(31)
59 #define		RISCV_HWPROBE_EXT_ZFA		_BITULL(32)
60 #define		RISCV_HWPROBE_EXT_ZTSO		_BITULL(33)
61 #define		RISCV_HWPROBE_EXT_ZACAS		_BITULL(34)
62 #define		RISCV_HWPROBE_EXT_ZICOND	_BITULL(35)
63 #define		RISCV_HWPROBE_EXT_ZIHINTPAUSE	_BITULL(36)
64 #define		RISCV_HWPROBE_EXT_ZVE32X	_BITULL(37)
65 #define		RISCV_HWPROBE_EXT_ZVE32F	_BITULL(38)
66 #define		RISCV_HWPROBE_EXT_ZVE64X	_BITULL(39)
67 #define		RISCV_HWPROBE_EXT_ZVE64F	_BITULL(40)
68 #define		RISCV_HWPROBE_EXT_ZVE64D	_BITULL(41)
69 #define		RISCV_HWPROBE_EXT_ZIMOP		_BITULL(42)
70 #define		RISCV_HWPROBE_EXT_ZCA		_BITULL(43)
71 #define		RISCV_HWPROBE_EXT_ZCB		_BITULL(44)
72 #define		RISCV_HWPROBE_EXT_ZCD		_BITULL(45)
73 #define		RISCV_HWPROBE_EXT_ZCF		_BITULL(46)
74 #define		RISCV_HWPROBE_EXT_ZCMOP		_BITULL(47)
75 #define		RISCV_HWPROBE_EXT_ZAWRS		_BITULL(48)
76 #define		RISCV_HWPROBE_EXT_SUPM		_BITULL(49)
77 #define		RISCV_HWPROBE_EXT_ZICNTR	_BITULL(50)
78 #define		RISCV_HWPROBE_EXT_ZIHPM		_BITULL(51)
79 #define		RISCV_HWPROBE_EXT_ZFBFMIN	_BITULL(52)
80 #define		RISCV_HWPROBE_EXT_ZVFBFMIN	_BITULL(53)
81 #define		RISCV_HWPROBE_EXT_ZVFBFWMA	_BITULL(54)
82 #define		RISCV_HWPROBE_EXT_ZICBOM	_BITULL(55)
83 #define		RISCV_HWPROBE_EXT_ZAAMO		_BITULL(56)
84 #define		RISCV_HWPROBE_EXT_ZALRSC	_BITULL(57)
85 #define		RISCV_HWPROBE_EXT_ZABHA		_BITULL(58)
86 #define		RISCV_HWPROBE_EXT_ZALASR	_BITULL(59)
87 #define		RISCV_HWPROBE_EXT_ZICBOP	_BITULL(60)
88 #define		RISCV_HWPROBE_EXT_ZILSD		_BITULL(61)
89 #define		RISCV_HWPROBE_EXT_ZCLSD		_BITULL(62)
90 #define		RISCV_HWPROBE_EXT_ZICFILP	_BITULL(63)
91 
92 #define RISCV_HWPROBE_KEY_CPUPERF_0	5
93 #define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	0
94 #define		RISCV_HWPROBE_MISALIGNED_EMULATED	1
95 #define		RISCV_HWPROBE_MISALIGNED_SLOW		2
96 #define		RISCV_HWPROBE_MISALIGNED_FAST		3
97 #define		RISCV_HWPROBE_MISALIGNED_UNSUPPORTED	4
98 #define		RISCV_HWPROBE_MISALIGNED_MASK		7
99 #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE	6
100 #define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS	7
101 #define RISCV_HWPROBE_KEY_TIME_CSR_FREQ	8
102 #define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF	9
103 #define		RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN		0
104 #define		RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED	1
105 #define		RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW		2
106 #define		RISCV_HWPROBE_MISALIGNED_SCALAR_FAST		3
107 #define		RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED	4
108 #define RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF	10
109 #define		RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN		0
110 #define		RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW		2
111 #define		RISCV_HWPROBE_MISALIGNED_VECTOR_FAST		3
112 #define		RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED	4
113 #define RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0	11
114 #define RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE	12
115 #define RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0	13
116 #define RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0	14
117 #define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE	15
118 #define RISCV_HWPROBE_KEY_IMA_EXT_1		16
119 #define		RISCV_HWPROBE_EXT_ZICFISS	_BITULL(0)
120 #define		RISCV_HWPROBE_EXT_ZICCLSM	_BITULL(1)
121 #define		RISCV_HWPROBE_EXT_ZICCAMOA	_BITULL(2)
122 #define		RISCV_HWPROBE_EXT_ZICCIF	_BITULL(3)
123 #define		RISCV_HWPROBE_EXT_ZICCRSE	_BITULL(4)
124 #define		RISCV_HWPROBE_EXT_ZA64RS	_BITULL(5)
125 
126 /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
127 
128 /* Flags */
129 #define RISCV_HWPROBE_WHICH_CPUS	_BITUL(0)
130 
131 #endif
132