1 // SPDX-License-Identifier: GPL-2.0 2 // SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 4 use crate::{ 5 driver::Bar0, 6 gpu::{ 7 Architecture, 8 Chipset, // 9 }, 10 }; 11 12 mod gb100; 13 mod gb202; 14 mod gh100; 15 16 pub(super) trait FspHal { 17 /// Returns the secure boot status from the architecture-specific `NV_THERM_I2CS_SCRATCH` register. 18 fn fsp_boot_status(&self, bar: Bar0<'_>) -> u32; 19 20 /// Returns the FSP Chain of Trust protocol version this chipset advertises. 21 fn cot_version(&self) -> u16; 22 23 // TODO: consider moving this into the TLV firmware metadata when ready 24 /// Returns the size reserved at the end of the framebuffer, in bytes. 25 fn fb_end_reserved_size(&self) -> u64; 26 } 27 28 /// Returns the FSP HAL, or `None` if the architecture doesn't support FSP. 29 pub(super) fn fsp_hal(chipset: Chipset) -> Option<&'static dyn FspHal> { 30 match chipset.arch() { 31 Architecture::Turing | Architecture::Ampere | Architecture::Ada => None, 32 Architecture::Hopper => Some(gh100::GH100_HAL), 33 Architecture::BlackwellGB10x => Some(gb100::GB100_HAL), 34 Architecture::BlackwellGB20x => Some(gb202::GB202_HAL), 35 } 36 } 37