1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2022 Advanced Micro Devices, Inc. 4 * 5 * Author: Meng Li <li.meng@amd.com> 6 */ 7 8 #ifndef _LINUX_AMD_PSTATE_H 9 #define _LINUX_AMD_PSTATE_H 10 11 #include <linux/pm_qos.h> 12 #include <linux/platform_profile.h> 13 14 #if IS_MODULE(CONFIG_X86_AMD_PSTATE_UT) 15 #define EXPORT_SYMBOL_FOR_PSTATE_UT(symbol) \ 16 EXPORT_SYMBOL_FOR_MODULES(symbol, "amd-pstate-ut") 17 #else 18 #define EXPORT_SYMBOL_FOR_PSTATE_UT(symbol) 19 #endif 20 21 /********************************************************************* 22 * AMD P-state INTERFACE * 23 *********************************************************************/ 24 25 /** 26 * union perf_cached - A union to cache performance-related data. 27 * @highest_perf: the maximum performance an individual processor may reach, 28 * assuming ideal conditions 29 * For platforms that support the preferred core feature, the highest_perf value maybe 30 * configured to any value in the range 166-255 by the firmware (because the preferred 31 * core ranking is encoded in the highest_perf value). To maintain consistency across 32 * all platforms, we split the highest_perf and preferred core ranking values into 33 * cpudata->perf.highest_perf and cpudata->prefcore_ranking. 34 * @nominal_perf: the maximum sustained performance level of the processor, 35 * assuming ideal operating conditions 36 * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power 37 * savings are achieved 38 * @lowest_perf: the absolute lowest performance level of the processor 39 * @min_limit_perf: Cached value of the performance corresponding to policy->min 40 * @max_limit_perf: Cached value of the performance corresponding to policy->max 41 * @bios_min_perf: Cached perf value corresponding to the "Requested CPU Min Frequency" BIOS option 42 * @val: Raw 64-bit value for atomic access via READ_ONCE()/WRITE_ONCE() 43 */ 44 union perf_cached { 45 struct { 46 u8 highest_perf; 47 u8 nominal_perf; 48 u8 lowest_nonlinear_perf; 49 u8 lowest_perf; 50 u8 min_limit_perf; 51 u8 max_limit_perf; 52 u8 bios_min_perf; 53 }; 54 u64 val; 55 }; 56 57 /** 58 * struct amd_aperf_mperf 59 * @aperf: actual performance frequency clock count 60 * @mperf: maximum performance frequency clock count 61 * @tsc: time stamp counter 62 */ 63 struct amd_aperf_mperf { 64 u64 aperf; 65 u64 mperf; 66 u64 tsc; 67 }; 68 69 /** 70 * struct amd_cpudata - private CPU data for AMD P-State 71 * @cpu: CPU number 72 * @req: constraint request to apply 73 * @cppc_req_cached: cached performance request hints 74 * @cppc_req2_cached: cached value of MSR_AMD_CPPC_REQ2 75 * @perf: cached performance-related data 76 * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher 77 * priority. 78 * @floor_perf_cnt: Cached value of the number of distinct floor 79 * performance levels supported 80 * @bios_floor_perf: Cached value of the boot-time floor performance level from 81 * MSR_AMD_CPPC_REQ2 82 * @min_limit_freq: Cached value of policy->min (in khz) 83 * @max_limit_freq: Cached value of policy->max (in khz) 84 * @nominal_freq: the frequency (in khz) that mapped to nominal_perf 85 * @max_freq: in ideal conditions the maximum frequency (in khz) possible frequency 86 * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf 87 * @floor_freq: Cached value of the user requested floor_freq 88 * @cur: Difference of Aperf/Mperf/tsc count between last and current sample 89 * @prev: Last Aperf/Mperf/tsc count value read from register 90 * @freq: current cpu frequency value (in khz) 91 * @boost_supported: check whether the Processor or SBIOS supports boost mode 92 * @hw_prefcore: check whether HW supports preferred core featue. 93 * Only when hw_prefcore and early prefcore param are true, 94 * AMD P-State driver supports preferred core featue. 95 * @policy: Cpufreq policy value 96 * @suspended: If CPU core if offlined 97 * @epp_default_ac: Default EPP value for AC power source 98 * @epp_default_dc: Default EPP value for DC power source 99 * @dynamic_epp: Whether dynamic EPP is enabled 100 * @raw_epp: Whether the last EPP write was a raw numeric value rather than a 101 * named preference 102 * @power_nb: Notifier block for power events 103 * @current_profile: Currently selected platform profile option 104 * @ppdev: Device registered with the platform profile handler 105 * @profile_name: Name under which @ppdev is registered 106 * 107 * The amd_cpudata is key private data for each CPU thread in AMD P-State, and 108 * represents all the attributes and goals that AMD P-State requests at runtime. 109 */ 110 struct amd_cpudata { 111 int cpu; 112 113 struct freq_qos_request req[2]; 114 u64 cppc_req_cached; 115 u64 cppc_req2_cached; 116 117 union perf_cached perf; 118 119 u8 prefcore_ranking; 120 u8 floor_perf_cnt; 121 u8 bios_floor_perf; 122 u32 min_limit_freq; 123 u32 max_limit_freq; 124 u32 nominal_freq; 125 u32 max_freq; 126 u32 lowest_nonlinear_freq; 127 u32 floor_freq; 128 129 struct amd_aperf_mperf cur; 130 struct amd_aperf_mperf prev; 131 132 u64 freq; 133 bool boost_supported; 134 bool hw_prefcore; 135 136 /* EPP feature related attributes*/ 137 u32 policy; 138 bool suspended; 139 u8 epp_default_ac; 140 u8 epp_default_dc; 141 bool dynamic_epp; 142 bool raw_epp; 143 struct notifier_block power_nb; 144 145 /* platform profile */ 146 enum platform_profile_option current_profile; 147 struct device *ppdev; 148 char *profile_name; 149 }; 150 151 /* 152 * enum amd_pstate_mode - driver working mode of amd pstate 153 */ 154 enum amd_pstate_mode { 155 AMD_PSTATE_UNDEFINED = 0, 156 AMD_PSTATE_DISABLE, 157 AMD_PSTATE_PASSIVE, 158 AMD_PSTATE_ACTIVE, 159 AMD_PSTATE_GUIDED, 160 AMD_PSTATE_MAX, 161 }; 162 const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode); 163 int amd_pstate_get_status(void); 164 int amd_pstate_update_status(const char *buf, size_t size); 165 ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, 166 const char *buf, size_t count); 167 ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char *buf); 168 void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy); 169 ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, const char *buf, size_t count); 170 ssize_t show_amd_pstate_floor_freq(struct cpufreq_policy *policy, char *buf); 171 172 struct freq_attr; 173 174 struct freq_attr **amd_pstate_get_current_attrs(void); 175 176 #endif /* _LINUX_AMD_PSTATE_H */ 177