xref: /linux/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml (revision 570f7e331f5febb30f1384817463c7e42b65ca7d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - qcom,eliza-inline-crypto-engine
17          - qcom,hawi-inline-crypto-engine
18          - qcom,kaanapali-inline-crypto-engine
19          - qcom,maili-inline-crypto-engine
20          - qcom,milos-inline-crypto-engine
21          - qcom,nord-inline-crypto-engine
22          - qcom,qcs8300-inline-crypto-engine
23          - qcom,sa8775p-inline-crypto-engine
24          - qcom,sc7180-inline-crypto-engine
25          - qcom,sc7280-inline-crypto-engine
26          - qcom,shikra-inline-crypto-engine
27          - qcom,sm8450-inline-crypto-engine
28          - qcom,sm8550-inline-crypto-engine
29          - qcom,sm8650-inline-crypto-engine
30          - qcom,sm8750-inline-crypto-engine
31          - qcom,x1e80100-inline-crypto-engine
32      - const: qcom,inline-crypto-engine
33
34  reg:
35    maxItems: 1
36
37  clocks:
38    minItems: 1
39    maxItems: 2
40
41  clock-names:
42    minItems: 1
43    items:
44      - const: core
45      - const: iface
46
47  power-domains:
48    maxItems: 1
49
50  operating-points-v2: true
51
52  opp-table:
53    type: object
54
55required:
56  - compatible
57  - reg
58  - clocks
59
60additionalProperties: false
61
62# Do not extend the list.
63# Legacy SoCs are allowed for single clock.
64# New SoCs must provide both clocks and power domains.
65allOf:
66  - if:
67      not:
68        properties:
69          compatible:
70            contains:
71              enum:
72                - qcom,kaanapali-inline-crypto-engine
73                - qcom,qcs8300-inline-crypto-engine
74                - qcom,sa8775p-inline-crypto-engine
75                - qcom,sc7180-inline-crypto-engine
76                - qcom,sc7280-inline-crypto-engine
77                - qcom,sm8450-inline-crypto-engine
78                - qcom,sm8550-inline-crypto-engine
79                - qcom,sm8650-inline-crypto-engine
80                - qcom,sm8750-inline-crypto-engine
81
82    then:
83      required:
84        - power-domains
85        - clock-names
86      properties:
87        clocks:
88          minItems: 2
89        clock-names:
90          minItems: 2
91
92examples:
93  - |
94    #include <dt-bindings/clock/qcom,sm8550-gcc.h>
95
96    crypto@1d88000 {
97      compatible = "qcom,sm8550-inline-crypto-engine",
98                   "qcom,inline-crypto-engine";
99      reg = <0x01d88000 0x8000>;
100      clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
101               <&gcc GCC_UFS_PHY_AHB_CLK>;
102      clock-names = "core",
103                    "iface";
104      power-domains = <&gcc UFS_PHY_GDSC>;
105
106      operating-points-v2 = <&ice_opp_table>;
107
108      ice_opp_table: opp-table {
109        compatible = "operating-points-v2";
110
111        opp-100000000 {
112          opp-hz = /bits/ 64 <100000000>;
113          required-opps = <&rpmhpd_opp_low_svs>;
114        };
115
116        opp-201500000 {
117          opp-hz = /bits/ 64 <201500000>;
118          required-opps = <&rpmhpd_opp_svs_l1>;
119        };
120
121        opp-403000000 {
122          opp-hz = /bits/ 64 <403000000>;
123          required-opps = <&rpmhpd_opp_nom>;
124        };
125      };
126    };
127...
128