1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/capability.h> 25 #include <linux/device.h> 26 #include <linux/err.h> 27 #include <linux/fs.h> 28 #include <linux/file.h> 29 #include <linux/overflow.h> 30 #include <linux/sched.h> 31 #include <linux/slab.h> 32 #include <linux/uaccess.h> 33 #include <linux/compat.h> 34 #include <uapi/linux/kfd_ioctl.h> 35 #include <linux/time.h> 36 #include <linux/mm.h> 37 #include <linux/mman.h> 38 #include <linux/ptrace.h> 39 #include <linux/dma-buf.h> 40 #include <linux/processor.h> 41 #include "kfd_priv.h" 42 #include "kfd_device_queue_manager.h" 43 #include "kfd_svm.h" 44 #include "amdgpu_amdkfd.h" 45 #include "kfd_smi_events.h" 46 #include "amdgpu_dma_buf.h" 47 #include "kfd_debug.h" 48 #include "amdgpu_ptl.h" 49 50 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 51 static int kfd_open(struct inode *, struct file *); 52 static int kfd_release(struct inode *, struct file *); 53 static int kfd_mmap(struct file *, struct vm_area_struct *); 54 55 static const char kfd_dev_name[] = "kfd"; 56 57 static const struct file_operations kfd_fops = { 58 .owner = THIS_MODULE, 59 .unlocked_ioctl = kfd_ioctl, 60 .compat_ioctl = compat_ptr_ioctl, 61 .open = kfd_open, 62 .release = kfd_release, 63 .mmap = kfd_mmap, 64 }; 65 66 static int kfd_char_dev_major = -1; 67 struct device *kfd_device; 68 static const struct class kfd_class = { 69 .name = kfd_dev_name, 70 }; 71 72 /* 73 * Cache the address space of the chardev on first open so that the reset 74 * path can drop all userspace mappings of doorbell and MMIO ranges via 75 * unmap_mapping_range(). 76 */ 77 static struct address_space *kfd_dev_mapping; 78 79 void kfd_dev_unmap_mapping_range(loff_t const holebegin, loff_t const holelen) 80 { 81 struct address_space *mapping = READ_ONCE(kfd_dev_mapping); 82 83 if (mapping) 84 unmap_mapping_range(mapping, holebegin, holelen, 1); 85 } 86 87 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id) 88 { 89 struct kfd_process_device *pdd; 90 91 mutex_lock(&p->mutex); 92 pdd = kfd_process_device_data_by_id(p, gpu_id); 93 94 if (pdd) 95 return pdd; 96 97 mutex_unlock(&p->mutex); 98 return NULL; 99 } 100 101 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd) 102 { 103 mutex_unlock(&pdd->process->mutex); 104 } 105 106 int kfd_chardev_init(void) 107 { 108 int err = 0; 109 110 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 111 err = kfd_char_dev_major; 112 if (err < 0) 113 goto err_register_chrdev; 114 115 err = class_register(&kfd_class); 116 if (err) 117 goto err_class_create; 118 119 kfd_device = device_create(&kfd_class, NULL, 120 MKDEV(kfd_char_dev_major, 0), 121 NULL, kfd_dev_name); 122 err = PTR_ERR(kfd_device); 123 if (IS_ERR(kfd_device)) 124 goto err_device_create; 125 126 return 0; 127 128 err_device_create: 129 class_unregister(&kfd_class); 130 err_class_create: 131 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 132 err_register_chrdev: 133 return err; 134 } 135 136 void kfd_chardev_exit(void) 137 { 138 device_destroy(&kfd_class, MKDEV(kfd_char_dev_major, 0)); 139 class_unregister(&kfd_class); 140 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 141 kfd_device = NULL; 142 } 143 144 145 static int kfd_open(struct inode *inode, struct file *filep) 146 { 147 struct kfd_process *process; 148 bool is_32bit_user_mode; 149 150 if (iminor(inode) != 0) 151 return -ENODEV; 152 153 /* 154 * /dev/kfd is a single chardev so all opens share one inode. Cache 155 * its address_space on the first open for use by the reset path. 156 */ 157 if (!READ_ONCE(kfd_dev_mapping)) 158 cmpxchg(&kfd_dev_mapping, NULL, inode->i_mapping); 159 160 is_32bit_user_mode = in_compat_syscall(); 161 162 if (is_32bit_user_mode) { 163 dev_warn(kfd_device, 164 "Process %d (32-bit) failed to open /dev/kfd\n" 165 "32-bit processes are not supported by amdkfd\n", 166 current->pid); 167 return -EPERM; 168 } 169 170 process = kfd_create_process(current); 171 if (IS_ERR(process)) 172 return PTR_ERR(process); 173 174 /* filep now owns the reference returned by kfd_create_process */ 175 filep->private_data = process; 176 177 dev_dbg(kfd_device, "process pid %d opened kfd node, compat mode (32 bit) - %d\n", 178 process->lead_thread->pid, process->is_32bit_user_mode); 179 180 return 0; 181 } 182 183 static int kfd_release(struct inode *inode, struct file *filep) 184 { 185 struct kfd_process *process = filep->private_data; 186 187 if (!process) 188 return 0; 189 190 if (process->context_id != KFD_CONTEXT_ID_PRIMARY) 191 kfd_process_notifier_release_internal(process); 192 193 kfd_unref_process(process); 194 195 return 0; 196 } 197 198 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 199 void *data) 200 { 201 struct kfd_ioctl_get_version_args *args = data; 202 203 args->major_version = KFD_IOCTL_MAJOR_VERSION; 204 args->minor_version = KFD_IOCTL_MINOR_VERSION; 205 206 return 0; 207 } 208 209 static int set_queue_properties_from_user(struct queue_properties *q_properties, 210 struct kfd_ioctl_create_queue_args *args) 211 { 212 /* 213 * Repurpose queue percentage to accommodate new features: 214 * bit 0-7: queue percentage 215 * bit 8-15: pm4_target_xcc 216 */ 217 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 218 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 219 return -EINVAL; 220 } 221 222 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 223 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 224 return -EINVAL; 225 } 226 227 if ((args->ring_base_address) && 228 (!access_ok((const void __user *) args->ring_base_address, 229 sizeof(uint64_t)))) { 230 pr_err("Can't access ring base address\n"); 231 return -EFAULT; 232 } 233 234 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 235 pr_err("Ring size must be a power of 2 or 0\n"); 236 return -EINVAL; 237 } 238 239 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 240 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 241 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 242 } 243 244 if ((args->metadata_ring_size != 0) && !is_power_of_2(args->metadata_ring_size)) { 245 pr_err("Metadata ring size must be a power of 2 or 0\n"); 246 return -EINVAL; 247 } 248 249 if (!access_ok((const void __user *) args->read_pointer_address, 250 sizeof(uint32_t))) { 251 pr_err("Can't access read pointer\n"); 252 return -EFAULT; 253 } 254 255 if (!access_ok((const void __user *) args->write_pointer_address, 256 sizeof(uint32_t))) { 257 pr_err("Can't access write pointer\n"); 258 return -EFAULT; 259 } 260 261 if (args->eop_buffer_address && 262 !access_ok((const void __user *) args->eop_buffer_address, 263 sizeof(uint32_t))) { 264 pr_debug("Can't access eop buffer"); 265 return -EFAULT; 266 } 267 268 if (args->ctx_save_restore_address && 269 !access_ok((const void __user *) args->ctx_save_restore_address, 270 sizeof(uint32_t))) { 271 pr_debug("Can't access ctx save restore buffer"); 272 return -EFAULT; 273 } 274 275 q_properties->is_interop = false; 276 q_properties->is_gws = false; 277 q_properties->queue_percent = args->queue_percentage & 0xFF; 278 /* bit 8-15 are repurposed to be PM4 target XCC */ 279 q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 280 q_properties->priority = args->queue_priority; 281 q_properties->queue_address = args->ring_base_address; 282 q_properties->queue_size = args->ring_size; 283 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 284 q_properties->metadata_queue_size = args->metadata_ring_size; 285 286 q_properties->read_ptr = (void __user *)args->read_pointer_address; 287 q_properties->write_ptr = (void __user *)args->write_pointer_address; 288 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 289 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 290 q_properties->ctx_save_restore_area_address = 291 args->ctx_save_restore_address; 292 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 293 q_properties->ctl_stack_size = args->ctl_stack_size; 294 q_properties->sdma_engine_id = args->sdma_engine_id; 295 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 296 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 297 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 298 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 299 q_properties->type = KFD_QUEUE_TYPE_SDMA; 300 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 301 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 302 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID) 303 q_properties->type = KFD_QUEUE_TYPE_SDMA_BY_ENG_ID; 304 else 305 return -ENOTSUPP; 306 307 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 308 q_properties->format = KFD_QUEUE_FORMAT_AQL; 309 else 310 q_properties->format = KFD_QUEUE_FORMAT_PM4; 311 312 pr_debug("Queue Percentage: %d, %d\n", 313 q_properties->queue_percent, args->queue_percentage); 314 315 pr_debug("Queue Priority: %d, %d\n", 316 q_properties->priority, args->queue_priority); 317 318 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 319 q_properties->queue_address, args->ring_base_address); 320 321 pr_debug("Queue Size: 0x%llX, %u\n", 322 q_properties->queue_size, args->ring_size); 323 324 pr_debug("Queue r/w Pointers: %px, %px\n", 325 q_properties->read_ptr, 326 q_properties->write_ptr); 327 328 pr_debug("Queue Format: %d\n", q_properties->format); 329 330 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 331 332 pr_debug("Queue CTX save area: 0x%llX\n", 333 q_properties->ctx_save_restore_area_address); 334 335 return 0; 336 } 337 338 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 339 void *data) 340 { 341 struct kfd_ioctl_create_queue_args *args = data; 342 struct kfd_node *dev; 343 int err = 0; 344 unsigned int queue_id; 345 struct kfd_process_device *pdd; 346 struct queue_properties q_properties; 347 uint32_t doorbell_offset_in_process = 0; 348 349 memset(&q_properties, 0, sizeof(struct queue_properties)); 350 351 pr_debug("Creating queue ioctl\n"); 352 353 err = set_queue_properties_from_user(&q_properties, args); 354 if (err) 355 return err; 356 357 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 358 359 mutex_lock(&p->mutex); 360 361 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 362 if (!pdd) { 363 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 364 err = -EINVAL; 365 goto err_pdd; 366 } 367 dev = pdd->dev; 368 369 pdd = kfd_bind_process_to_device(dev, p); 370 if (IS_ERR(pdd)) { 371 err = -ESRCH; 372 goto err_bind_process; 373 } 374 375 if (q_properties.type == KFD_QUEUE_TYPE_SDMA_BY_ENG_ID) { 376 int max_sdma_eng_id = kfd_get_num_sdma_engines(dev) + 377 kfd_get_num_xgmi_sdma_engines(dev) - 1; 378 379 if (q_properties.sdma_engine_id > max_sdma_eng_id) { 380 err = -EINVAL; 381 pr_err("sdma_engine_id %i exceeds maximum id of %i\n", 382 q_properties.sdma_engine_id, max_sdma_eng_id); 383 goto err_sdma_engine_id; 384 } 385 } 386 387 if (!pdd->qpd.proc_doorbells) { 388 err = kfd_alloc_process_doorbells(dev->kfd, pdd); 389 if (err) { 390 pr_debug("failed to allocate process doorbells\n"); 391 goto err_bind_process; 392 } 393 } 394 395 err = kfd_queue_acquire_buffers(pdd, &q_properties); 396 if (err) { 397 pr_debug("failed to acquire user queue buffers\n"); 398 goto err_acquire_queue_buf; 399 } 400 401 pr_debug("Creating queue for process pid %d on gpu 0x%x\n", 402 p->lead_thread->pid, 403 dev->id); 404 405 err = pqm_create_queue(&p->pqm, dev, &q_properties, &queue_id, 406 NULL, NULL, NULL, &doorbell_offset_in_process); 407 if (err != 0) 408 goto err_create_queue; 409 410 args->queue_id = queue_id; 411 412 413 /* Return gpu_id as doorbell offset for mmap usage */ 414 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 415 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 416 if (KFD_IS_SOC15(dev)) 417 /* On SOC15 ASICs, include the doorbell offset within the 418 * process doorbell frame, which is 2 pages. 419 */ 420 args->doorbell_offset |= doorbell_offset_in_process; 421 422 mutex_unlock(&p->mutex); 423 424 pr_debug("Queue id %d was created successfully\n", args->queue_id); 425 426 pr_debug("Ring buffer address == 0x%016llX\n", 427 args->ring_base_address); 428 429 pr_debug("Read ptr address == 0x%016llX\n", 430 args->read_pointer_address); 431 432 pr_debug("Write ptr address == 0x%016llX\n", 433 args->write_pointer_address); 434 435 kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0); 436 return 0; 437 438 err_create_queue: 439 kfd_queue_unref_bo_vas(pdd, &q_properties); 440 kfd_queue_release_buffers(pdd, &q_properties); 441 err_acquire_queue_buf: 442 err_sdma_engine_id: 443 err_bind_process: 444 err_pdd: 445 mutex_unlock(&p->mutex); 446 return err; 447 } 448 449 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 450 void *data) 451 { 452 int retval; 453 struct kfd_ioctl_destroy_queue_args *args = data; 454 455 pr_debug("Destroying queue id %d for process pid %d\n", 456 args->queue_id, 457 p->lead_thread->pid); 458 459 mutex_lock(&p->mutex); 460 461 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 462 463 mutex_unlock(&p->mutex); 464 return retval; 465 } 466 467 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 468 void *data) 469 { 470 int retval; 471 struct kfd_ioctl_update_queue_args *args = data; 472 struct queue_properties properties; 473 474 /* 475 * Repurpose queue percentage to accommodate new features: 476 * bit 0-7: queue percentage 477 * bit 8-15: pm4_target_xcc 478 */ 479 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 480 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 481 return -EINVAL; 482 } 483 484 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 485 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 486 return -EINVAL; 487 } 488 489 if ((args->ring_base_address) && 490 (!access_ok((const void __user *) args->ring_base_address, 491 sizeof(uint64_t)))) { 492 pr_err("Can't access ring base address\n"); 493 return -EFAULT; 494 } 495 496 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 497 pr_err("Ring size must be a power of 2 or 0\n"); 498 return -EINVAL; 499 } 500 501 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 502 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 503 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 504 } 505 506 properties.queue_address = args->ring_base_address; 507 properties.queue_size = args->ring_size; 508 properties.queue_percent = args->queue_percentage & 0xFF; 509 /* bit 8-15 are repurposed to be PM4 target XCC */ 510 properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 511 properties.priority = args->queue_priority; 512 513 pr_debug("Updating queue id %d for process pid %d\n", 514 args->queue_id, p->lead_thread->pid); 515 516 mutex_lock(&p->mutex); 517 518 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 519 520 mutex_unlock(&p->mutex); 521 522 return retval; 523 } 524 525 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 526 void *data) 527 { 528 int retval; 529 const int max_num_cus = 1024; 530 struct kfd_ioctl_set_cu_mask_args *args = data; 531 struct mqd_update_info minfo = {0}; 532 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 533 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 534 535 if ((args->num_cu_mask % 32) != 0) { 536 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 537 args->num_cu_mask); 538 return -EINVAL; 539 } 540 541 minfo.cu_mask.count = args->num_cu_mask; 542 if (minfo.cu_mask.count == 0) { 543 pr_debug("CU mask cannot be 0"); 544 return -EINVAL; 545 } 546 547 /* To prevent an unreasonably large CU mask size, set an arbitrary 548 * limit of max_num_cus bits. We can then just drop any CU mask bits 549 * past max_num_cus bits and just use the first max_num_cus bits. 550 */ 551 if (minfo.cu_mask.count > max_num_cus) { 552 pr_debug("CU mask cannot be greater than 1024 bits"); 553 minfo.cu_mask.count = max_num_cus; 554 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 555 } 556 557 minfo.cu_mask.ptr = memdup_user(cu_mask_ptr, cu_mask_size); 558 if (IS_ERR(minfo.cu_mask.ptr)) { 559 pr_debug("Could not copy CU mask from userspace"); 560 return PTR_ERR(minfo.cu_mask.ptr); 561 } 562 563 mutex_lock(&p->mutex); 564 565 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 566 567 mutex_unlock(&p->mutex); 568 569 kfree(minfo.cu_mask.ptr); 570 return retval; 571 } 572 573 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 574 struct kfd_process *p, void *data) 575 { 576 struct kfd_ioctl_get_queue_wave_state_args *args = data; 577 int r; 578 579 mutex_lock(&p->mutex); 580 581 r = pqm_get_wave_state(&p->pqm, args->queue_id, 582 (void __user *)args->ctl_stack_address, 583 &args->ctl_stack_used_size, 584 &args->save_area_used_size); 585 586 mutex_unlock(&p->mutex); 587 588 return r; 589 } 590 591 static int kfd_ioctl_set_memory_policy(struct file *filep, 592 struct kfd_process *p, void *data) 593 { 594 struct kfd_ioctl_set_memory_policy_args *args = data; 595 int err = 0; 596 struct kfd_process_device *pdd; 597 enum cache_policy default_policy, alternate_policy; 598 599 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 600 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 601 return -EINVAL; 602 } 603 604 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 605 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 606 return -EINVAL; 607 } 608 609 mutex_lock(&p->mutex); 610 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 611 if (!pdd) { 612 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 613 err = -EINVAL; 614 goto err_pdd; 615 } 616 617 pdd = kfd_bind_process_to_device(pdd->dev, p); 618 if (IS_ERR(pdd)) { 619 err = -ESRCH; 620 goto out; 621 } 622 623 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 624 ? cache_policy_coherent : cache_policy_noncoherent; 625 626 alternate_policy = 627 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 628 ? cache_policy_coherent : cache_policy_noncoherent; 629 630 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 631 &pdd->qpd, 632 default_policy, 633 alternate_policy, 634 (void __user *)args->alternate_aperture_base, 635 args->alternate_aperture_size, 636 args->misc_process_flag)) 637 err = -EINVAL; 638 639 out: 640 err_pdd: 641 mutex_unlock(&p->mutex); 642 643 return err; 644 } 645 646 static int kfd_ioctl_set_trap_handler(struct file *filep, 647 struct kfd_process *p, void *data) 648 { 649 struct kfd_ioctl_set_trap_handler_args *args = data; 650 int err = 0; 651 struct kfd_process_device *pdd; 652 653 mutex_lock(&p->mutex); 654 655 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 656 if (!pdd) { 657 err = -EINVAL; 658 goto err_pdd; 659 } 660 661 pdd = kfd_bind_process_to_device(pdd->dev, p); 662 if (IS_ERR(pdd)) { 663 err = -ESRCH; 664 goto out; 665 } 666 667 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 668 669 out: 670 err_pdd: 671 mutex_unlock(&p->mutex); 672 673 return err; 674 } 675 676 static int kfd_ioctl_dbg_register(struct file *filep, 677 struct kfd_process *p, void *data) 678 { 679 return -EPERM; 680 } 681 682 static int kfd_ioctl_dbg_unregister(struct file *filep, 683 struct kfd_process *p, void *data) 684 { 685 return -EPERM; 686 } 687 688 static int kfd_ioctl_dbg_address_watch(struct file *filep, 689 struct kfd_process *p, void *data) 690 { 691 return -EPERM; 692 } 693 694 /* Parse and generate fixed size data structure for wave control */ 695 static int kfd_ioctl_dbg_wave_control(struct file *filep, 696 struct kfd_process *p, void *data) 697 { 698 return -EPERM; 699 } 700 701 static int kfd_ioctl_get_clock_counters(struct file *filep, 702 struct kfd_process *p, void *data) 703 { 704 struct kfd_ioctl_get_clock_counters_args *args = data; 705 struct kfd_process_device *pdd; 706 707 mutex_lock(&p->mutex); 708 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 709 mutex_unlock(&p->mutex); 710 if (pdd) 711 /* Reading GPU clock counter from KGD */ 712 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 713 else 714 /* Node without GPU resource */ 715 args->gpu_clock_counter = 0; 716 717 /* No access to rdtsc. Using raw monotonic time */ 718 args->cpu_clock_counter = ktime_get_raw_ns(); 719 args->system_clock_counter = ktime_get_boottime_ns(); 720 721 /* Since the counter is in nano-seconds we use 1GHz frequency */ 722 args->system_clock_freq = 1000000000; 723 724 return 0; 725 } 726 727 728 static int kfd_ioctl_get_process_apertures(struct file *filp, 729 struct kfd_process *p, void *data) 730 { 731 struct kfd_ioctl_get_process_apertures_args *args = data; 732 struct kfd_process_device_apertures *pAperture; 733 int i; 734 735 dev_dbg(kfd_device, "get apertures for process pid %d", p->lead_thread->pid); 736 737 args->num_of_nodes = 0; 738 739 mutex_lock(&p->mutex); 740 /* Run over all pdd of the process */ 741 for (i = 0; i < p->n_pdds; i++) { 742 struct kfd_process_device *pdd = p->pdds[i]; 743 744 pAperture = 745 &args->process_apertures[args->num_of_nodes]; 746 pAperture->gpu_id = pdd->dev->id; 747 pAperture->lds_base = pdd->lds_base; 748 pAperture->lds_limit = pdd->lds_limit; 749 pAperture->gpuvm_base = pdd->gpuvm_base; 750 pAperture->gpuvm_limit = pdd->gpuvm_limit; 751 pAperture->scratch_base = pdd->scratch_base; 752 pAperture->scratch_limit = pdd->scratch_limit; 753 754 dev_dbg(kfd_device, 755 "node id %u\n", args->num_of_nodes); 756 dev_dbg(kfd_device, 757 "gpu id %u\n", pdd->dev->id); 758 dev_dbg(kfd_device, 759 "lds_base %llX\n", pdd->lds_base); 760 dev_dbg(kfd_device, 761 "lds_limit %llX\n", pdd->lds_limit); 762 dev_dbg(kfd_device, 763 "gpuvm_base %llX\n", pdd->gpuvm_base); 764 dev_dbg(kfd_device, 765 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 766 dev_dbg(kfd_device, 767 "scratch_base %llX\n", pdd->scratch_base); 768 dev_dbg(kfd_device, 769 "scratch_limit %llX\n", pdd->scratch_limit); 770 771 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 772 break; 773 } 774 mutex_unlock(&p->mutex); 775 776 return 0; 777 } 778 779 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 780 struct kfd_process *p, void *data) 781 { 782 struct kfd_ioctl_get_process_apertures_new_args *args = data; 783 struct kfd_process_device_apertures *pa; 784 int ret; 785 int i; 786 787 dev_dbg(kfd_device, "get apertures for process pid %d", 788 p->lead_thread->pid); 789 790 if (args->num_of_nodes == 0) { 791 /* Return number of nodes, so that user space can alloacate 792 * sufficient memory 793 */ 794 mutex_lock(&p->mutex); 795 args->num_of_nodes = p->n_pdds; 796 goto out_unlock; 797 } 798 799 if (args->num_of_nodes > kfd_topology_get_num_devices()) 800 return -EINVAL; 801 802 /* Fill in process-aperture information for all available 803 * nodes, but not more than args->num_of_nodes as that is 804 * the amount of memory allocated by user 805 */ 806 pa = kzalloc_objs(struct kfd_process_device_apertures, 807 args->num_of_nodes); 808 if (!pa) 809 return -ENOMEM; 810 811 mutex_lock(&p->mutex); 812 813 if (!p->n_pdds) { 814 args->num_of_nodes = 0; 815 kfree(pa); 816 goto out_unlock; 817 } 818 819 /* Run over all pdd of the process */ 820 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 821 struct kfd_process_device *pdd = p->pdds[i]; 822 823 pa[i].gpu_id = pdd->dev->id; 824 pa[i].lds_base = pdd->lds_base; 825 pa[i].lds_limit = pdd->lds_limit; 826 pa[i].gpuvm_base = pdd->gpuvm_base; 827 pa[i].gpuvm_limit = pdd->gpuvm_limit; 828 pa[i].scratch_base = pdd->scratch_base; 829 pa[i].scratch_limit = pdd->scratch_limit; 830 831 dev_dbg(kfd_device, 832 "gpu id %u\n", pdd->dev->id); 833 dev_dbg(kfd_device, 834 "lds_base %llX\n", pdd->lds_base); 835 dev_dbg(kfd_device, 836 "lds_limit %llX\n", pdd->lds_limit); 837 dev_dbg(kfd_device, 838 "gpuvm_base %llX\n", pdd->gpuvm_base); 839 dev_dbg(kfd_device, 840 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 841 dev_dbg(kfd_device, 842 "scratch_base %llX\n", pdd->scratch_base); 843 dev_dbg(kfd_device, 844 "scratch_limit %llX\n", pdd->scratch_limit); 845 } 846 mutex_unlock(&p->mutex); 847 848 args->num_of_nodes = i; 849 ret = copy_to_user( 850 (void __user *)args->kfd_process_device_apertures_ptr, 851 pa, 852 (i * sizeof(struct kfd_process_device_apertures))); 853 kfree(pa); 854 return ret ? -EFAULT : 0; 855 856 out_unlock: 857 mutex_unlock(&p->mutex); 858 return 0; 859 } 860 861 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 862 void *data) 863 { 864 struct kfd_ioctl_create_event_args *args = data; 865 int err; 866 867 /* For dGPUs the event page is allocated in user mode. The 868 * handle is passed to KFD with the first call to this IOCTL 869 * through the event_page_offset field. 870 */ 871 if (args->event_page_offset) { 872 mutex_lock(&p->mutex); 873 err = kfd_kmap_event_page(p, args->event_page_offset); 874 mutex_unlock(&p->mutex); 875 if (err) 876 return err; 877 } 878 879 err = kfd_event_create(filp, p, args->event_type, 880 args->auto_reset != 0, args->node_id, 881 &args->event_id, &args->event_trigger_data, 882 &args->event_page_offset, 883 &args->event_slot_index); 884 885 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 886 return err; 887 } 888 889 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 890 void *data) 891 { 892 struct kfd_ioctl_destroy_event_args *args = data; 893 894 return kfd_event_destroy(p, args->event_id); 895 } 896 897 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 898 void *data) 899 { 900 struct kfd_ioctl_set_event_args *args = data; 901 902 return kfd_set_event(p, args->event_id); 903 } 904 905 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 906 void *data) 907 { 908 struct kfd_ioctl_reset_event_args *args = data; 909 910 return kfd_reset_event(p, args->event_id); 911 } 912 913 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 914 void *data) 915 { 916 struct kfd_ioctl_wait_events_args *args = data; 917 918 return kfd_wait_on_events(p, args->num_events, 919 (void __user *)args->events_ptr, 920 (args->wait_for_all != 0), 921 &args->timeout, &args->wait_result); 922 } 923 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 924 struct kfd_process *p, void *data) 925 { 926 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 927 struct kfd_process_device *pdd; 928 struct kfd_node *dev; 929 long err; 930 931 mutex_lock(&p->mutex); 932 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 933 if (!pdd) { 934 err = -EINVAL; 935 goto err_pdd; 936 } 937 dev = pdd->dev; 938 939 pdd = kfd_bind_process_to_device(dev, p); 940 if (IS_ERR(pdd)) { 941 err = PTR_ERR(pdd); 942 goto bind_process_to_device_fail; 943 } 944 945 pdd->qpd.sh_hidden_private_base = args->va_addr; 946 947 mutex_unlock(&p->mutex); 948 949 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 950 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 951 dev->kfd2kgd->set_scratch_backing_va( 952 dev->adev, args->va_addr, pdd->qpd.vmid); 953 954 return 0; 955 956 bind_process_to_device_fail: 957 err_pdd: 958 mutex_unlock(&p->mutex); 959 return err; 960 } 961 962 static int kfd_ioctl_get_tile_config(struct file *filep, 963 struct kfd_process *p, void *data) 964 { 965 struct kfd_ioctl_get_tile_config_args *args = data; 966 struct kfd_process_device *pdd; 967 struct tile_config config; 968 int err = 0; 969 970 mutex_lock(&p->mutex); 971 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 972 mutex_unlock(&p->mutex); 973 if (!pdd) 974 return -EINVAL; 975 976 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 977 978 args->gb_addr_config = config.gb_addr_config; 979 args->num_banks = config.num_banks; 980 args->num_ranks = config.num_ranks; 981 982 if (args->num_tile_configs > config.num_tile_configs) 983 args->num_tile_configs = config.num_tile_configs; 984 err = copy_to_user((void __user *)args->tile_config_ptr, 985 config.tile_config_ptr, 986 args->num_tile_configs * sizeof(uint32_t)); 987 if (err) { 988 args->num_tile_configs = 0; 989 return -EFAULT; 990 } 991 992 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 993 args->num_macro_tile_configs = 994 config.num_macro_tile_configs; 995 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 996 config.macro_tile_config_ptr, 997 args->num_macro_tile_configs * sizeof(uint32_t)); 998 if (err) { 999 args->num_macro_tile_configs = 0; 1000 return -EFAULT; 1001 } 1002 1003 return 0; 1004 } 1005 1006 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 1007 void *data) 1008 { 1009 struct kfd_ioctl_acquire_vm_args *args = data; 1010 struct kfd_process_device *pdd; 1011 struct file *drm_file; 1012 int ret; 1013 1014 drm_file = fget(args->drm_fd); 1015 if (!drm_file) 1016 return -EINVAL; 1017 1018 mutex_lock(&p->mutex); 1019 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1020 if (!pdd) { 1021 ret = -EINVAL; 1022 goto err_pdd; 1023 } 1024 1025 if (pdd->drm_file) { 1026 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 1027 goto err_drm_file; 1028 } 1029 1030 ret = kfd_process_device_init_vm(pdd, drm_file); 1031 if (ret) 1032 goto err_unlock; 1033 1034 /* On success, the PDD keeps the drm_file reference */ 1035 mutex_unlock(&p->mutex); 1036 1037 return 0; 1038 1039 err_unlock: 1040 err_pdd: 1041 err_drm_file: 1042 mutex_unlock(&p->mutex); 1043 fput(drm_file); 1044 return ret; 1045 } 1046 1047 bool kfd_dev_is_large_bar(struct kfd_node *dev) 1048 { 1049 if (dev->kfd->adev->debug_largebar) { 1050 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 1051 return true; 1052 } 1053 1054 if (dev->local_mem_info.local_mem_size_private == 0 && 1055 dev->local_mem_info.local_mem_size_public > 0) 1056 return true; 1057 1058 if (dev->local_mem_info.local_mem_size_public == 0 && 1059 dev->kfd->adev->gmc.is_app_apu) { 1060 pr_debug("APP APU, Consider like a large bar system\n"); 1061 return true; 1062 } 1063 1064 return false; 1065 } 1066 1067 static int kfd_ioctl_get_available_memory(struct file *filep, 1068 struct kfd_process *p, void *data) 1069 { 1070 struct kfd_ioctl_get_available_memory_args *args = data; 1071 struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id); 1072 1073 if (!pdd) 1074 return -EINVAL; 1075 args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev, 1076 pdd->dev->node_id); 1077 kfd_unlock_pdd(pdd); 1078 return 0; 1079 } 1080 1081 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 1082 struct kfd_process *p, void *data) 1083 { 1084 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 1085 struct kfd_process_device *pdd; 1086 void *mem; 1087 struct kfd_node *dev; 1088 int idr_handle; 1089 long err; 1090 uint64_t offset = args->mmap_offset; 1091 uint32_t flags = args->flags; 1092 1093 if (args->size == 0) 1094 return -EINVAL; 1095 1096 if (p->context_id != KFD_CONTEXT_ID_PRIMARY && (flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR)) { 1097 pr_debug("USERPTR is not supported on non-primary kfd_process\n"); 1098 1099 return -EOPNOTSUPP; 1100 } 1101 1102 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1103 /* Flush pending deferred work to avoid racing with deferred actions 1104 * from previous memory map changes (e.g. munmap). 1105 */ 1106 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 1107 mutex_lock(&p->svms.lock); 1108 mmap_write_unlock(current->mm); 1109 1110 /* Skip a special case that allocates VRAM without VA, 1111 * VA will be invalid of 0. 1112 */ 1113 if (!(!args->va_addr && (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM)) && 1114 interval_tree_iter_first(&p->svms.objects, 1115 args->va_addr >> PAGE_SHIFT, 1116 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 1117 pr_err("Address: 0x%llx already allocated by SVM\n", 1118 args->va_addr); 1119 mutex_unlock(&p->svms.lock); 1120 return -EADDRINUSE; 1121 } 1122 1123 /* When register user buffer check if it has been registered by svm by 1124 * buffer cpu virtual address. 1125 */ 1126 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) && 1127 interval_tree_iter_first(&p->svms.objects, 1128 args->mmap_offset >> PAGE_SHIFT, 1129 (args->mmap_offset + args->size - 1) >> PAGE_SHIFT)) { 1130 pr_err("User Buffer Address: 0x%llx already allocated by SVM\n", 1131 args->mmap_offset); 1132 mutex_unlock(&p->svms.lock); 1133 return -EADDRINUSE; 1134 } 1135 1136 mutex_unlock(&p->svms.lock); 1137 #endif 1138 mutex_lock(&p->mutex); 1139 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1140 if (!pdd) { 1141 err = -EINVAL; 1142 goto err_pdd; 1143 } 1144 1145 dev = pdd->dev; 1146 1147 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1148 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1149 !kfd_dev_is_large_bar(dev)) { 1150 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1151 err = -EINVAL; 1152 goto err_large_bar; 1153 } 1154 1155 pdd = kfd_bind_process_to_device(dev, p); 1156 if (IS_ERR(pdd)) { 1157 err = PTR_ERR(pdd); 1158 goto err_unlock; 1159 } 1160 1161 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1162 if (args->size != kfd_doorbell_process_slice(dev->kfd)) { 1163 err = -EINVAL; 1164 goto err_unlock; 1165 } 1166 offset = kfd_get_process_doorbells(pdd); 1167 if (!offset) { 1168 err = -ENOMEM; 1169 goto err_unlock; 1170 } 1171 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1172 if (args->size != PAGE_SIZE) { 1173 err = -EINVAL; 1174 goto err_unlock; 1175 } 1176 offset = dev->adev->rmmio_remap.bus_addr; 1177 if (!offset || (PAGE_SIZE > 4096)) { 1178 err = -ENOMEM; 1179 goto err_unlock; 1180 } 1181 } 1182 1183 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1184 dev->adev, args->va_addr, args->size, 1185 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1186 flags, false); 1187 1188 if (err) 1189 goto err_unlock; 1190 1191 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1192 if (idr_handle < 0) { 1193 err = -EFAULT; 1194 goto err_free; 1195 } 1196 1197 /* Update the VRAM usage count */ 1198 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 1199 uint64_t size = args->size; 1200 1201 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM) 1202 size >>= 1; 1203 atomic64_add(PAGE_ALIGN(size), &pdd->vram_usage); 1204 } 1205 1206 mutex_unlock(&p->mutex); 1207 1208 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1209 args->mmap_offset = offset; 1210 1211 /* MMIO is mapped through kfd device 1212 * Generate a kfd mmap offset 1213 */ 1214 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1215 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1216 | KFD_MMAP_GPU_ID(args->gpu_id); 1217 1218 return 0; 1219 1220 err_free: 1221 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1222 pdd->drm_priv, NULL); 1223 err_unlock: 1224 err_pdd: 1225 err_large_bar: 1226 mutex_unlock(&p->mutex); 1227 return err; 1228 } 1229 1230 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1231 struct kfd_process *p, void *data) 1232 { 1233 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1234 struct kfd_process_device *pdd; 1235 void *mem; 1236 int ret; 1237 uint64_t size = 0; 1238 1239 mutex_lock(&p->mutex); 1240 /* 1241 * Safeguard to prevent user space from freeing signal BO. 1242 * It will be freed at process termination. 1243 */ 1244 if (p->signal_handle && (p->signal_handle == args->handle)) { 1245 pr_err("Free signal BO is not allowed\n"); 1246 ret = -EPERM; 1247 goto err_unlock; 1248 } 1249 1250 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1251 if (!pdd) { 1252 pr_err("Process device data doesn't exist\n"); 1253 ret = -EINVAL; 1254 goto err_pdd; 1255 } 1256 1257 mem = kfd_process_device_translate_handle( 1258 pdd, GET_IDR_HANDLE(args->handle)); 1259 if (!mem) { 1260 ret = -EINVAL; 1261 goto err_unlock; 1262 } 1263 1264 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1265 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1266 1267 /* If freeing the buffer failed, leave the handle in place for 1268 * clean-up during process tear-down. 1269 */ 1270 if (!ret) 1271 kfd_process_device_remove_obj_handle( 1272 pdd, GET_IDR_HANDLE(args->handle)); 1273 1274 atomic64_sub(size, &pdd->vram_usage); 1275 1276 err_unlock: 1277 err_pdd: 1278 mutex_unlock(&p->mutex); 1279 return ret; 1280 } 1281 1282 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1283 struct kfd_process *p, void *data) 1284 { 1285 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1286 struct kfd_process_device *pdd, *peer_pdd; 1287 void *mem; 1288 struct kfd_node *dev; 1289 long err = 0; 1290 int i; 1291 uint32_t *devices_arr = NULL; 1292 1293 if (!args->n_devices) { 1294 pr_debug("Device IDs array empty\n"); 1295 return -EINVAL; 1296 } 1297 if (args->n_success > args->n_devices) { 1298 pr_debug("n_success exceeds n_devices\n"); 1299 return -EINVAL; 1300 } 1301 1302 devices_arr = memdup_array_user((void *)args->device_ids_array_ptr, 1303 args->n_devices, sizeof(*devices_arr)); 1304 1305 if (IS_ERR(devices_arr)) 1306 return PTR_ERR(devices_arr); 1307 1308 mutex_lock(&p->mutex); 1309 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1310 if (!pdd) { 1311 err = -EINVAL; 1312 goto get_process_device_data_failed; 1313 } 1314 dev = pdd->dev; 1315 1316 pdd = kfd_bind_process_to_device(dev, p); 1317 if (IS_ERR(pdd)) { 1318 err = PTR_ERR(pdd); 1319 goto bind_process_to_device_failed; 1320 } 1321 1322 mem = kfd_process_device_translate_handle(pdd, 1323 GET_IDR_HANDLE(args->handle)); 1324 if (!mem) { 1325 err = -ENOMEM; 1326 goto get_mem_obj_from_handle_failed; 1327 } 1328 1329 for (i = args->n_success; i < args->n_devices; i++) { 1330 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1331 if (!peer_pdd) { 1332 pr_debug("Getting device by id failed for 0x%x\n", 1333 devices_arr[i]); 1334 err = -EINVAL; 1335 goto get_mem_obj_from_handle_failed; 1336 } 1337 1338 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1339 if (IS_ERR(peer_pdd)) { 1340 err = PTR_ERR(peer_pdd); 1341 goto get_mem_obj_from_handle_failed; 1342 } 1343 1344 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1345 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1346 peer_pdd->drm_priv); 1347 if (err) { 1348 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1349 1350 dev_err(dev->adev->dev, 1351 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1352 pci_domain_nr(pdev->bus), 1353 pdev->bus->number, 1354 PCI_SLOT(pdev->devfn), 1355 PCI_FUNC(pdev->devfn), 1356 ((struct kgd_mem *)mem)->domain); 1357 goto map_memory_to_gpu_failed; 1358 } 1359 args->n_success = i+1; 1360 } 1361 1362 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1363 if (err) { 1364 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1365 goto sync_memory_failed; 1366 } 1367 1368 mutex_unlock(&p->mutex); 1369 1370 /* Flush TLBs after waiting for the page table updates to complete */ 1371 for (i = 0; i < args->n_devices; i++) { 1372 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1373 if (WARN_ON_ONCE(!peer_pdd)) 1374 continue; 1375 kfd_flush_tlb(peer_pdd); 1376 } 1377 kfree(devices_arr); 1378 1379 return err; 1380 1381 get_process_device_data_failed: 1382 bind_process_to_device_failed: 1383 get_mem_obj_from_handle_failed: 1384 map_memory_to_gpu_failed: 1385 sync_memory_failed: 1386 mutex_unlock(&p->mutex); 1387 kfree(devices_arr); 1388 1389 return err; 1390 } 1391 1392 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1393 struct kfd_process *p, void *data) 1394 { 1395 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1396 struct kfd_process_device *pdd, *peer_pdd; 1397 void *mem; 1398 long err = 0; 1399 uint32_t *devices_arr = NULL, i; 1400 bool flush_tlb; 1401 1402 if (!args->n_devices) { 1403 pr_debug("Device IDs array empty\n"); 1404 return -EINVAL; 1405 } 1406 if (args->n_success > args->n_devices) { 1407 pr_debug("n_success exceeds n_devices\n"); 1408 return -EINVAL; 1409 } 1410 1411 devices_arr = memdup_array_user((void *)args->device_ids_array_ptr, 1412 args->n_devices, sizeof(*devices_arr)); 1413 1414 if (IS_ERR(devices_arr)) 1415 return PTR_ERR(devices_arr); 1416 1417 mutex_lock(&p->mutex); 1418 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1419 if (!pdd) { 1420 err = -EINVAL; 1421 goto bind_process_to_device_failed; 1422 } 1423 1424 mem = kfd_process_device_translate_handle(pdd, 1425 GET_IDR_HANDLE(args->handle)); 1426 if (!mem) { 1427 err = -ENOMEM; 1428 goto get_mem_obj_from_handle_failed; 1429 } 1430 1431 for (i = args->n_success; i < args->n_devices; i++) { 1432 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1433 if (!peer_pdd) { 1434 err = -EINVAL; 1435 goto get_mem_obj_from_handle_failed; 1436 } 1437 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1438 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1439 if (err) { 1440 pr_debug("Failed to unmap from gpu %d/%d\n", i, args->n_devices); 1441 goto unmap_memory_from_gpu_failed; 1442 } 1443 args->n_success = i+1; 1444 } 1445 1446 flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd); 1447 if (flush_tlb) { 1448 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1449 (struct kgd_mem *) mem, true); 1450 if (err) { 1451 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1452 goto sync_memory_failed; 1453 } 1454 } 1455 1456 /* Flush TLBs after waiting for the page table updates to complete */ 1457 for (i = 0; i < args->n_devices; i++) { 1458 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1459 if (WARN_ON_ONCE(!peer_pdd)) 1460 continue; 1461 if (flush_tlb) 1462 kfd_flush_tlb(peer_pdd); 1463 1464 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */ 1465 err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv); 1466 if (err) 1467 goto sync_memory_failed; 1468 } 1469 1470 mutex_unlock(&p->mutex); 1471 1472 kfree(devices_arr); 1473 1474 return 0; 1475 1476 bind_process_to_device_failed: 1477 get_mem_obj_from_handle_failed: 1478 unmap_memory_from_gpu_failed: 1479 sync_memory_failed: 1480 mutex_unlock(&p->mutex); 1481 kfree(devices_arr); 1482 return err; 1483 } 1484 1485 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1486 struct kfd_process *p, void *data) 1487 { 1488 int retval; 1489 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1490 struct queue *q; 1491 struct kfd_node *dev; 1492 1493 mutex_lock(&p->mutex); 1494 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1495 1496 if (q) { 1497 dev = q->device; 1498 } else { 1499 retval = -EINVAL; 1500 goto out_unlock; 1501 } 1502 1503 if (!dev->gws) { 1504 retval = -ENODEV; 1505 goto out_unlock; 1506 } 1507 1508 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1509 retval = -ENODEV; 1510 goto out_unlock; 1511 } 1512 1513 if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) || 1514 kfd_dbg_has_cwsr_workaround(dev))) { 1515 retval = -EBUSY; 1516 goto out_unlock; 1517 } 1518 1519 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1520 mutex_unlock(&p->mutex); 1521 1522 args->first_gws = 0; 1523 return retval; 1524 1525 out_unlock: 1526 mutex_unlock(&p->mutex); 1527 return retval; 1528 } 1529 1530 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1531 struct kfd_process *p, void *data) 1532 { 1533 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1534 struct kfd_node *dev = NULL; 1535 struct amdgpu_device *dmabuf_adev; 1536 void *metadata_buffer = NULL; 1537 uint32_t flags; 1538 int8_t xcp_id; 1539 unsigned int i; 1540 int r; 1541 1542 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1543 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1544 if (dev && !kfd_devcgroup_check_permission(dev)) 1545 break; 1546 if (!dev) 1547 return -EINVAL; 1548 1549 /* Get dmabuf info from KGD */ 1550 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1551 &dmabuf_adev, &args->size, 1552 &metadata_buffer, args->metadata_size, 1553 &args->metadata_size, &flags, &xcp_id); 1554 if (r) 1555 goto exit; 1556 1557 if (xcp_id >= 0) 1558 args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id; 1559 else 1560 args->gpu_id = dev->id; 1561 args->flags = flags; 1562 1563 /* Copy metadata buffer to user mode */ 1564 if (metadata_buffer && args->metadata_ptr) { 1565 r = copy_to_user((void __user *)args->metadata_ptr, 1566 metadata_buffer, args->metadata_size); 1567 if (r != 0) 1568 r = -EFAULT; 1569 } 1570 1571 exit: 1572 kfree(metadata_buffer); 1573 1574 return r; 1575 } 1576 1577 static int kfd_ioctl_import_dmabuf(struct file *filep, 1578 struct kfd_process *p, void *data) 1579 { 1580 struct kfd_ioctl_import_dmabuf_args *args = data; 1581 struct kfd_process_device *pdd; 1582 int idr_handle; 1583 uint64_t size; 1584 void *mem; 1585 int r; 1586 1587 mutex_lock(&p->mutex); 1588 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1589 if (!pdd) { 1590 r = -EINVAL; 1591 goto err_unlock; 1592 } 1593 1594 pdd = kfd_bind_process_to_device(pdd->dev, p); 1595 if (IS_ERR(pdd)) { 1596 r = PTR_ERR(pdd); 1597 goto err_unlock; 1598 } 1599 1600 r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd, 1601 args->va_addr, pdd->drm_priv, 1602 (struct kgd_mem **)&mem, &size, 1603 NULL); 1604 if (r) 1605 goto err_unlock; 1606 1607 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1608 if (idr_handle < 0) { 1609 r = -EFAULT; 1610 goto err_free; 1611 } 1612 1613 mutex_unlock(&p->mutex); 1614 1615 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1616 1617 return 0; 1618 1619 err_free: 1620 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1621 pdd->drm_priv, NULL); 1622 err_unlock: 1623 mutex_unlock(&p->mutex); 1624 return r; 1625 } 1626 1627 static int kfd_ioctl_export_dmabuf(struct file *filep, 1628 struct kfd_process *p, void *data) 1629 { 1630 struct kfd_ioctl_export_dmabuf_args *args = data; 1631 struct kfd_process_device *pdd; 1632 struct dma_buf *dmabuf; 1633 struct kfd_node *dev; 1634 void *mem; 1635 int ret = 0; 1636 1637 dev = kfd_device_by_id(GET_GPU_ID(args->handle)); 1638 if (!dev) 1639 return -EINVAL; 1640 1641 mutex_lock(&p->mutex); 1642 1643 pdd = kfd_get_process_device_data(dev, p); 1644 if (!pdd) { 1645 ret = -EINVAL; 1646 goto err_unlock; 1647 } 1648 1649 mem = kfd_process_device_translate_handle(pdd, 1650 GET_IDR_HANDLE(args->handle)); 1651 if (!mem) { 1652 ret = -EINVAL; 1653 goto err_unlock; 1654 } 1655 1656 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1657 mutex_unlock(&p->mutex); 1658 if (ret) 1659 goto err_out; 1660 1661 ret = dma_buf_fd(dmabuf, args->flags); 1662 if (ret < 0) { 1663 dma_buf_put(dmabuf); 1664 goto err_out; 1665 } 1666 /* dma_buf_fd assigns the reference count to the fd, no need to 1667 * put the reference here. 1668 */ 1669 args->dmabuf_fd = ret; 1670 1671 return 0; 1672 1673 err_unlock: 1674 mutex_unlock(&p->mutex); 1675 err_out: 1676 return ret; 1677 } 1678 1679 /* Handle requests for watching SMI events */ 1680 static int kfd_ioctl_smi_events(struct file *filep, 1681 struct kfd_process *p, void *data) 1682 { 1683 struct kfd_ioctl_smi_events_args *args = data; 1684 struct kfd_process_device *pdd; 1685 1686 mutex_lock(&p->mutex); 1687 1688 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1689 mutex_unlock(&p->mutex); 1690 if (!pdd) 1691 return -EINVAL; 1692 1693 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1694 } 1695 1696 static int kfd_ioctl_svm_validate(void *kdata, unsigned int usize) 1697 { 1698 struct kfd_ioctl_svm_args *args = kdata; 1699 size_t expected = struct_size(args, attrs, args->nattr); 1700 1701 if (expected == SIZE_MAX || usize < expected) 1702 return -EINVAL; 1703 return 0; 1704 } 1705 1706 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1707 1708 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1709 struct kfd_process *p, void *data) 1710 { 1711 struct kfd_ioctl_set_xnack_mode_args *args = data; 1712 int r = 0; 1713 1714 mutex_lock(&p->mutex); 1715 if (args->xnack_enabled >= 0) { 1716 if (!list_empty(&p->pqm.queues)) { 1717 pr_debug("Process has user queues running\n"); 1718 r = -EBUSY; 1719 goto out_unlock; 1720 } 1721 1722 if (p->xnack_enabled == args->xnack_enabled) 1723 goto out_unlock; 1724 1725 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) { 1726 r = -EPERM; 1727 goto out_unlock; 1728 } 1729 1730 r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled); 1731 } else { 1732 args->xnack_enabled = p->xnack_enabled; 1733 } 1734 1735 out_unlock: 1736 mutex_unlock(&p->mutex); 1737 1738 return r; 1739 } 1740 1741 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1742 { 1743 struct kfd_ioctl_svm_args *args = data; 1744 int r = 0; 1745 1746 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) { 1747 pr_debug("SVM ioctl not supported on non-primary kfd process\n"); 1748 1749 return -EOPNOTSUPP; 1750 } 1751 1752 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1753 args->start_addr, args->size, args->op, args->nattr); 1754 1755 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1756 return -EINVAL; 1757 if (!args->start_addr || !args->size) 1758 return -EINVAL; 1759 1760 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1761 args->attrs); 1762 1763 return r; 1764 } 1765 #else 1766 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1767 struct kfd_process *p, void *data) 1768 { 1769 return -EPERM; 1770 } 1771 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1772 { 1773 return -EPERM; 1774 } 1775 #endif 1776 1777 static int kfd_ptl_control(struct kfd_process_device *pdd, bool enable) 1778 { 1779 struct amdgpu_device *adev = pdd->dev->adev; 1780 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1781 enum amdgpu_ptl_fmt pref_format1 = ptl->fmt1; 1782 enum amdgpu_ptl_fmt pref_format2 = ptl->fmt2; 1783 uint32_t ptl_state = enable ? 1 : 0; 1784 int ret; 1785 1786 if (ptl->hw_supported_state != AMDGPU_PTL_HW_SUPPORTED) 1787 return -EOPNOTSUPP; 1788 1789 if (!pdd->dev->kfd2kgd || !pdd->dev->kfd2kgd->ptl_ctrl) 1790 return -EOPNOTSUPP; 1791 1792 ret = pdd->dev->kfd2kgd->ptl_ctrl(adev, PSP_PTL_PERF_MON_SET, 1793 &ptl_state, 1794 &pref_format1, 1795 &pref_format2); 1796 1797 return ret; 1798 } 1799 1800 int kfd_ptl_disable_request(struct kfd_process_device *pdd, 1801 struct kfd_process *p) 1802 { 1803 struct amdgpu_device *adev = pdd->dev->adev; 1804 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1805 int ret = 0; 1806 1807 if (ptl->hw_supported_state != AMDGPU_PTL_HW_SUPPORTED) 1808 return -EOPNOTSUPP; 1809 1810 mutex_lock(&ptl->mutex); 1811 1812 if (pdd->ptl_disable_req) 1813 goto out; 1814 1815 if (atomic_inc_return(&ptl->disable_ref) == 1) { 1816 ret = kfd_ptl_control(pdd, false); 1817 if (ret) { 1818 atomic_dec(&ptl->disable_ref); 1819 dev_warn(pdd->dev->adev->dev, 1820 "failed to disable PTL\n"); 1821 goto out; 1822 } 1823 } 1824 set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1825 pdd->ptl_disable_req = true; 1826 1827 out: 1828 mutex_unlock(&ptl->mutex); 1829 return ret; 1830 } 1831 1832 int kfd_ptl_disable_release(struct kfd_process_device *pdd, 1833 struct kfd_process *p) 1834 { 1835 struct amdgpu_device *adev = pdd->dev->adev; 1836 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1837 int ret = 0; 1838 1839 if (ptl->hw_supported_state != AMDGPU_PTL_HW_SUPPORTED) 1840 return -EOPNOTSUPP; 1841 1842 mutex_lock(&ptl->mutex); 1843 1844 if (!pdd->ptl_disable_req) 1845 goto out; 1846 1847 if (atomic_dec_return(&ptl->disable_ref) == 0) { 1848 clear_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1849 ret = kfd_ptl_control(pdd, true); 1850 if (ret) { 1851 atomic_inc(&ptl->disable_ref); 1852 set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1853 dev_warn(adev->dev, "Failed to enable PTL on release: %d\n", ret); 1854 goto out; 1855 } 1856 } 1857 pdd->ptl_disable_req = false; 1858 1859 out: 1860 mutex_unlock(&ptl->mutex); 1861 return ret; 1862 } 1863 1864 static int kfd_profiler_ptl_control(struct kfd_process *p, 1865 struct kfd_ioctl_ptl_control *args) 1866 { 1867 struct kfd_process_device *pdd; 1868 int ret; 1869 1870 mutex_lock(&p->mutex); 1871 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1872 mutex_unlock(&p->mutex); 1873 1874 if (!pdd || !pdd->dev || !pdd->dev->kfd) 1875 return -EINVAL; 1876 1877 if (args->enable == 0) 1878 ret = kfd_ptl_disable_request(pdd, p); 1879 else 1880 ret = kfd_ptl_disable_release(pdd, p); 1881 1882 return ret; 1883 } 1884 1885 static int criu_checkpoint_process(struct kfd_process *p, 1886 uint8_t __user *user_priv_data, 1887 uint64_t *priv_offset) 1888 { 1889 struct kfd_criu_process_priv_data process_priv; 1890 int ret; 1891 1892 memset(&process_priv, 0, sizeof(process_priv)); 1893 1894 process_priv.version = KFD_CRIU_PRIV_VERSION; 1895 /* For CR, we don't consider negative xnack mode which is used for 1896 * querying without changing it, here 0 simply means disabled and 1 1897 * means enabled so retry for finding a valid PTE. 1898 */ 1899 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1900 1901 ret = copy_to_user(user_priv_data + *priv_offset, 1902 &process_priv, sizeof(process_priv)); 1903 1904 if (ret) { 1905 pr_err("Failed to copy process information to user\n"); 1906 ret = -EFAULT; 1907 } 1908 1909 *priv_offset += sizeof(process_priv); 1910 return ret; 1911 } 1912 1913 static int criu_checkpoint_devices(struct kfd_process *p, 1914 uint32_t num_devices, 1915 uint8_t __user *user_addr, 1916 uint8_t __user *user_priv_data, 1917 uint64_t *priv_offset) 1918 { 1919 struct kfd_criu_device_priv_data *device_priv = NULL; 1920 struct kfd_criu_device_bucket *device_buckets = NULL; 1921 int ret = 0, i; 1922 1923 device_buckets = kvcalloc(num_devices, sizeof(*device_buckets), GFP_KERNEL); 1924 if (!device_buckets) { 1925 ret = -ENOMEM; 1926 goto exit; 1927 } 1928 1929 device_priv = kvcalloc(num_devices, sizeof(*device_priv), GFP_KERNEL); 1930 if (!device_priv) { 1931 ret = -ENOMEM; 1932 goto exit; 1933 } 1934 1935 for (i = 0; i < num_devices; i++) { 1936 struct kfd_process_device *pdd = p->pdds[i]; 1937 1938 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1939 device_buckets[i].actual_gpu_id = pdd->dev->id; 1940 1941 /* 1942 * priv_data does not contain useful information for now and is reserved for 1943 * future use, so we do not set its contents. 1944 */ 1945 } 1946 1947 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1948 if (ret) { 1949 pr_err("Failed to copy device information to user\n"); 1950 ret = -EFAULT; 1951 goto exit; 1952 } 1953 1954 ret = copy_to_user(user_priv_data + *priv_offset, 1955 device_priv, 1956 num_devices * sizeof(*device_priv)); 1957 if (ret) { 1958 pr_err("Failed to copy device information to user\n"); 1959 ret = -EFAULT; 1960 } 1961 *priv_offset += num_devices * sizeof(*device_priv); 1962 1963 exit: 1964 kvfree(device_buckets); 1965 kvfree(device_priv); 1966 return ret; 1967 } 1968 1969 static uint32_t get_process_num_bos(struct kfd_process *p) 1970 { 1971 uint32_t num_of_bos = 0; 1972 int i; 1973 1974 /* Run over all PDDs of the process */ 1975 for (i = 0; i < p->n_pdds; i++) { 1976 struct kfd_process_device *pdd = p->pdds[i]; 1977 void *mem; 1978 int id; 1979 1980 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1981 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1982 1983 if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base) 1984 num_of_bos++; 1985 } 1986 } 1987 return num_of_bos; 1988 } 1989 1990 static int criu_get_prime_handle(struct kgd_mem *mem, 1991 int flags, u32 *shared_fd, 1992 struct file **file) 1993 { 1994 struct dma_buf *dmabuf; 1995 int ret; 1996 1997 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1998 if (ret) { 1999 pr_err("dmabuf export failed for the BO\n"); 2000 return ret; 2001 } 2002 2003 ret = get_unused_fd_flags(flags); 2004 if (ret < 0) { 2005 pr_err("dmabuf create fd failed, ret:%d\n", ret); 2006 goto out_free_dmabuf; 2007 } 2008 2009 *shared_fd = ret; 2010 *file = dmabuf->file; 2011 return 0; 2012 2013 out_free_dmabuf: 2014 dma_buf_put(dmabuf); 2015 return ret; 2016 } 2017 2018 static void commit_files(struct file **files, 2019 struct kfd_criu_bo_bucket *bo_buckets, 2020 unsigned int count, 2021 int err) 2022 { 2023 while (count--) { 2024 struct file *file = files[count]; 2025 2026 if (!file) 2027 continue; 2028 if (err) { 2029 fput(file); 2030 put_unused_fd(bo_buckets[count].dmabuf_fd); 2031 } else { 2032 fd_install(bo_buckets[count].dmabuf_fd, file); 2033 } 2034 } 2035 } 2036 2037 static int criu_checkpoint_bos(struct kfd_process *p, 2038 uint32_t num_bos, 2039 uint8_t __user *user_bos, 2040 uint8_t __user *user_priv_data, 2041 uint64_t *priv_offset) 2042 { 2043 struct kfd_criu_bo_bucket *bo_buckets; 2044 struct kfd_criu_bo_priv_data *bo_privs; 2045 struct file **files = NULL; 2046 int ret = 0, pdd_index, bo_index = 0, id; 2047 void *mem; 2048 2049 bo_buckets = kvcalloc(num_bos, sizeof(*bo_buckets), GFP_KERNEL); 2050 if (!bo_buckets) 2051 return -ENOMEM; 2052 2053 bo_privs = kvcalloc(num_bos, sizeof(*bo_privs), GFP_KERNEL); 2054 if (!bo_privs) { 2055 ret = -ENOMEM; 2056 goto exit; 2057 } 2058 2059 files = kvcalloc(num_bos, sizeof(struct file *), GFP_KERNEL); 2060 if (!files) { 2061 ret = -ENOMEM; 2062 goto exit; 2063 } 2064 2065 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 2066 struct kfd_process_device *pdd = p->pdds[pdd_index]; 2067 struct amdgpu_bo *dumper_bo; 2068 struct kgd_mem *kgd_mem; 2069 2070 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 2071 struct kfd_criu_bo_bucket *bo_bucket; 2072 struct kfd_criu_bo_priv_data *bo_priv; 2073 int i, dev_idx = 0; 2074 2075 kgd_mem = (struct kgd_mem *)mem; 2076 dumper_bo = kgd_mem->bo; 2077 2078 /* Skip checkpointing BOs that are used for Trap handler 2079 * code and state. Currently, these BOs have a VA that 2080 * is less GPUVM Base 2081 */ 2082 if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base) 2083 continue; 2084 2085 bo_bucket = &bo_buckets[bo_index]; 2086 bo_priv = &bo_privs[bo_index]; 2087 2088 bo_bucket->gpu_id = pdd->user_gpu_id; 2089 bo_bucket->addr = (uint64_t)kgd_mem->va; 2090 bo_bucket->size = amdgpu_bo_size(dumper_bo); 2091 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 2092 bo_priv->idr_handle = id; 2093 2094 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2095 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 2096 &bo_priv->user_addr); 2097 if (ret) { 2098 pr_err("Failed to obtain user address for user-pointer bo\n"); 2099 goto exit; 2100 } 2101 } 2102 if (bo_bucket->alloc_flags 2103 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2104 ret = criu_get_prime_handle(kgd_mem, 2105 bo_bucket->alloc_flags & 2106 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 2107 &bo_bucket->dmabuf_fd, &files[bo_index]); 2108 if (ret) 2109 goto exit; 2110 } else { 2111 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2112 } 2113 2114 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2115 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 2116 KFD_MMAP_GPU_ID(pdd->dev->id); 2117 else if (bo_bucket->alloc_flags & 2118 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 2119 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 2120 KFD_MMAP_GPU_ID(pdd->dev->id); 2121 else 2122 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 2123 2124 for (i = 0; i < p->n_pdds; i++) { 2125 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->drm_priv, kgd_mem)) 2126 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 2127 } 2128 2129 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 2130 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 2131 bo_bucket->size, 2132 bo_bucket->addr, 2133 bo_bucket->offset, 2134 bo_bucket->gpu_id, 2135 bo_bucket->alloc_flags, 2136 bo_priv->idr_handle); 2137 bo_index++; 2138 } 2139 } 2140 2141 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 2142 if (ret) { 2143 pr_err("Failed to copy BO information to user\n"); 2144 ret = -EFAULT; 2145 goto exit; 2146 } 2147 2148 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 2149 if (ret) { 2150 pr_err("Failed to copy BO priv information to user\n"); 2151 ret = -EFAULT; 2152 goto exit; 2153 } 2154 2155 *priv_offset += num_bos * sizeof(*bo_privs); 2156 2157 exit: 2158 commit_files(files, bo_buckets, bo_index, ret); 2159 kvfree(files); 2160 kvfree(bo_buckets); 2161 kvfree(bo_privs); 2162 return ret; 2163 } 2164 2165 static int criu_get_process_object_info(struct kfd_process *p, 2166 uint32_t *num_devices, 2167 uint32_t *num_bos, 2168 uint32_t *num_objects, 2169 uint64_t *objs_priv_size) 2170 { 2171 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 2172 uint32_t num_queues, num_events, num_svm_ranges; 2173 int ret; 2174 2175 *num_devices = p->n_pdds; 2176 *num_bos = get_process_num_bos(p); 2177 2178 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 2179 if (ret) 2180 return ret; 2181 2182 num_events = kfd_get_num_events(p); 2183 2184 svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 2185 2186 *num_objects = num_queues + num_events + num_svm_ranges; 2187 2188 if (objs_priv_size) { 2189 priv_size = sizeof(struct kfd_criu_process_priv_data); 2190 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 2191 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 2192 priv_size += queues_priv_data_size; 2193 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 2194 priv_size += svm_priv_data_size; 2195 *objs_priv_size = priv_size; 2196 } 2197 return 0; 2198 } 2199 2200 static int criu_checkpoint(struct file *filep, 2201 struct kfd_process *p, 2202 struct kfd_ioctl_criu_args *args) 2203 { 2204 int ret; 2205 uint32_t num_devices, num_bos, num_objects; 2206 uint64_t priv_size, priv_offset = 0, bo_priv_offset; 2207 2208 if (!args->devices || !args->bos || !args->priv_data) 2209 return -EINVAL; 2210 2211 mutex_lock(&p->mutex); 2212 2213 if (!p->n_pdds) { 2214 pr_err("No pdd for given process\n"); 2215 ret = -ENODEV; 2216 goto exit_unlock; 2217 } 2218 2219 /* Confirm all process queues are evicted */ 2220 if (!p->queues_paused) { 2221 pr_err("Cannot dump process when queues are not in evicted state\n"); 2222 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 2223 ret = -EINVAL; 2224 goto exit_unlock; 2225 } 2226 2227 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 2228 if (ret) 2229 goto exit_unlock; 2230 2231 if (num_devices != args->num_devices || 2232 num_bos != args->num_bos || 2233 num_objects != args->num_objects || 2234 priv_size != args->priv_data_size) { 2235 2236 ret = -EINVAL; 2237 goto exit_unlock; 2238 } 2239 2240 /* each function will store private data inside priv_data and adjust priv_offset */ 2241 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 2242 if (ret) 2243 goto exit_unlock; 2244 2245 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 2246 (uint8_t __user *)args->priv_data, &priv_offset); 2247 if (ret) 2248 goto exit_unlock; 2249 2250 /* Leave room for BOs in the private data. They need to be restored 2251 * before events, but we checkpoint them last to simplify the error 2252 * handling. 2253 */ 2254 bo_priv_offset = priv_offset; 2255 priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data); 2256 2257 if (num_objects) { 2258 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 2259 &priv_offset); 2260 if (ret) 2261 goto exit_unlock; 2262 2263 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 2264 &priv_offset); 2265 if (ret) 2266 goto exit_unlock; 2267 2268 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 2269 if (ret) 2270 goto exit_unlock; 2271 } 2272 2273 /* This must be the last thing in this function that can fail. 2274 * Otherwise we leak dmabuf file descriptors. 2275 */ 2276 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 2277 (uint8_t __user *)args->priv_data, &bo_priv_offset); 2278 2279 exit_unlock: 2280 mutex_unlock(&p->mutex); 2281 if (ret) 2282 pr_err("Failed to dump CRIU ret:%d\n", ret); 2283 else 2284 pr_debug("CRIU dump ret:%d\n", ret); 2285 2286 return ret; 2287 } 2288 2289 static int criu_restore_process(struct kfd_process *p, 2290 struct kfd_ioctl_criu_args *args, 2291 uint64_t *priv_offset, 2292 uint64_t max_priv_data_size) 2293 { 2294 int ret = 0; 2295 struct kfd_criu_process_priv_data process_priv; 2296 2297 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 2298 return -EINVAL; 2299 2300 ret = copy_from_user(&process_priv, 2301 (void __user *)(args->priv_data + *priv_offset), 2302 sizeof(process_priv)); 2303 if (ret) { 2304 pr_err("Failed to copy process private information from user\n"); 2305 ret = -EFAULT; 2306 goto exit; 2307 } 2308 *priv_offset += sizeof(process_priv); 2309 2310 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 2311 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 2312 process_priv.version, KFD_CRIU_PRIV_VERSION); 2313 return -EINVAL; 2314 } 2315 2316 pr_debug("Setting XNACK mode\n"); 2317 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 2318 pr_err("xnack mode cannot be set\n"); 2319 ret = -EPERM; 2320 goto exit; 2321 } else { 2322 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 2323 p->xnack_enabled = process_priv.xnack_mode; 2324 } 2325 2326 exit: 2327 return ret; 2328 } 2329 2330 static int criu_restore_devices(struct kfd_process *p, 2331 struct kfd_ioctl_criu_args *args, 2332 uint64_t *priv_offset, 2333 uint64_t max_priv_data_size) 2334 { 2335 struct kfd_criu_device_bucket *device_buckets; 2336 struct kfd_criu_device_priv_data *device_privs; 2337 int ret = 0; 2338 uint32_t i; 2339 2340 if (args->num_devices != p->n_pdds) 2341 return -EINVAL; 2342 2343 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2344 return -EINVAL; 2345 2346 device_buckets = memdup_array_user((void *)args->devices, 2347 args->num_devices, sizeof(*device_buckets)); 2348 2349 if (IS_ERR(device_buckets)) 2350 return PTR_ERR(device_buckets); 2351 2352 for (i = 0; i < args->num_devices; i++) { 2353 struct kfd_node *dev; 2354 struct kfd_process_device *pdd; 2355 struct file *drm_file; 2356 2357 /* device private data is not currently used */ 2358 2359 if (!device_buckets[i].user_gpu_id) { 2360 pr_err("Invalid user gpu_id\n"); 2361 ret = -EINVAL; 2362 goto exit; 2363 } 2364 2365 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2366 if (!dev) { 2367 pr_err("Failed to find device with gpu_id = %x\n", 2368 device_buckets[i].actual_gpu_id); 2369 ret = -EINVAL; 2370 goto exit; 2371 } 2372 2373 pdd = kfd_get_process_device_data(dev, p); 2374 if (!pdd) { 2375 pr_err("Failed to get pdd for gpu_id = %x\n", 2376 device_buckets[i].actual_gpu_id); 2377 ret = -EINVAL; 2378 goto exit; 2379 } 2380 2381 if (pdd->drm_file) { 2382 ret = -EINVAL; 2383 goto exit; 2384 } 2385 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2386 2387 drm_file = fget(device_buckets[i].drm_fd); 2388 if (!drm_file) { 2389 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2390 device_buckets[i].drm_fd); 2391 ret = -EINVAL; 2392 goto exit; 2393 } 2394 2395 /* create the vm using render nodes for kfd pdd */ 2396 if (kfd_process_device_init_vm(pdd, drm_file)) { 2397 pr_err("could not init vm for given pdd\n"); 2398 /* On success, the PDD keeps the drm_file reference */ 2399 fput(drm_file); 2400 ret = -EINVAL; 2401 goto exit; 2402 } 2403 /* 2404 * pdd now already has the vm bound to render node so below api won't create a new 2405 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2406 * for iommu v2 binding and runtime pm. 2407 */ 2408 pdd = kfd_bind_process_to_device(dev, p); 2409 if (IS_ERR(pdd)) { 2410 ret = PTR_ERR(pdd); 2411 goto exit; 2412 } 2413 2414 if (!pdd->qpd.proc_doorbells) { 2415 ret = kfd_alloc_process_doorbells(dev->kfd, pdd); 2416 if (ret) 2417 goto exit; 2418 } 2419 } 2420 2421 /* 2422 * We are not copying device private data from user as we are not using the data for now, 2423 * but we still adjust for its private data. 2424 */ 2425 *priv_offset += args->num_devices * sizeof(*device_privs); 2426 2427 exit: 2428 kfree(device_buckets); 2429 return ret; 2430 } 2431 2432 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2433 struct kfd_criu_bo_bucket *bo_bucket, 2434 struct kfd_criu_bo_priv_data *bo_priv, 2435 struct kgd_mem **kgd_mem) 2436 { 2437 int idr_handle; 2438 int ret; 2439 const bool criu_resume = true; 2440 u64 offset; 2441 2442 if (bo_priv->idr_handle > INT_MAX) 2443 return -EINVAL; 2444 2445 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2446 if (bo_bucket->size != 2447 kfd_doorbell_process_slice(pdd->dev->kfd)) 2448 return -EINVAL; 2449 2450 offset = kfd_get_process_doorbells(pdd); 2451 if (!offset) 2452 return -ENOMEM; 2453 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2454 /* MMIO BOs need remapped bus address */ 2455 if (bo_bucket->size != PAGE_SIZE) { 2456 pr_err("Invalid page size\n"); 2457 return -EINVAL; 2458 } 2459 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2460 if (!offset || (PAGE_SIZE > 4096)) { 2461 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2462 return -ENOMEM; 2463 } 2464 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2465 offset = bo_priv->user_addr; 2466 } 2467 /* Create the BO */ 2468 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2469 bo_bucket->size, pdd->drm_priv, kgd_mem, 2470 &offset, bo_bucket->alloc_flags, criu_resume); 2471 if (ret) { 2472 pr_err("Could not create the BO\n"); 2473 return ret; 2474 } 2475 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2476 bo_bucket->size, bo_bucket->addr, offset); 2477 2478 /* Restore previous IDR handle */ 2479 pr_debug("Restoring old IDR handle for the BO"); 2480 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2481 bo_priv->idr_handle + 1, GFP_KERNEL); 2482 2483 if (idr_handle < 0) { 2484 pr_err("Could not allocate idr\n"); 2485 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2486 NULL); 2487 return -ENOMEM; 2488 } 2489 2490 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2491 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2492 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2493 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2494 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2495 bo_bucket->restored_offset = offset; 2496 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2497 bo_bucket->restored_offset = offset; 2498 /* Update the VRAM usage count */ 2499 atomic64_add(bo_bucket->size, &pdd->vram_usage); 2500 } 2501 return 0; 2502 } 2503 2504 static int criu_restore_bo(struct kfd_process *p, 2505 struct kfd_criu_bo_bucket *bo_bucket, 2506 struct kfd_criu_bo_priv_data *bo_priv, 2507 struct file **file) 2508 { 2509 struct kfd_process_device *pdd; 2510 struct kgd_mem *kgd_mem; 2511 int ret; 2512 int j; 2513 2514 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2515 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2516 bo_priv->idr_handle); 2517 2518 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2519 if (!pdd) { 2520 pr_err("Failed to get pdd\n"); 2521 return -ENODEV; 2522 } 2523 2524 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2525 if (ret) 2526 return ret; 2527 2528 /* now map these BOs to GPU/s */ 2529 for (j = 0; j < p->n_pdds; j++) { 2530 struct kfd_node *peer; 2531 struct kfd_process_device *peer_pdd; 2532 2533 if (!bo_priv->mapped_gpuids[j]) 2534 break; 2535 2536 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2537 if (!peer_pdd) 2538 return -EINVAL; 2539 2540 peer = peer_pdd->dev; 2541 2542 peer_pdd = kfd_bind_process_to_device(peer, p); 2543 if (IS_ERR(peer_pdd)) 2544 return PTR_ERR(peer_pdd); 2545 2546 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2547 peer_pdd->drm_priv); 2548 if (ret) { 2549 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2550 return ret; 2551 } 2552 } 2553 2554 pr_debug("map memory was successful for the BO\n"); 2555 /* create the dmabuf object and export the bo */ 2556 if (bo_bucket->alloc_flags 2557 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2558 ret = criu_get_prime_handle(kgd_mem, DRM_RDWR, 2559 &bo_bucket->dmabuf_fd, file); 2560 if (ret) 2561 return ret; 2562 } else { 2563 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2564 } 2565 2566 return 0; 2567 } 2568 2569 static int criu_restore_bos(struct kfd_process *p, 2570 struct kfd_ioctl_criu_args *args, 2571 uint64_t *priv_offset, 2572 uint64_t max_priv_data_size) 2573 { 2574 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2575 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2576 struct file **files = NULL; 2577 int ret = 0; 2578 uint32_t i = 0; 2579 2580 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2581 return -EINVAL; 2582 2583 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2584 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2585 2586 bo_buckets = kvmalloc_objs(*bo_buckets, args->num_bos); 2587 if (!bo_buckets) 2588 return -ENOMEM; 2589 2590 files = kvcalloc(args->num_bos, sizeof(struct file *), GFP_KERNEL); 2591 if (!files) { 2592 ret = -ENOMEM; 2593 goto exit; 2594 } 2595 2596 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2597 args->num_bos * sizeof(*bo_buckets)); 2598 if (ret) { 2599 pr_err("Failed to copy BOs information from user\n"); 2600 ret = -EFAULT; 2601 goto exit; 2602 } 2603 2604 bo_privs = kvmalloc_objs(*bo_privs, args->num_bos); 2605 if (!bo_privs) { 2606 ret = -ENOMEM; 2607 goto exit; 2608 } 2609 2610 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2611 args->num_bos * sizeof(*bo_privs)); 2612 if (ret) { 2613 pr_err("Failed to copy BOs information from user\n"); 2614 ret = -EFAULT; 2615 goto exit; 2616 } 2617 *priv_offset += args->num_bos * sizeof(*bo_privs); 2618 2619 /* Create and map new BOs */ 2620 for (; i < args->num_bos; i++) { 2621 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i], &files[i]); 2622 if (ret) { 2623 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2624 goto exit; 2625 } 2626 } /* done */ 2627 2628 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2629 ret = copy_to_user((void __user *)args->bos, 2630 bo_buckets, 2631 (args->num_bos * sizeof(*bo_buckets))); 2632 if (ret) 2633 ret = -EFAULT; 2634 2635 exit: 2636 commit_files(files, bo_buckets, i, ret); 2637 kvfree(files); 2638 kvfree(bo_buckets); 2639 kvfree(bo_privs); 2640 return ret; 2641 } 2642 2643 static int criu_restore_objects(struct file *filep, 2644 struct kfd_process *p, 2645 struct kfd_ioctl_criu_args *args, 2646 uint64_t *priv_offset, 2647 uint64_t max_priv_data_size) 2648 { 2649 int ret = 0; 2650 uint32_t i; 2651 2652 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2653 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2654 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2655 2656 for (i = 0; i < args->num_objects; i++) { 2657 uint32_t object_type; 2658 2659 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2660 pr_err("Invalid private data size\n"); 2661 return -EINVAL; 2662 } 2663 2664 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2665 if (ret) { 2666 pr_err("Failed to copy private information from user\n"); 2667 goto exit; 2668 } 2669 2670 switch (object_type) { 2671 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2672 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2673 priv_offset, max_priv_data_size); 2674 if (ret) 2675 goto exit; 2676 break; 2677 case KFD_CRIU_OBJECT_TYPE_EVENT: 2678 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2679 priv_offset, max_priv_data_size); 2680 if (ret) 2681 goto exit; 2682 break; 2683 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2684 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2685 priv_offset, max_priv_data_size); 2686 if (ret) 2687 goto exit; 2688 break; 2689 default: 2690 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2691 ret = -EINVAL; 2692 goto exit; 2693 } 2694 } 2695 exit: 2696 return ret; 2697 } 2698 2699 static int criu_restore(struct file *filep, 2700 struct kfd_process *p, 2701 struct kfd_ioctl_criu_args *args) 2702 { 2703 uint64_t priv_offset = 0; 2704 int ret = 0; 2705 2706 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2707 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2708 2709 if ((args->num_bos > 0 && !args->bos) || !args->devices || !args->priv_data || 2710 !args->priv_data_size || !args->num_devices) 2711 return -EINVAL; 2712 2713 mutex_lock(&p->mutex); 2714 2715 /* 2716 * Set the process to evicted state to avoid running any new queues before all the memory 2717 * mappings are ready. 2718 */ 2719 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE); 2720 if (ret) 2721 goto exit_unlock; 2722 2723 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2724 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2725 if (ret) 2726 goto exit_unlock; 2727 2728 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2729 if (ret) 2730 goto exit_unlock; 2731 2732 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2733 if (ret) 2734 goto exit_unlock; 2735 2736 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2737 if (ret) 2738 goto exit_unlock; 2739 2740 if (priv_offset != args->priv_data_size) { 2741 pr_err("Invalid private data size\n"); 2742 ret = -EINVAL; 2743 } 2744 2745 exit_unlock: 2746 mutex_unlock(&p->mutex); 2747 if (ret) 2748 pr_err("Failed to restore CRIU ret:%d\n", ret); 2749 else 2750 pr_debug("CRIU restore successful\n"); 2751 2752 return ret; 2753 } 2754 2755 static int criu_unpause(struct file *filep, 2756 struct kfd_process *p, 2757 struct kfd_ioctl_criu_args *args) 2758 { 2759 int ret; 2760 2761 mutex_lock(&p->mutex); 2762 2763 if (!p->queues_paused) { 2764 mutex_unlock(&p->mutex); 2765 return -EINVAL; 2766 } 2767 2768 ret = kfd_process_restore_queues(p); 2769 if (ret) 2770 pr_err("Failed to unpause queues ret:%d\n", ret); 2771 else 2772 p->queues_paused = false; 2773 2774 mutex_unlock(&p->mutex); 2775 2776 return ret; 2777 } 2778 2779 static int criu_resume(struct file *filep, 2780 struct kfd_process *p, 2781 struct kfd_ioctl_criu_args *args) 2782 { 2783 struct kfd_process *target = NULL; 2784 struct pid *pid = NULL; 2785 int ret = 0; 2786 2787 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2788 args->pid); 2789 2790 pid = find_get_pid(args->pid); 2791 if (!pid) { 2792 pr_err("Cannot find pid info for %i\n", args->pid); 2793 return -ESRCH; 2794 } 2795 2796 pr_debug("calling kfd_lookup_process_by_pid\n"); 2797 target = kfd_lookup_process_by_pid(pid); 2798 2799 put_pid(pid); 2800 2801 if (!target) { 2802 pr_debug("Cannot find process info for %i\n", args->pid); 2803 return -ESRCH; 2804 } 2805 2806 mutex_lock(&target->mutex); 2807 ret = kfd_criu_resume_svm(target); 2808 if (ret) { 2809 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2810 goto exit; 2811 } 2812 2813 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2814 if (ret) 2815 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2816 2817 exit: 2818 mutex_unlock(&target->mutex); 2819 2820 kfd_unref_process(target); 2821 return ret; 2822 } 2823 2824 static int criu_process_info(struct file *filep, 2825 struct kfd_process *p, 2826 struct kfd_ioctl_criu_args *args) 2827 { 2828 int ret = 0; 2829 2830 mutex_lock(&p->mutex); 2831 2832 if (!p->n_pdds) { 2833 pr_err("No pdd for given process\n"); 2834 ret = -ENODEV; 2835 goto err_unlock; 2836 } 2837 2838 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT); 2839 if (ret) 2840 goto err_unlock; 2841 2842 p->queues_paused = true; 2843 2844 args->pid = task_pid_nr_ns(p->lead_thread, 2845 task_active_pid_ns(p->lead_thread)); 2846 2847 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2848 &args->num_objects, &args->priv_data_size); 2849 if (ret) 2850 goto err_unlock; 2851 2852 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2853 args->num_devices, args->num_bos, args->num_objects, 2854 args->priv_data_size); 2855 2856 err_unlock: 2857 if (ret) { 2858 kfd_process_restore_queues(p); 2859 p->queues_paused = false; 2860 } 2861 mutex_unlock(&p->mutex); 2862 return ret; 2863 } 2864 2865 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2866 { 2867 struct kfd_ioctl_criu_args *args = data; 2868 int ret; 2869 2870 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2871 switch (args->op) { 2872 case KFD_CRIU_OP_PROCESS_INFO: 2873 ret = criu_process_info(filep, p, args); 2874 break; 2875 case KFD_CRIU_OP_CHECKPOINT: 2876 ret = criu_checkpoint(filep, p, args); 2877 break; 2878 case KFD_CRIU_OP_UNPAUSE: 2879 ret = criu_unpause(filep, p, args); 2880 break; 2881 case KFD_CRIU_OP_RESTORE: 2882 ret = criu_restore(filep, p, args); 2883 break; 2884 case KFD_CRIU_OP_RESUME: 2885 ret = criu_resume(filep, p, args); 2886 break; 2887 default: 2888 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2889 ret = -EINVAL; 2890 break; 2891 } 2892 2893 if (ret) 2894 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2895 2896 return ret; 2897 } 2898 2899 static int runtime_enable(struct kfd_process *p, uint64_t r_debug, 2900 bool enable_ttmp_setup) 2901 { 2902 int i = 0, ret = 0; 2903 2904 if (p->is_runtime_retry) 2905 goto retry; 2906 2907 if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 2908 return -EBUSY; 2909 2910 for (i = 0; i < p->n_pdds; i++) { 2911 struct kfd_process_device *pdd = p->pdds[i]; 2912 2913 if (pdd->qpd.queue_count) 2914 return -EEXIST; 2915 2916 /* 2917 * Setup TTMPs by default. 2918 * Note that this call must remain here for MES ADD QUEUE to 2919 * skip_process_ctx_clear unconditionally as the first call to 2920 * SET_SHADER_DEBUGGER clears any stale process context data 2921 * saved in MES. 2922 */ 2923 if (pdd->dev->kfd->shared_resources.enable_mes) { 2924 ret = kfd_dbg_set_mes_debug_mode( 2925 pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2926 if (ret) 2927 return ret; 2928 } 2929 } 2930 2931 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 2932 p->runtime_info.r_debug = r_debug; 2933 p->runtime_info.ttmp_setup = enable_ttmp_setup; 2934 2935 if (p->runtime_info.ttmp_setup) { 2936 for (i = 0; i < p->n_pdds; i++) { 2937 struct kfd_process_device *pdd = p->pdds[i]; 2938 2939 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) { 2940 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 2941 pdd->dev->kfd2kgd->enable_debug_trap( 2942 pdd->dev->adev, 2943 true, 2944 pdd->dev->vm_info.last_vmid_kfd); 2945 } else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2946 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 2947 pdd->dev->adev, 2948 false, 2949 0); 2950 } 2951 } 2952 } 2953 2954 retry: 2955 if (p->debug_trap_enabled) { 2956 if (!p->is_runtime_retry) { 2957 kfd_dbg_trap_activate(p); 2958 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2959 p, NULL, 0, false, NULL, 0); 2960 } 2961 2962 mutex_unlock(&p->mutex); 2963 ret = down_interruptible(&p->runtime_enable_sema); 2964 mutex_lock(&p->mutex); 2965 2966 p->is_runtime_retry = !!ret; 2967 } 2968 2969 return ret; 2970 } 2971 2972 static int runtime_disable(struct kfd_process *p) 2973 { 2974 int i = 0, ret = 0; 2975 bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED; 2976 2977 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED; 2978 p->runtime_info.r_debug = 0; 2979 2980 if (p->debug_trap_enabled) { 2981 if (was_enabled) 2982 kfd_dbg_trap_deactivate(p, false, 0); 2983 2984 if (!p->is_runtime_retry) 2985 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2986 p, NULL, 0, false, NULL, 0); 2987 2988 mutex_unlock(&p->mutex); 2989 ret = down_interruptible(&p->runtime_enable_sema); 2990 mutex_lock(&p->mutex); 2991 2992 p->is_runtime_retry = !!ret; 2993 if (ret) 2994 return ret; 2995 } 2996 2997 if (was_enabled && p->runtime_info.ttmp_setup) { 2998 for (i = 0; i < p->n_pdds; i++) { 2999 struct kfd_process_device *pdd = p->pdds[i]; 3000 3001 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) 3002 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 3003 } 3004 } 3005 3006 p->runtime_info.ttmp_setup = false; 3007 3008 /* disable ttmp setup */ 3009 for (i = 0; i < p->n_pdds; i++) { 3010 struct kfd_process_device *pdd = p->pdds[i]; 3011 int last_err = 0; 3012 3013 if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 3014 pdd->spi_dbg_override = 3015 pdd->dev->kfd2kgd->disable_debug_trap( 3016 pdd->dev->adev, 3017 false, 3018 pdd->dev->vm_info.last_vmid_kfd); 3019 3020 if (!pdd->dev->kfd->shared_resources.enable_mes) 3021 last_err = debug_refresh_runlist(pdd->dev->dqm); 3022 else 3023 last_err = kfd_dbg_set_mes_debug_mode(pdd, 3024 !kfd_dbg_has_cwsr_workaround(pdd->dev)); 3025 3026 if (last_err) 3027 ret = last_err; 3028 } 3029 } 3030 3031 return ret; 3032 } 3033 3034 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data) 3035 { 3036 struct kfd_ioctl_runtime_enable_args *args = data; 3037 int r; 3038 3039 mutex_lock(&p->mutex); 3040 3041 if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK) 3042 r = runtime_enable(p, args->r_debug, 3043 !!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK)); 3044 else 3045 r = runtime_disable(p); 3046 3047 mutex_unlock(&p->mutex); 3048 3049 return r; 3050 } 3051 3052 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data) 3053 { 3054 struct kfd_ioctl_dbg_trap_args *args = data; 3055 struct task_struct *thread = NULL; 3056 struct mm_struct *mm = NULL; 3057 struct pid *pid = NULL; 3058 struct kfd_process *target = NULL; 3059 struct kfd_process_device *pdd = NULL; 3060 int r = 0; 3061 3062 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) { 3063 pr_debug("Set debug trap ioctl can not be invoked on non-primary kfd process\n"); 3064 3065 return -EOPNOTSUPP; 3066 } 3067 3068 if (sched_policy == KFD_SCHED_POLICY_NO_HWS) { 3069 pr_err("Debugging does not support sched_policy %i", sched_policy); 3070 return -EINVAL; 3071 } 3072 3073 pid = find_get_pid(args->pid); 3074 if (!pid) { 3075 pr_debug("Cannot find pid info for %i\n", args->pid); 3076 r = -ESRCH; 3077 goto out; 3078 } 3079 3080 thread = get_pid_task(pid, PIDTYPE_PID); 3081 if (!thread) { 3082 r = -ESRCH; 3083 goto out; 3084 } 3085 3086 mm = get_task_mm(thread); 3087 if (!mm) { 3088 r = -ESRCH; 3089 goto out; 3090 } 3091 3092 if (args->op == KFD_IOC_DBG_TRAP_ENABLE) { 3093 bool create_process; 3094 3095 rcu_read_lock(); 3096 create_process = thread && thread != current && ptrace_parent(thread) == current; 3097 rcu_read_unlock(); 3098 3099 target = create_process ? kfd_create_process(thread) : 3100 kfd_lookup_process_by_pid(pid); 3101 } else { 3102 target = kfd_lookup_process_by_pid(pid); 3103 } 3104 3105 if (IS_ERR_OR_NULL(target)) { 3106 pr_debug("Cannot find process PID %i to debug\n", args->pid); 3107 r = target ? PTR_ERR(target) : -ESRCH; 3108 target = NULL; 3109 goto out; 3110 } 3111 3112 if (target->context_id != KFD_CONTEXT_ID_PRIMARY) { 3113 pr_debug("Set debug trap ioctl not supported on non-primary kfd process\n"); 3114 r = -EOPNOTSUPP; 3115 goto out; 3116 } 3117 3118 /* 3119 * Verify debugger has permission to debug target process. 3120 * For cross-process debugging, require active ptrace relationship. 3121 * This applies to ALL operations to prevent unauthorized interference. 3122 */ 3123 rcu_read_lock(); 3124 if (target != p && ptrace_parent(target->lead_thread) != current 3125 && target->debugger_process != p) { 3126 pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid); 3127 r = -EPERM; 3128 } 3129 rcu_read_unlock(); 3130 3131 if (r) 3132 goto out; 3133 3134 mutex_lock(&target->mutex); 3135 3136 if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) { 3137 pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op); 3138 r = -EINVAL; 3139 goto unlock_out; 3140 } 3141 3142 if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED && 3143 (args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE || 3144 args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE || 3145 args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES || 3146 args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES || 3147 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 3148 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH || 3149 args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) { 3150 r = -EPERM; 3151 goto unlock_out; 3152 } 3153 3154 if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 3155 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) { 3156 int user_gpu_id = kfd_process_get_user_gpu_id(target, 3157 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ? 3158 args->set_node_address_watch.gpu_id : 3159 args->clear_node_address_watch.gpu_id); 3160 3161 pdd = kfd_process_device_data_by_id(target, user_gpu_id); 3162 if (user_gpu_id == -EINVAL || !pdd) { 3163 r = -ENODEV; 3164 goto unlock_out; 3165 } 3166 } 3167 3168 switch (args->op) { 3169 case KFD_IOC_DBG_TRAP_ENABLE: 3170 if (target != p) 3171 target->debugger_process = p; 3172 3173 r = kfd_dbg_trap_enable(target, 3174 args->enable.dbg_fd, 3175 (void __user *)args->enable.rinfo_ptr, 3176 &args->enable.rinfo_size); 3177 if (!r) 3178 target->exception_enable_mask = args->enable.exception_mask; 3179 3180 break; 3181 case KFD_IOC_DBG_TRAP_DISABLE: 3182 r = kfd_dbg_trap_disable(target); 3183 break; 3184 case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT: 3185 r = kfd_dbg_send_exception_to_runtime(target, 3186 args->send_runtime_event.gpu_id, 3187 args->send_runtime_event.queue_id, 3188 args->send_runtime_event.exception_mask); 3189 break; 3190 case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED: 3191 kfd_dbg_set_enabled_debug_exception_mask(target, 3192 args->set_exceptions_enabled.exception_mask); 3193 break; 3194 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE: 3195 r = kfd_dbg_trap_set_wave_launch_override(target, 3196 args->launch_override.override_mode, 3197 args->launch_override.enable_mask, 3198 args->launch_override.support_request_mask, 3199 &args->launch_override.enable_mask, 3200 &args->launch_override.support_request_mask); 3201 break; 3202 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE: 3203 r = kfd_dbg_trap_set_wave_launch_mode(target, 3204 args->launch_mode.launch_mode); 3205 break; 3206 case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES: 3207 r = suspend_queues(target, 3208 args->suspend_queues.num_queues, 3209 args->suspend_queues.grace_period, 3210 args->suspend_queues.exception_mask, 3211 (uint32_t *)args->suspend_queues.queue_array_ptr); 3212 3213 break; 3214 case KFD_IOC_DBG_TRAP_RESUME_QUEUES: 3215 r = resume_queues(target, args->resume_queues.num_queues, 3216 (uint32_t *)args->resume_queues.queue_array_ptr); 3217 break; 3218 case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH: 3219 r = kfd_dbg_trap_set_dev_address_watch(pdd, 3220 args->set_node_address_watch.address, 3221 args->set_node_address_watch.mask, 3222 &args->set_node_address_watch.id, 3223 args->set_node_address_watch.mode); 3224 break; 3225 case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH: 3226 r = kfd_dbg_trap_clear_dev_address_watch(pdd, 3227 args->clear_node_address_watch.id); 3228 break; 3229 case KFD_IOC_DBG_TRAP_SET_FLAGS: 3230 r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags); 3231 break; 3232 case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT: 3233 r = kfd_dbg_ev_query_debug_event(target, 3234 &args->query_debug_event.queue_id, 3235 &args->query_debug_event.gpu_id, 3236 args->query_debug_event.exception_mask, 3237 &args->query_debug_event.exception_mask); 3238 break; 3239 case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO: 3240 r = kfd_dbg_trap_query_exception_info(target, 3241 args->query_exception_info.source_id, 3242 args->query_exception_info.exception_code, 3243 args->query_exception_info.clear_exception, 3244 (void __user *)args->query_exception_info.info_ptr, 3245 &args->query_exception_info.info_size); 3246 break; 3247 case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT: 3248 r = pqm_get_queue_snapshot(&target->pqm, 3249 args->queue_snapshot.exception_mask, 3250 (void __user *)args->queue_snapshot.snapshot_buf_ptr, 3251 &args->queue_snapshot.num_queues, 3252 &args->queue_snapshot.entry_size); 3253 break; 3254 case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT: 3255 r = kfd_dbg_trap_device_snapshot(target, 3256 args->device_snapshot.exception_mask, 3257 (void __user *)args->device_snapshot.snapshot_buf_ptr, 3258 &args->device_snapshot.num_devices, 3259 &args->device_snapshot.entry_size); 3260 break; 3261 default: 3262 pr_err("Invalid option: %i\n", args->op); 3263 r = -EINVAL; 3264 } 3265 3266 unlock_out: 3267 mutex_unlock(&target->mutex); 3268 3269 out: 3270 if (thread) 3271 put_task_struct(thread); 3272 3273 if (mm) 3274 mmput(mm); 3275 3276 if (pid) 3277 put_pid(pid); 3278 3279 if (target) 3280 kfd_unref_process(target); 3281 3282 return r; 3283 } 3284 3285 /* userspace programs need to invoke this ioctl explicitly on a FD to 3286 * create a secondary kfd_process which replacing its primary kfd_process 3287 */ 3288 static int kfd_ioctl_create_process(struct file *filep, struct kfd_process *p, void *data) 3289 { 3290 struct kfd_process *process; 3291 int ret; 3292 3293 if (!filep->private_data || !p) 3294 return -EINVAL; 3295 3296 /* Each FD owns only one kfd_process */ 3297 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) 3298 return -EINVAL; 3299 3300 mutex_lock(&kfd_processes_mutex); 3301 if (p != filep->private_data) { 3302 mutex_unlock(&kfd_processes_mutex); 3303 return -EINVAL; 3304 } 3305 3306 process = create_process(current, false); 3307 if (IS_ERR(process)) { 3308 mutex_unlock(&kfd_processes_mutex); 3309 return PTR_ERR(process); 3310 } 3311 3312 filep->private_data = process; 3313 ret = kfd_debugfs_add_process(process); 3314 if (ret) 3315 pr_warn("Failed to create debugfs entry for the kfd_process, ret = %d\n", 3316 ret); 3317 3318 mutex_unlock(&kfd_processes_mutex); 3319 3320 ret = kfd_create_process_sysfs(process); 3321 if (ret) 3322 pr_warn("Failed to create sysfs entry for the kfd_process"); 3323 3324 /* Each open() increases kref of the primary kfd_process, 3325 * so we need to reduce it here when we create a new secondary process replacing it 3326 */ 3327 kfd_unref_process(p); 3328 3329 return 0; 3330 } 3331 3332 static inline uint32_t profile_lock_device(struct kfd_process *p, 3333 uint32_t gpu_id, uint32_t op) 3334 { 3335 struct kfd_process_device *pdd; 3336 struct kfd_dev *kfd; 3337 int status = -EINVAL; 3338 struct amdgpu_ptl *ptl; 3339 3340 if (!p) 3341 return -EINVAL; 3342 3343 mutex_lock(&p->mutex); 3344 pdd = kfd_process_device_data_by_id(p, gpu_id); 3345 mutex_unlock(&p->mutex); 3346 3347 if (!pdd || !pdd->dev || !pdd->dev->kfd) 3348 return -EINVAL; 3349 3350 kfd = pdd->dev->kfd; 3351 ptl = &pdd->dev->adev->psp.ptl; 3352 3353 mutex_lock(&kfd->profiler_lock); 3354 if (op == 1) { 3355 if (!kfd->profiler_process) { 3356 kfd->profiler_process = p; 3357 status = 0; 3358 mutex_unlock(&kfd->profiler_lock); 3359 if (ptl->hw_supported_state == AMDGPU_PTL_HW_SUPPORTED) { 3360 status = kfd_ptl_disable_request(pdd, p); 3361 if (status != 0) 3362 dev_err(kfd_device, 3363 "Failed to lock device %d for profiling, error %d\n", 3364 gpu_id, status); 3365 } 3366 return status; 3367 } else if (kfd->profiler_process == p) { 3368 status = -EALREADY; 3369 } else { 3370 status = -EBUSY; 3371 } 3372 } else if (op == 0 && kfd->profiler_process == p) { 3373 kfd->profiler_process = NULL; 3374 status = 0; 3375 mutex_unlock(&kfd->profiler_lock); 3376 3377 if (ptl->hw_supported_state == AMDGPU_PTL_HW_SUPPORTED) { 3378 status = kfd_ptl_disable_release(pdd, p); 3379 if (status) 3380 dev_err(kfd_device, 3381 "Failed to unlock device %d for profiling, error %d\n", 3382 gpu_id, status); 3383 } 3384 return status; 3385 } 3386 mutex_unlock(&kfd->profiler_lock); 3387 3388 return status; 3389 } 3390 3391 static inline int kfd_profiler_pmc(struct kfd_process *p, 3392 struct kfd_ioctl_pmc_settings *args) 3393 { 3394 struct kfd_process_device *pdd; 3395 struct device_queue_manager *dqm; 3396 int status; 3397 3398 /* Check if we have the correct permissions. */ 3399 if (!perfmon_capable()) 3400 return -EPERM; 3401 3402 /* Lock/Unlock the device based on the parameter given in OP */ 3403 status = profile_lock_device(p, args->gpu_id, args->lock); 3404 if (status != 0) 3405 return status; 3406 3407 /* Enable/disable perfcount if requested */ 3408 mutex_lock(&p->mutex); 3409 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 3410 dqm = pdd->dev->dqm; 3411 mutex_unlock(&p->mutex); 3412 3413 dqm->ops.set_perfcount(dqm, args->perfcount_enable); 3414 return status; 3415 } 3416 3417 static int kfd_ioctl_profiler(struct file *filep, struct kfd_process *p, void *data) 3418 { 3419 struct kfd_ioctl_profiler_args *args = data; 3420 3421 switch (args->op) { 3422 case KFD_IOC_PROFILER_VERSION: 3423 args->version = KFD_IOC_PROFILER_VERSION_NUM; 3424 return 0; 3425 case KFD_IOC_PROFILER_PMC: 3426 return kfd_profiler_pmc(p, &args->pmc); 3427 case KFD_IOC_PROFILER_PTL_CONTROL: 3428 return kfd_profiler_ptl_control(p, &args->ptl); 3429 } 3430 return -EINVAL; 3431 } 3432 3433 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 3434 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3435 .validate = NULL, .cmd_drv = 0, .name = #ioctl} 3436 3437 #define AMDKFD_IOCTL_DEF_V(ioctl, _func, _validate, _flags) \ 3438 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3439 .validate = _validate, .cmd_drv = 0, .name = #ioctl} 3440 3441 /** Ioctl table */ 3442 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 3443 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 3444 kfd_ioctl_get_version, 0), 3445 3446 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 3447 kfd_ioctl_create_queue, 0), 3448 3449 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 3450 kfd_ioctl_destroy_queue, 0), 3451 3452 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 3453 kfd_ioctl_set_memory_policy, 0), 3454 3455 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 3456 kfd_ioctl_get_clock_counters, 0), 3457 3458 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 3459 kfd_ioctl_get_process_apertures, 0), 3460 3461 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 3462 kfd_ioctl_update_queue, 0), 3463 3464 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 3465 kfd_ioctl_create_event, 0), 3466 3467 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 3468 kfd_ioctl_destroy_event, 0), 3469 3470 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 3471 kfd_ioctl_set_event, 0), 3472 3473 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 3474 kfd_ioctl_reset_event, 0), 3475 3476 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 3477 kfd_ioctl_wait_events, 0), 3478 3479 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 3480 kfd_ioctl_dbg_register, 0), 3481 3482 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 3483 kfd_ioctl_dbg_unregister, 0), 3484 3485 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 3486 kfd_ioctl_dbg_address_watch, 0), 3487 3488 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 3489 kfd_ioctl_dbg_wave_control, 0), 3490 3491 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 3492 kfd_ioctl_set_scratch_backing_va, 0), 3493 3494 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 3495 kfd_ioctl_get_tile_config, 0), 3496 3497 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 3498 kfd_ioctl_set_trap_handler, 0), 3499 3500 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 3501 kfd_ioctl_get_process_apertures_new, 0), 3502 3503 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 3504 kfd_ioctl_acquire_vm, 0), 3505 3506 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 3507 kfd_ioctl_alloc_memory_of_gpu, 0), 3508 3509 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 3510 kfd_ioctl_free_memory_of_gpu, 0), 3511 3512 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 3513 kfd_ioctl_map_memory_to_gpu, 0), 3514 3515 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 3516 kfd_ioctl_unmap_memory_from_gpu, 0), 3517 3518 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 3519 kfd_ioctl_set_cu_mask, 0), 3520 3521 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 3522 kfd_ioctl_get_queue_wave_state, 0), 3523 3524 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 3525 kfd_ioctl_get_dmabuf_info, 0), 3526 3527 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 3528 kfd_ioctl_import_dmabuf, 0), 3529 3530 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 3531 kfd_ioctl_alloc_queue_gws, 0), 3532 3533 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 3534 kfd_ioctl_smi_events, 0), 3535 3536 AMDKFD_IOCTL_DEF_V(AMDKFD_IOC_SVM, kfd_ioctl_svm, 3537 kfd_ioctl_svm_validate, 0), 3538 3539 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 3540 kfd_ioctl_set_xnack_mode, 0), 3541 3542 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 3543 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 3544 3545 AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY, 3546 kfd_ioctl_get_available_memory, 0), 3547 3548 AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF, 3549 kfd_ioctl_export_dmabuf, 0), 3550 3551 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE, 3552 kfd_ioctl_runtime_enable, 0), 3553 3554 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP, 3555 kfd_ioctl_set_debug_trap, 0), 3556 3557 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_PROCESS, 3558 kfd_ioctl_create_process, 0), 3559 3560 AMDKFD_IOCTL_DEF(AMDKFD_IOC_PROFILER, 3561 kfd_ioctl_profiler, 0), 3562 }; 3563 3564 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 3565 3566 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 3567 { 3568 struct kfd_process *process; 3569 amdkfd_ioctl_t *func; 3570 const struct amdkfd_ioctl_desc *ioctl = NULL; 3571 unsigned int nr = _IOC_NR(cmd); 3572 char stack_kdata[128]; 3573 char *kdata = NULL; 3574 unsigned int usize, asize; 3575 int retcode = -EINVAL; 3576 bool ptrace_attached = false; 3577 3578 if (nr >= AMDKFD_CORE_IOCTL_COUNT) { 3579 retcode = -ENOTTY; 3580 goto err_i1; 3581 } 3582 3583 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 3584 u32 amdkfd_size; 3585 3586 ioctl = &amdkfd_ioctls[nr]; 3587 3588 amdkfd_size = _IOC_SIZE(ioctl->cmd); 3589 usize = asize = _IOC_SIZE(cmd); 3590 if (amdkfd_size > asize) 3591 asize = amdkfd_size; 3592 3593 cmd = ioctl->cmd; 3594 } else { 3595 retcode = -ENOTTY; 3596 goto err_i1; 3597 } 3598 3599 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 3600 3601 /* Get the process struct from the filep. Only the process 3602 * that opened /dev/kfd can use the file descriptor. Child 3603 * processes need to create their own KFD device context. 3604 */ 3605 process = filep->private_data; 3606 3607 rcu_read_lock(); 3608 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 3609 ptrace_parent(process->lead_thread) == current) 3610 ptrace_attached = true; 3611 rcu_read_unlock(); 3612 3613 if (process->lead_thread != current->group_leader 3614 && !ptrace_attached) { 3615 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 3616 retcode = -EBADF; 3617 goto err_i1; 3618 } 3619 3620 /* Do not trust userspace, use our own definition */ 3621 func = ioctl->func; 3622 3623 if (unlikely(!func)) { 3624 dev_dbg(kfd_device, "no function\n"); 3625 retcode = -EINVAL; 3626 goto err_i1; 3627 } 3628 3629 /* 3630 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 3631 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 3632 * more priviledged access. 3633 */ 3634 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 3635 if (!capable(CAP_CHECKPOINT_RESTORE) && 3636 !capable(CAP_SYS_ADMIN)) { 3637 retcode = -EACCES; 3638 goto err_i1; 3639 } 3640 } 3641 3642 if (cmd & (IOC_IN | IOC_OUT)) { 3643 if (asize <= sizeof(stack_kdata)) { 3644 kdata = stack_kdata; 3645 } else { 3646 kdata = kmalloc(asize, GFP_KERNEL); 3647 if (!kdata) { 3648 retcode = -ENOMEM; 3649 goto err_i1; 3650 } 3651 } 3652 if (asize > usize) 3653 memset(kdata + usize, 0, asize - usize); 3654 } 3655 3656 if (cmd & IOC_IN) { 3657 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 3658 retcode = -EFAULT; 3659 goto err_i1; 3660 } 3661 } else if (cmd & IOC_OUT) { 3662 memset(kdata, 0, usize); 3663 } 3664 3665 if (ioctl->validate) { 3666 retcode = ioctl->validate(kdata, usize); 3667 if (retcode) 3668 goto err_i1; 3669 } 3670 3671 retcode = func(filep, process, kdata); 3672 3673 if (cmd & IOC_OUT) 3674 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 3675 retcode = -EFAULT; 3676 3677 err_i1: 3678 if (!ioctl) 3679 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 3680 task_pid_nr(current), cmd, nr); 3681 3682 if (kdata != stack_kdata) 3683 kfree(kdata); 3684 3685 if (retcode) 3686 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 3687 nr, arg, retcode); 3688 3689 return retcode; 3690 } 3691 3692 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process, 3693 struct vm_area_struct *vma) 3694 { 3695 phys_addr_t address; 3696 3697 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 3698 return -EINVAL; 3699 3700 if (PAGE_SIZE > 4096) 3701 return -EINVAL; 3702 3703 address = dev->adev->rmmio_remap.bus_addr; 3704 3705 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 3706 VM_DONTDUMP | VM_PFNMAP); 3707 3708 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 3709 3710 pr_debug("process pid %d mapping mmio page\n" 3711 " target user address == 0x%08llX\n" 3712 " physical address == 0x%08llX\n" 3713 " vm_flags == 0x%04lX\n" 3714 " size == 0x%04lX\n", 3715 process->lead_thread->pid, (unsigned long long) vma->vm_start, 3716 address, vma->vm_flags, PAGE_SIZE); 3717 3718 return io_remap_pfn_range(vma, 3719 vma->vm_start, 3720 address >> PAGE_SHIFT, 3721 PAGE_SIZE, 3722 vma->vm_page_prot); 3723 } 3724 3725 static int kfd_mmap(struct file *filep, struct vm_area_struct *vma) 3726 { 3727 struct kfd_process *process; 3728 struct kfd_process_device *pdd; 3729 struct kfd_node *dev = NULL; 3730 unsigned long mmap_offset; 3731 unsigned int gpu_id; 3732 3733 process = filep->private_data; 3734 if (!process) 3735 return -ESRCH; 3736 3737 if (process->lead_thread != current->group_leader) 3738 return -EBADF; 3739 3740 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 3741 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 3742 3743 pdd = kfd_process_device_data_by_id(process, gpu_id); 3744 if (pdd) 3745 dev = pdd->dev; 3746 3747 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 3748 case KFD_MMAP_TYPE_DOORBELL: 3749 if (!dev) 3750 return -ENODEV; 3751 return kfd_doorbell_mmap(dev, process, vma); 3752 3753 case KFD_MMAP_TYPE_EVENTS: 3754 pr_warn("KFD_MMAP_TYPE_EVENTS is no longer supported\n"); 3755 return -EINVAL; 3756 3757 case KFD_MMAP_TYPE_RESERVED_MEM: 3758 pr_warn("KFD_MMAP_TYPE_RESERVED_MEM is no longer supported\n"); 3759 return -EINVAL; 3760 case KFD_MMAP_TYPE_MMIO: 3761 if (!dev) 3762 return -ENODEV; 3763 return kfd_mmio_mmap(dev, process, vma); 3764 } 3765 3766 return -EFAULT; 3767 } 3768