1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright 2026 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef AMDGPU_SA_H_ 26 #define AMDGPU_SA_H_ 27 28 #include <drm/drm_suballoc.h> 29 30 struct amdgpu_device; 31 struct amdgpu_bo; 32 33 struct amdgpu_sa_manager { 34 struct drm_suballoc_manager base; 35 struct amdgpu_bo *bo; 36 uint64_t gpu_addr; 37 void *cpu_ptr; 38 gfp_t gfp_flags; 39 }; 40 41 static inline struct amdgpu_sa_manager * 42 to_amdgpu_sa_manager(struct drm_suballoc_manager *manager) 43 { 44 return container_of(manager, struct amdgpu_sa_manager, base); 45 } 46 47 static inline uint64_t amdgpu_sa_bo_gpu_addr(struct drm_suballoc *sa_bo) 48 { 49 return to_amdgpu_sa_manager(sa_bo->manager)->gpu_addr + 50 drm_suballoc_soffset(sa_bo); 51 } 52 53 static inline void *amdgpu_sa_bo_cpu_addr(struct drm_suballoc *sa_bo) 54 { 55 return to_amdgpu_sa_manager(sa_bo->manager)->cpu_ptr + 56 drm_suballoc_soffset(sa_bo); 57 } 58 59 int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev, 60 struct amdgpu_sa_manager *sa_manager, 61 unsigned size, gfp_t gfp_flags); 62 void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev, 63 struct amdgpu_sa_manager *sa_manager); 64 int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev, 65 struct amdgpu_sa_manager *sa_manager); 66 int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager, 67 struct drm_suballoc **sa_bo, 68 unsigned int size); 69 void amdgpu_sa_bo_free(struct drm_suballoc **sa_bo, 70 struct dma_fence *fence); 71 #if defined(CONFIG_DEBUG_FS) 72 void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager, 73 struct seq_file *m); 74 u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m); 75 #endif 76 void amdgpu_debugfs_sa_init(struct amdgpu_device *adev); 77 78 #endif 79