xref: /linux/arch/powerpc/kernel/cpu_specs_book3s_64.h (revision 570f7e331f5febb30f1384817463c7e42b65ca7d)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4  *
5  *  Modifications for ppc64:
6  *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7  */
8 
9 /* NOTE:
10  * Unlike ppc32, ppc64 will only call cpu_setup() for the boot CPU, it's
11  * the responsibility of the appropriate CPU save/restore functions to
12  * eventually copy these settings over. Those save/restore aren't yet
13  * part of the cputable though. That has to be fixed for both ppc32
14  * and ppc64
15  */
16 #define COMMON_USER_PPC64	(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
17 				 PPC_FEATURE_HAS_MMU | PPC_FEATURE_64)
18 #define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
19 #define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
20 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
21 #define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
22 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
23 #define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
24 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
25 				 PPC_FEATURE_TRUE_LE | \
26 				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
27 #define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
28 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
29 				 PPC_FEATURE_TRUE_LE | \
30 				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
31 #define COMMON_USER2_POWER7	(PPC_FEATURE2_DSCR)
32 #define COMMON_USER_POWER8	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
33 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
34 				 PPC_FEATURE_TRUE_LE | \
35 				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
36 #define COMMON_USER2_POWER8	(PPC_FEATURE2_ARCH_2_07 | \
37 				 PPC_FEATURE2_HTM_COMP | \
38 				 PPC_FEATURE2_HTM_NOSC_COMP | \
39 				 PPC_FEATURE2_DSCR | \
40 				 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
41 				 PPC_FEATURE2_VEC_CRYPTO)
42 #define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
43 				 PPC_FEATURE_TRUE_LE | \
44 				 PPC_FEATURE_HAS_ALTIVEC_COMP)
45 #define COMMON_USER_POWER9	COMMON_USER_POWER8
46 #define COMMON_USER2_POWER9	(COMMON_USER2_POWER8 | \
47 				 PPC_FEATURE2_ARCH_3_00 | \
48 				 PPC_FEATURE2_HAS_IEEE128 | \
49 				 PPC_FEATURE2_DARN | \
50 				 PPC_FEATURE2_SCV)
51 #define COMMON_USER_POWER10	COMMON_USER_POWER9
52 #define COMMON_USER2_POWER10	(PPC_FEATURE2_ARCH_3_1 | \
53 				 PPC_FEATURE2_MMA | \
54 				 PPC_FEATURE2_ARCH_3_00 | \
55 				 PPC_FEATURE2_HAS_IEEE128 | \
56 				 PPC_FEATURE2_DARN | \
57 				 PPC_FEATURE2_SCV | \
58 				 PPC_FEATURE2_ARCH_2_07 | \
59 				 PPC_FEATURE2_DSCR | \
60 				 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
61 				 PPC_FEATURE2_VEC_CRYPTO)
62 
63 #define COMMON_USER_POWER11	COMMON_USER_POWER10
64 #define COMMON_USER2_POWER11	COMMON_USER2_POWER10
65 
66 #define COMMON_USER_POWER12	COMMON_USER_POWER10
67 #define COMMON_USER2_POWER12	(COMMON_USER2_POWER10 | \
68 				 PPC_FEATURE2_ARCH_3_2)
69 
70 
71 static struct cpu_spec cpu_specs[] __initdata = {
72 	{	/* PPC970 */
73 		.pvr_mask		= 0xffff0000,
74 		.pvr_value		= 0x00390000,
75 		.cpu_name		= "PPC970",
76 		.cpu_features		= CPU_FTRS_PPC970,
77 		.cpu_user_features	= COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
78 		.mmu_features		= MMU_FTRS_PPC970,
79 		.icache_bsize		= 128,
80 		.dcache_bsize		= 128,
81 		.num_pmcs		= 8,
82 		.pmc_type		= PPC_PMC_IBM,
83 		.cpu_setup		= __setup_cpu_ppc970,
84 		.cpu_restore		= __restore_cpu_ppc970,
85 		.platform		= "ppc970",
86 	},
87 	{	/* PPC970FX */
88 		.pvr_mask		= 0xffff0000,
89 		.pvr_value		= 0x003c0000,
90 		.cpu_name		= "PPC970FX",
91 		.cpu_features		= CPU_FTRS_PPC970,
92 		.cpu_user_features	= COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
93 		.mmu_features		= MMU_FTRS_PPC970,
94 		.icache_bsize		= 128,
95 		.dcache_bsize		= 128,
96 		.num_pmcs		= 8,
97 		.pmc_type		= PPC_PMC_IBM,
98 		.cpu_setup		= __setup_cpu_ppc970,
99 		.cpu_restore		= __restore_cpu_ppc970,
100 		.platform		= "ppc970",
101 	},
102 	{	/* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
103 		.pvr_mask		= 0xffffffff,
104 		.pvr_value		= 0x00440100,
105 		.cpu_name		= "PPC970MP",
106 		.cpu_features		= CPU_FTRS_PPC970,
107 		.cpu_user_features	= COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
108 		.mmu_features		= MMU_FTRS_PPC970,
109 		.icache_bsize		= 128,
110 		.dcache_bsize		= 128,
111 		.num_pmcs		= 8,
112 		.pmc_type		= PPC_PMC_IBM,
113 		.cpu_setup		= __setup_cpu_ppc970,
114 		.cpu_restore		= __restore_cpu_ppc970,
115 		.platform		= "ppc970",
116 	},
117 	{	/* PPC970MP */
118 		.pvr_mask		= 0xffff0000,
119 		.pvr_value		= 0x00440000,
120 		.cpu_name		= "PPC970MP",
121 		.cpu_features		= CPU_FTRS_PPC970,
122 		.cpu_user_features	= COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
123 		.mmu_features		= MMU_FTRS_PPC970,
124 		.icache_bsize		= 128,
125 		.dcache_bsize		= 128,
126 		.num_pmcs		= 8,
127 		.pmc_type		= PPC_PMC_IBM,
128 		.cpu_setup		= __setup_cpu_ppc970MP,
129 		.cpu_restore		= __restore_cpu_ppc970,
130 		.platform		= "ppc970",
131 	},
132 	{	/* PPC970GX */
133 		.pvr_mask		= 0xffff0000,
134 		.pvr_value		= 0x00450000,
135 		.cpu_name		= "PPC970GX",
136 		.cpu_features		= CPU_FTRS_PPC970,
137 		.cpu_user_features	= COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
138 		.mmu_features		= MMU_FTRS_PPC970,
139 		.icache_bsize		= 128,
140 		.dcache_bsize		= 128,
141 		.num_pmcs		= 8,
142 		.pmc_type		= PPC_PMC_IBM,
143 		.cpu_setup		= __setup_cpu_ppc970,
144 		.platform		= "ppc970",
145 	},
146 	{	/* Power5 GR */
147 		.pvr_mask		= 0xffff0000,
148 		.pvr_value		= 0x003a0000,
149 		.cpu_name		= "POWER5 (gr)",
150 		.cpu_features		= CPU_FTRS_POWER5,
151 		.cpu_user_features	= COMMON_USER_POWER5,
152 		.mmu_features		= MMU_FTRS_POWER5,
153 		.icache_bsize		= 128,
154 		.dcache_bsize		= 128,
155 		.num_pmcs		= 6,
156 		.pmc_type		= PPC_PMC_IBM,
157 		.platform		= "power5",
158 	},
159 	{	/* Power5++ */
160 		.pvr_mask		= 0xffffff00,
161 		.pvr_value		= 0x003b0300,
162 		.cpu_name		= "POWER5+ (gs)",
163 		.cpu_features		= CPU_FTRS_POWER5,
164 		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
165 		.mmu_features		= MMU_FTRS_POWER5,
166 		.icache_bsize		= 128,
167 		.dcache_bsize		= 128,
168 		.num_pmcs		= 6,
169 		.platform		= "power5+",
170 	},
171 	{	/* Power5 GS */
172 		.pvr_mask		= 0xffff0000,
173 		.pvr_value		= 0x003b0000,
174 		.cpu_name		= "POWER5+ (gs)",
175 		.cpu_features		= CPU_FTRS_POWER5,
176 		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
177 		.mmu_features		= MMU_FTRS_POWER5,
178 		.icache_bsize		= 128,
179 		.dcache_bsize		= 128,
180 		.num_pmcs		= 6,
181 		.pmc_type		= PPC_PMC_IBM,
182 		.platform		= "power5+",
183 	},
184 	{	/* POWER6 in P5+ mode; 2.04-compliant processor */
185 		.pvr_mask		= 0xffffffff,
186 		.pvr_value		= 0x0f000001,
187 		.cpu_name		= "POWER5+",
188 		.cpu_features		= CPU_FTRS_POWER5,
189 		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
190 		.mmu_features		= MMU_FTRS_POWER5,
191 		.icache_bsize		= 128,
192 		.dcache_bsize		= 128,
193 		.platform		= "power5+",
194 	},
195 	{	/* Power6 */
196 		.pvr_mask		= 0xffff0000,
197 		.pvr_value		= 0x003e0000,
198 		.cpu_name		= "POWER6 (raw)",
199 		.cpu_features		= CPU_FTRS_POWER6,
200 		.cpu_user_features	= COMMON_USER_POWER6 | PPC_FEATURE_POWER6_EXT,
201 		.mmu_features		= MMU_FTRS_POWER6,
202 		.icache_bsize		= 128,
203 		.dcache_bsize		= 128,
204 		.num_pmcs		= 6,
205 		.pmc_type		= PPC_PMC_IBM,
206 		.platform		= "power6x",
207 	},
208 	{	/* 2.05-compliant processor, i.e. Power6 "architected" mode */
209 		.pvr_mask		= 0xffffffff,
210 		.pvr_value		= 0x0f000002,
211 		.cpu_name		= "POWER6 (architected)",
212 		.cpu_features		= CPU_FTRS_POWER6,
213 		.cpu_user_features	= COMMON_USER_POWER6,
214 		.mmu_features		= MMU_FTRS_POWER6,
215 		.icache_bsize		= 128,
216 		.dcache_bsize		= 128,
217 		.platform		= "power6",
218 	},
219 	{	/* 2.06-compliant processor, i.e. Power7 "architected" mode */
220 		.pvr_mask		= 0xffffffff,
221 		.pvr_value		= 0x0f000003,
222 		.cpu_name		= "POWER7 (architected)",
223 		.cpu_features		= CPU_FTRS_POWER7,
224 		.cpu_user_features	= COMMON_USER_POWER7,
225 		.cpu_user_features2	= COMMON_USER2_POWER7,
226 		.mmu_features		= MMU_FTRS_POWER7,
227 		.icache_bsize		= 128,
228 		.dcache_bsize		= 128,
229 		.cpu_setup		= __setup_cpu_power7,
230 		.cpu_restore		= __restore_cpu_power7,
231 		.machine_check_early	= __machine_check_early_realmode_p7,
232 		.platform		= "power7",
233 	},
234 	{	/* 2.07-compliant processor, i.e. Power8 "architected" mode */
235 		.pvr_mask		= 0xffffffff,
236 		.pvr_value		= 0x0f000004,
237 		.cpu_name		= "POWER8 (architected)",
238 		.cpu_features		= CPU_FTRS_POWER8,
239 		.cpu_user_features	= COMMON_USER_POWER8,
240 		.cpu_user_features2	= COMMON_USER2_POWER8,
241 		.mmu_features		= MMU_FTRS_POWER8,
242 		.icache_bsize		= 128,
243 		.dcache_bsize		= 128,
244 		.cpu_setup		= __setup_cpu_power8,
245 		.cpu_restore		= __restore_cpu_power8,
246 		.machine_check_early	= __machine_check_early_realmode_p8,
247 		.platform		= "power8",
248 	},
249 	{	/* 2.07-compliant processor, HeXin C2000 processor */
250 		.pvr_mask		= 0xffff0000,
251 		.pvr_value		= 0x00660000,
252 		.cpu_name		= "HX-C2000",
253 		.cpu_features		= CPU_FTRS_POWER8,
254 		.cpu_user_features	= COMMON_USER_POWER8,
255 		.cpu_user_features2	= COMMON_USER2_POWER8,
256 		.mmu_features		= MMU_FTRS_POWER8,
257 		.icache_bsize		= 128,
258 		.dcache_bsize		= 128,
259 		.cpu_setup		= __setup_cpu_power8,
260 		.cpu_restore		= __restore_cpu_power8,
261 		.machine_check_early	= __machine_check_early_realmode_p8,
262 		.platform		= "power8",
263 	},
264 	{	/* 3.00-compliant processor, i.e. Power9 "architected" mode */
265 		.pvr_mask		= 0xffffffff,
266 		.pvr_value		= 0x0f000005,
267 		.cpu_name		= "POWER9 (architected)",
268 		.cpu_features		= CPU_FTRS_POWER9,
269 		.cpu_user_features	= COMMON_USER_POWER9,
270 		.cpu_user_features2	= COMMON_USER2_POWER9,
271 		.mmu_features		= MMU_FTRS_POWER9,
272 		.icache_bsize		= 128,
273 		.dcache_bsize		= 128,
274 		.cpu_setup		= __setup_cpu_power9,
275 		.cpu_restore		= __restore_cpu_power9,
276 		.platform		= "power9",
277 	},
278 	{	/* 3.1-compliant processor, i.e. Power10 "architected" mode */
279 		.pvr_mask		= 0xffffffff,
280 		.pvr_value		= 0x0f000006,
281 		.cpu_name		= "POWER10 (architected)",
282 		.cpu_features		= CPU_FTRS_POWER10,
283 		.cpu_user_features	= COMMON_USER_POWER10,
284 		.cpu_user_features2	= COMMON_USER2_POWER10,
285 		.mmu_features		= MMU_FTRS_POWER10,
286 		.icache_bsize		= 128,
287 		.dcache_bsize		= 128,
288 		.cpu_setup		= __setup_cpu_power10,
289 		.cpu_restore		= __restore_cpu_power10,
290 		.platform		= "power10",
291 	},
292 	{	/* 3.1-compliant processor, i.e. Power11 "architected" mode */
293 		.pvr_mask		= 0xffffffff,
294 		.pvr_value		= 0x0f000007,
295 		.cpu_name		= "Power11 (architected)",
296 		.cpu_features		= CPU_FTRS_POWER11,
297 		.cpu_user_features	= COMMON_USER_POWER11,
298 		.cpu_user_features2	= COMMON_USER2_POWER11,
299 		.mmu_features		= MMU_FTRS_POWER11,
300 		.icache_bsize		= 128,
301 		.dcache_bsize		= 128,
302 		.cpu_setup		= __setup_cpu_power10,
303 		.cpu_restore		= __restore_cpu_power10,
304 		.platform		= "power11",
305 	},
306 	{	/* 3.2-compliant processor, i.e. Power12 "architected" mode */
307 		.pvr_mask		= 0xffffffff,
308 		.pvr_value		= 0x0f000008,
309 		.cpu_name		= "Power12 (architected)",
310 		.cpu_features		= CPU_FTRS_POWER12,
311 		.cpu_user_features	= COMMON_USER_POWER12,
312 		.cpu_user_features2	= COMMON_USER2_POWER12,
313 		.mmu_features		= MMU_FTRS_POWER12,
314 		.icache_bsize		= 128,
315 		.dcache_bsize		= 128,
316 		.cpu_setup		= __setup_cpu_power12,
317 		.cpu_restore		= __restore_cpu_power12,
318 		.platform		= "power12",
319 	},
320 	{	/* Power7 */
321 		.pvr_mask		= 0xffff0000,
322 		.pvr_value		= 0x003f0000,
323 		.cpu_name		= "POWER7 (raw)",
324 		.cpu_features		= CPU_FTRS_POWER7,
325 		.cpu_user_features	= COMMON_USER_POWER7,
326 		.cpu_user_features2	= COMMON_USER2_POWER7,
327 		.mmu_features		= MMU_FTRS_POWER7,
328 		.icache_bsize		= 128,
329 		.dcache_bsize		= 128,
330 		.num_pmcs		= 6,
331 		.pmc_type		= PPC_PMC_IBM,
332 		.cpu_setup		= __setup_cpu_power7,
333 		.cpu_restore		= __restore_cpu_power7,
334 		.machine_check_early	= __machine_check_early_realmode_p7,
335 		.platform		= "power7",
336 	},
337 	{	/* Power7+ */
338 		.pvr_mask		= 0xffff0000,
339 		.pvr_value		= 0x004A0000,
340 		.cpu_name		= "POWER7+ (raw)",
341 		.cpu_features		= CPU_FTRS_POWER7,
342 		.cpu_user_features	= COMMON_USER_POWER7,
343 		.cpu_user_features2	= COMMON_USER2_POWER7,
344 		.mmu_features		= MMU_FTRS_POWER7,
345 		.icache_bsize		= 128,
346 		.dcache_bsize		= 128,
347 		.num_pmcs		= 6,
348 		.pmc_type		= PPC_PMC_IBM,
349 		.cpu_setup		= __setup_cpu_power7,
350 		.cpu_restore		= __restore_cpu_power7,
351 		.machine_check_early	= __machine_check_early_realmode_p7,
352 		.platform		= "power7+",
353 	},
354 	{	/* Power8E */
355 		.pvr_mask		= 0xffff0000,
356 		.pvr_value		= 0x004b0000,
357 		.cpu_name		= "POWER8E (raw)",
358 		.cpu_features		= CPU_FTRS_POWER8E,
359 		.cpu_user_features	= COMMON_USER_POWER8,
360 		.cpu_user_features2	= COMMON_USER2_POWER8,
361 		.mmu_features		= MMU_FTRS_POWER8,
362 		.icache_bsize		= 128,
363 		.dcache_bsize		= 128,
364 		.num_pmcs		= 6,
365 		.pmc_type		= PPC_PMC_IBM,
366 		.cpu_setup		= __setup_cpu_power8,
367 		.cpu_restore		= __restore_cpu_power8,
368 		.machine_check_early	= __machine_check_early_realmode_p8,
369 		.platform		= "power8",
370 	},
371 	{	/* Power8NVL */
372 		.pvr_mask		= 0xffff0000,
373 		.pvr_value		= 0x004c0000,
374 		.cpu_name		= "POWER8NVL (raw)",
375 		.cpu_features		= CPU_FTRS_POWER8,
376 		.cpu_user_features	= COMMON_USER_POWER8,
377 		.cpu_user_features2	= COMMON_USER2_POWER8,
378 		.mmu_features		= MMU_FTRS_POWER8,
379 		.icache_bsize		= 128,
380 		.dcache_bsize		= 128,
381 		.num_pmcs		= 6,
382 		.pmc_type		= PPC_PMC_IBM,
383 		.cpu_setup		= __setup_cpu_power8,
384 		.cpu_restore		= __restore_cpu_power8,
385 		.machine_check_early	= __machine_check_early_realmode_p8,
386 		.platform		= "power8",
387 	},
388 	{	/* Power8 */
389 		.pvr_mask		= 0xffff0000,
390 		.pvr_value		= 0x004d0000,
391 		.cpu_name		= "POWER8 (raw)",
392 		.cpu_features		= CPU_FTRS_POWER8,
393 		.cpu_user_features	= COMMON_USER_POWER8,
394 		.cpu_user_features2	= COMMON_USER2_POWER8,
395 		.mmu_features		= MMU_FTRS_POWER8,
396 		.icache_bsize		= 128,
397 		.dcache_bsize		= 128,
398 		.num_pmcs		= 6,
399 		.pmc_type		= PPC_PMC_IBM,
400 		.cpu_setup		= __setup_cpu_power8,
401 		.cpu_restore		= __restore_cpu_power8,
402 		.machine_check_early	= __machine_check_early_realmode_p8,
403 		.platform		= "power8",
404 	},
405 	{	/* Power9 DD2.0 */
406 		.pvr_mask		= 0xffffefff,
407 		.pvr_value		= 0x004e0200,
408 		.cpu_name		= "POWER9 (raw)",
409 		.cpu_features		= CPU_FTRS_POWER9_DD2_0,
410 		.cpu_user_features	= COMMON_USER_POWER9,
411 		.cpu_user_features2	= COMMON_USER2_POWER9,
412 		.mmu_features		= MMU_FTRS_POWER9,
413 		.icache_bsize		= 128,
414 		.dcache_bsize		= 128,
415 		.num_pmcs		= 6,
416 		.pmc_type		= PPC_PMC_IBM,
417 		.cpu_setup		= __setup_cpu_power9,
418 		.cpu_restore		= __restore_cpu_power9,
419 		.machine_check_early	= __machine_check_early_realmode_p9,
420 		.platform		= "power9",
421 	},
422 	{	/* Power9 DD 2.1 */
423 		.pvr_mask		= 0xffffefff,
424 		.pvr_value		= 0x004e0201,
425 		.cpu_name		= "POWER9 (raw)",
426 		.cpu_features		= CPU_FTRS_POWER9_DD2_1,
427 		.cpu_user_features	= COMMON_USER_POWER9,
428 		.cpu_user_features2	= COMMON_USER2_POWER9,
429 		.mmu_features		= MMU_FTRS_POWER9,
430 		.icache_bsize		= 128,
431 		.dcache_bsize		= 128,
432 		.num_pmcs		= 6,
433 		.pmc_type		= PPC_PMC_IBM,
434 		.cpu_setup		= __setup_cpu_power9,
435 		.cpu_restore		= __restore_cpu_power9,
436 		.machine_check_early	= __machine_check_early_realmode_p9,
437 		.platform		= "power9",
438 	},
439 	{	/* Power9 DD2.2 */
440 		.pvr_mask		= 0xffffefff,
441 		.pvr_value		= 0x004e0202,
442 		.cpu_name		= "POWER9 (raw)",
443 		.cpu_features		= CPU_FTRS_POWER9_DD2_2,
444 		.cpu_user_features	= COMMON_USER_POWER9,
445 		.cpu_user_features2	= COMMON_USER2_POWER9,
446 		.mmu_features		= MMU_FTRS_POWER9,
447 		.icache_bsize		= 128,
448 		.dcache_bsize		= 128,
449 		.num_pmcs		= 6,
450 		.pmc_type		= PPC_PMC_IBM,
451 		.cpu_setup		= __setup_cpu_power9,
452 		.cpu_restore		= __restore_cpu_power9,
453 		.machine_check_early	= __machine_check_early_realmode_p9,
454 		.platform		= "power9",
455 	},
456 	{	/* Power9 DD2.3 or later */
457 		.pvr_mask		= 0xffff0000,
458 		.pvr_value		= 0x004e0000,
459 		.cpu_name		= "POWER9 (raw)",
460 		.cpu_features		= CPU_FTRS_POWER9_DD2_3,
461 		.cpu_user_features	= COMMON_USER_POWER9,
462 		.cpu_user_features2	= COMMON_USER2_POWER9,
463 		.mmu_features		= MMU_FTRS_POWER9,
464 		.icache_bsize		= 128,
465 		.dcache_bsize		= 128,
466 		.num_pmcs		= 6,
467 		.pmc_type		= PPC_PMC_IBM,
468 		.cpu_setup		= __setup_cpu_power9,
469 		.cpu_restore		= __restore_cpu_power9,
470 		.machine_check_early	= __machine_check_early_realmode_p9,
471 		.platform		= "power9",
472 	},
473 	{	/* Power10 */
474 		.pvr_mask		= 0xffff0000,
475 		.pvr_value		= 0x00800000,
476 		.cpu_name		= "POWER10 (raw)",
477 		.cpu_features		= CPU_FTRS_POWER10,
478 		.cpu_user_features	= COMMON_USER_POWER10,
479 		.cpu_user_features2	= COMMON_USER2_POWER10,
480 		.mmu_features		= MMU_FTRS_POWER10,
481 		.icache_bsize		= 128,
482 		.dcache_bsize		= 128,
483 		.num_pmcs		= 6,
484 		.pmc_type		= PPC_PMC_IBM,
485 		.cpu_setup		= __setup_cpu_power10,
486 		.cpu_restore		= __restore_cpu_power10,
487 		.machine_check_early	= __machine_check_early_realmode_p10,
488 		.platform		= "power10",
489 	},
490 	{	/* Power11 */
491 		.pvr_mask		= 0xffff0000,
492 		.pvr_value		= 0x00820000,
493 		.cpu_name		= "Power11 (raw)",
494 		.cpu_features		= CPU_FTRS_POWER11,
495 		.cpu_user_features	= COMMON_USER_POWER11,
496 		.cpu_user_features2	= COMMON_USER2_POWER11,
497 		.mmu_features		= MMU_FTRS_POWER11,
498 		.icache_bsize		= 128,
499 		.dcache_bsize		= 128,
500 		.num_pmcs		= 6,
501 		.pmc_type		= PPC_PMC_IBM,
502 		.cpu_setup		= __setup_cpu_power10,
503 		.cpu_restore		= __restore_cpu_power10,
504 		.machine_check_early	= __machine_check_early_realmode_p10,
505 		.platform		= "power11",
506 	},
507 	{	/* Power12 */
508 		.pvr_mask		= 0xffff0000,
509 		.pvr_value		= 0x00830000,
510 		.cpu_name		= "Power12 (raw)",
511 		.cpu_features		= CPU_FTRS_POWER12,
512 		.cpu_user_features	= COMMON_USER_POWER12,
513 		.cpu_user_features2	= COMMON_USER2_POWER12,
514 		.mmu_features		= MMU_FTRS_POWER12,
515 		.icache_bsize		= 128,
516 		.dcache_bsize		= 128,
517 		.num_pmcs		= 6,
518 		.pmc_type		= PPC_PMC_IBM,
519 		.cpu_setup		= __setup_cpu_power12,
520 		.cpu_restore		= __restore_cpu_power12,
521 		.machine_check_early	= __machine_check_early_realmode_p10,
522 		.platform		= "power12",
523 	},
524 	{	/* Cell Broadband Engine */
525 		.pvr_mask		= 0xffff0000,
526 		.pvr_value		= 0x00700000,
527 		.cpu_name		= "Cell Broadband Engine",
528 		.cpu_features		= CPU_FTRS_CELL,
529 		.cpu_user_features	= COMMON_USER_PPC64 | PPC_FEATURE_CELL |
530 					  PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_SMT,
531 		.mmu_features		= MMU_FTRS_CELL,
532 		.icache_bsize		= 128,
533 		.dcache_bsize		= 128,
534 		.num_pmcs		= 4,
535 		.pmc_type		= PPC_PMC_IBM,
536 		.platform		= "ppc-cell-be",
537 	},
538 	{	/* PA Semi PA6T */
539 		.pvr_mask		= 0x7fff0000,
540 		.pvr_value		= 0x00900000,
541 		.cpu_name		= "PA6T",
542 		.cpu_features		= CPU_FTRS_PA6T,
543 		.cpu_user_features	= COMMON_USER_PA6T,
544 		.mmu_features		= MMU_FTRS_PA6T,
545 		.icache_bsize		= 64,
546 		.dcache_bsize		= 64,
547 		.num_pmcs		= 6,
548 		.pmc_type		= PPC_PMC_PA6T,
549 		.cpu_setup		= __setup_cpu_pa6t,
550 		.cpu_restore		= __restore_cpu_pa6t,
551 		.platform		= "pa6t",
552 	},
553 	{	/* default match */
554 		.pvr_mask		= 0x00000000,
555 		.pvr_value		= 0x00000000,
556 		.cpu_name		= "POWER5 (compatible)",
557 		.cpu_features		= CPU_FTRS_COMPATIBLE,
558 		.cpu_user_features	= COMMON_USER_PPC64,
559 		.mmu_features		= MMU_FTRS_POWER,
560 		.icache_bsize		= 128,
561 		.dcache_bsize		= 128,
562 		.num_pmcs		= 6,
563 		.pmc_type		= PPC_PMC_IBM,
564 		.platform		= "power5",
565 	}
566 };
567