1// SPDX-License-Identifier: GPL-2.0 2 3/dts-v1/; 4 5#include "de0-nano-common.dtsi" 6 7/ { 8 model = "Terasic DE0 Nano"; 9 compatible = "opencores,or1ksim"; 10 #address-cells = <1>; 11 #size-cells = <1>; 12 interrupt-parent = <&pic>; 13 14 aliases { 15 uart0 = &serial0; 16 }; 17 18 chosen { 19 stdout-path = "uart0:115200"; 20 }; 21 22 cpus { 23 #address-cells = <1>; 24 #size-cells = <0>; 25 26 cpu@0 { 27 compatible = "opencores,or1200-rtlsvn481"; 28 reg = <0>; 29 clock-frequency = <50000000>; 30 }; 31 }; 32 33 /* 34 * OR1K PIC is built into CPU and accessed via special purpose 35 * registers. It is not addressable and, hence, has no 'reg' 36 * property. 37 */ 38 pic: pic { 39 compatible = "opencores,or1k-pic"; 40 #interrupt-cells = <1>; 41 interrupt-controller; 42 }; 43 44 serial0: serial@90000000 { 45 compatible = "opencores,uart16550-rtlsvn105", "ns16550a"; 46 reg = <0x90000000 0x100>; 47 interrupts = <2>; 48 clock-frequency = <50000000>; 49 }; 50}; 51 52&gpio1 { 53 status = "okay"; 54}; 55