1 // SPDX-License-Identifier: MIT 2 /* Copyright © 2025 Intel Corporation */ 3 4 #include <drm/drm_cache.h> 5 #include <drm/drm_panic.h> 6 #include <drm/intel/display_parent_interface.h> 7 8 #include "xe_bo.h" 9 #include "xe_panic.h" 10 #include "xe_res_cursor.h" 11 12 struct intel_panic { 13 struct xe_res_cursor res; 14 struct iosys_map vmap; 15 16 int page; 17 18 struct xe_bo *bo; 19 unsigned int (*tiling)(unsigned int x, unsigned int y, unsigned int width); 20 }; 21 22 static void xe_panic_kunmap(struct intel_panic *panic) 23 { 24 if (!panic->vmap.is_iomem && iosys_map_is_set(&panic->vmap)) { 25 drm_clflush_virt_range(panic->vmap.vaddr, PAGE_SIZE); 26 kunmap_local(panic->vmap.vaddr); 27 } 28 iosys_map_clear(&panic->vmap); 29 panic->page = -1; 30 } 31 32 /* 33 * The scanout buffer pages are not mapped, so for each pixel, 34 * use kmap_local_page_try_from_panic() to map the page, and write the pixel. 35 * Try to keep the map from the previous pixel, to avoid too much map/unmap. 36 */ 37 static void xe_panic_page_set_pixel(struct drm_scanout_buffer *sb, unsigned int x, 38 unsigned int y, u32 color) 39 { 40 struct intel_panic *panic = sb->private; 41 struct xe_bo *bo = panic->bo; 42 unsigned int new_page; 43 unsigned int offset; 44 45 if (panic->tiling) 46 offset = panic->tiling(sb->width, x, y); 47 else 48 offset = y * sb->pitch[0] + x * sb->format->cpp[0]; 49 50 new_page = offset >> PAGE_SHIFT; 51 offset = offset % PAGE_SIZE; 52 if (new_page != panic->page) { 53 if (xe_bo_is_vram(bo)) { 54 /* Display is always mapped on root tile */ 55 struct xe_vram_region *vram = xe_bo_device(bo)->mem.vram; 56 57 if (panic->page < 0 || new_page < panic->page) { 58 xe_res_first(bo->ttm.resource, new_page * PAGE_SIZE, 59 bo->ttm.base.size - new_page * PAGE_SIZE, &panic->res); 60 } else { 61 xe_res_next(&panic->res, PAGE_SIZE * (new_page - panic->page)); 62 } 63 iosys_map_set_vaddr_iomem(&panic->vmap, 64 vram->mapping + panic->res.start); 65 } else { 66 xe_panic_kunmap(panic); 67 iosys_map_set_vaddr(&panic->vmap, 68 ttm_bo_kmap_try_from_panic(&bo->ttm, 69 new_page)); 70 } 71 panic->page = new_page; 72 } 73 74 if (iosys_map_is_set(&panic->vmap)) 75 iosys_map_wr(&panic->vmap, offset, u32, color); 76 } 77 78 static struct intel_panic *xe_panic_alloc(void) 79 { 80 struct intel_panic *panic; 81 82 panic = kzalloc_obj(*panic); 83 84 return panic; 85 } 86 87 static int xe_panic_setup(struct intel_panic *panic, struct drm_scanout_buffer *sb, 88 struct drm_gem_object *obj, 89 unsigned int (*tiling)(unsigned int x, unsigned int y, unsigned int width)) 90 { 91 struct xe_bo *bo = gem_to_xe_bo(obj); 92 93 if (xe_bo_is_vram(bo) && !xe_bo_is_visible_vram(bo)) 94 return -ENODEV; 95 96 panic->page = -1; 97 panic->bo = bo; 98 panic->tiling = tiling; 99 100 sb->private = panic; 101 sb->set_pixel = xe_panic_page_set_pixel; 102 103 return 0; 104 } 105 106 const struct intel_display_panic_interface xe_display_panic_interface = { 107 .alloc = xe_panic_alloc, 108 .setup = xe_panic_setup, 109 .finish = xe_panic_kunmap, 110 }; 111