xref: /linux/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml (revision ff124bbbca1d3a07fa1392ffdbbdeece71f68ece) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on MSM8937, MSM8940, MSM8953 and SDM439
8
9maintainers:
10  - Adam Skladowski <a_skl39@protonmail.com>
11  - Sireesh Kodali <sireeshkodali@protonmail.com>
12  - Barnabas Czeman <barnabas.czeman@mainlining.org>
13
14description: |
15  Qualcomm global clock control module provides the clocks, resets and power
16  domains on MSM8937, MSM8940, MSM8953 or SDM439.
17
18  See also::
19    include/dt-bindings/clock/qcom,gcc-msm8917.h
20    include/dt-bindings/clock/qcom,gcc-msm8953.h
21
22properties:
23  compatible:
24    enum:
25      - qcom,gcc-msm8937
26      - qcom,gcc-msm8940
27      - qcom,gcc-msm8953
28      - qcom,gcc-sdm439
29
30  clocks:
31    items:
32      - description: Board XO source
33      - description: Sleep clock source
34      - description: Byte clock from DSI PHY0
35      - description: Pixel clock from DSI PHY0
36      - description: Byte clock from DSI PHY1
37      - description: Pixel clock from DSI PHY1
38
39  clock-names:
40    items:
41      - const: xo
42      - const: sleep
43      - const: dsi0pll
44      - const: dsi0pllbyte
45      - const: dsi1pll
46      - const: dsi1pllbyte
47
48required:
49  - compatible
50  - clocks
51  - clock-names
52  - '#power-domain-cells'
53
54allOf:
55  - $ref: qcom,gcc.yaml#
56
57unevaluatedProperties: false
58
59examples:
60  - |
61    #include <dt-bindings/clock/qcom,rpmcc.h>
62
63    clock-controller@1800000 {
64        compatible = "qcom,gcc-msm8953";
65        reg = <0x01800000 0x80000>;
66        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
67                 <&sleep_clk>,
68                 <&dsi0_phy 1>,
69                 <&dsi0_phy 0>,
70                 <&dsi1_phy 1>,
71                 <&dsi1_phy 0>;
72        clock-names = "xo",
73                      "sleep",
74                      "dsi0pll",
75                      "dsi0pllbyte",
76                      "dsi1pll",
77                      "dsi1pllbyte";
78        #clock-cells = <1>;
79        #reset-cells = <1>;
80        #power-domain-cells = <1>;
81    };
82