1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com> 4 * Copyright (C) 2012 Regents of the University of California 5 */ 6 7 #ifndef _ASM_RISCV_TLBFLUSH_H 8 #define _ASM_RISCV_TLBFLUSH_H 9 10 #include <linux/mm_types.h> 11 #include <asm/smp.h> 12 #include <asm/errata_list.h> 13 14 #define FLUSH_TLB_MAX_SIZE ((unsigned long)-1) 15 #define FLUSH_TLB_NO_ASID ((unsigned long)-1) 16 17 #ifdef CONFIG_MMU 18 static inline unsigned long get_mm_asid(struct mm_struct *mm) 19 { 20 return mm ? cntx2asid(atomic_long_read(&mm->context.id)) : FLUSH_TLB_NO_ASID; 21 } 22 23 static inline void local_sfence_inval_ir(void) 24 { 25 asm volatile(SFENCE_INVAL_IR() ::: "memory"); 26 } 27 28 static inline void local_sfence_w_inval(void) 29 { 30 asm volatile(SFENCE_W_INVAL() ::: "memory"); 31 } 32 33 static inline void local_sinval_vma(unsigned long vma, unsigned long asid) 34 { 35 if (asid != FLUSH_TLB_NO_ASID) 36 asm volatile(SINVAL_VMA(%0, %1) : : "r" (vma), "r" (asid) : "memory"); 37 else 38 asm volatile(SINVAL_VMA(%0, zero) : : "r" (vma) : "memory"); 39 } 40 41 static inline void local_flush_tlb_all(void) 42 { 43 __asm__ __volatile__ ("sfence.vma" : : : "memory"); 44 } 45 46 static inline void local_flush_tlb_all_asid(unsigned long asid) 47 { 48 if (asid != FLUSH_TLB_NO_ASID) 49 ALT_SFENCE_VMA_ASID(asid); 50 else 51 local_flush_tlb_all(); 52 } 53 54 /* Flush one page from local TLB */ 55 static inline void local_flush_tlb_page(unsigned long addr) 56 { 57 ALT_SFENCE_VMA_ADDR(addr); 58 } 59 60 static inline void local_flush_tlb_page_asid(unsigned long addr, 61 unsigned long asid) 62 { 63 if (asid != FLUSH_TLB_NO_ASID) 64 ALT_SFENCE_VMA_ADDR_ASID(addr, asid); 65 else 66 local_flush_tlb_page(addr); 67 } 68 69 void flush_tlb_all(void); 70 void flush_tlb_mm(struct mm_struct *mm); 71 void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, 72 unsigned long end, unsigned int page_size); 73 void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr); 74 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 75 unsigned long end); 76 void flush_tlb_kernel_range(unsigned long start, unsigned long end); 77 void local_flush_tlb_kernel_range(unsigned long start, unsigned long end); 78 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 79 #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 80 void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, 81 unsigned long end); 82 void flush_pud_tlb_range(struct vm_area_struct *vma, unsigned long start, 83 unsigned long end); 84 #endif 85 86 bool arch_tlbbatch_should_defer(struct mm_struct *mm); 87 void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch, 88 struct mm_struct *mm, unsigned long start, unsigned long end); 89 void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); 90 91 extern unsigned long tlb_flush_all_threshold; 92 #else /* CONFIG_MMU */ 93 #define local_flush_tlb_all() do { } while (0) 94 #endif /* CONFIG_MMU */ 95 96 #endif /* _ASM_RISCV_TLBFLUSH_H */ 97