xref: /linux/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml (revision ff124bbbca1d3a07fa1392ffdbbdeece71f68ece) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SoC display controller (VOP)
8
9description:
10  VOP (Video Output Processor) is the display controller for the Rockchip
11  series of SoCs which transfers the image data from a video memory
12  buffer to an external LCD interface.
13
14maintainers:
15  - Sandy Huang <hjc@rock-chips.com>
16  - Heiko Stuebner <heiko@sntech.de>
17
18properties:
19  compatible:
20    enum:
21      - rockchip,px30-vop-big
22      - rockchip,px30-vop-lit
23      - rockchip,rk3036-vop
24      - rockchip,rk3066-vop
25      - rockchip,rk3126-vop
26      - rockchip,rk3188-vop
27      - rockchip,rk3228-vop
28      - rockchip,rk3288-vop
29      - rockchip,rk3328-vop
30      - rockchip,rk3366-vop
31      - rockchip,rk3368-vop
32      - rockchip,rk3399-vop-big
33      - rockchip,rk3399-vop-lit
34      - rockchip,rk3506-vop
35      - rockchip,rv1126-vop
36
37  reg:
38    minItems: 1
39    items:
40      - description:
41          Must contain one entry corresponding to the base address and length
42          of the register space.
43      - description:
44          Can optionally contain a second entry corresponding to
45          the CRTC gamma LUT address.
46
47  interrupts:
48    maxItems: 1
49    description:
50      The VOP interrupt is shared by several interrupt sources, such as
51      frame start (VSYNC), line flag and other status interrupts.
52
53  clocks:
54    items:
55      - description: Clock for ddr buffer transfer.
56      - description: Pixel clock.
57      - description: Clock for the ahb bus to R/W the phy regs.
58
59  clock-names:
60    items:
61      - const: aclk_vop
62      - const: dclk_vop
63      - const: hclk_vop
64
65  resets:
66    maxItems: 3
67
68  reset-names:
69    items:
70      - const: axi
71      - const: ahb
72      - const: dclk
73
74  port:
75    $ref: /schemas/graph.yaml#/properties/port
76
77  iommus:
78    maxItems: 1
79
80  power-domains:
81    maxItems: 1
82
83required:
84  - compatible
85  - reg
86  - interrupts
87  - clocks
88  - clock-names
89  - resets
90  - reset-names
91  - port
92
93additionalProperties: false
94
95examples:
96  - |
97    #include <dt-bindings/clock/rk3288-cru.h>
98    #include <dt-bindings/interrupt-controller/arm-gic.h>
99    #include <dt-bindings/power/rk3288-power.h>
100    vopb: vopb@ff930000 {
101      compatible = "rockchip,rk3288-vop";
102      reg = <0xff930000 0x19c>,
103            <0xff931000 0x1000>;
104      interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
105      clocks = <&cru ACLK_VOP0>,
106               <&cru DCLK_VOP0>,
107               <&cru HCLK_VOP0>;
108      clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
109      power-domains = <&power RK3288_PD_VIO>;
110      resets = <&cru SRST_LCDC1_AXI>,
111               <&cru SRST_LCDC1_AHB>,
112               <&cru SRST_LCDC1_DCLK>;
113      reset-names = "axi", "ahb", "dclk";
114      iommus = <&vopb_mmu>;
115      vopb_out: port {
116        #address-cells = <1>;
117        #size-cells = <0>;
118        vopb_out_edp: endpoint@0 {
119          reg = <0>;
120          remote-endpoint = <&edp_in_vopb>;
121        };
122        vopb_out_hdmi: endpoint@1 {
123          reg = <1>;
124          remote-endpoint = <&hdmi_in_vopb>;
125        };
126      };
127    };
128