1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2024 Intel Corporation */ 3 4 #ifndef _INTEL_THC_DEV_H_ 5 #define _INTEL_THC_DEV_H_ 6 7 #include <linux/cdev.h> 8 #include <linux/mutex.h> 9 #include <linux/workqueue.h> 10 11 #include "intel-thc-dma.h" 12 #include "intel-thc-wot.h" 13 14 #define THC_REGMAP_COMMON_OFFSET 0x10 15 #define THC_REGMAP_MMIO_OFFSET 0x1000 16 17 /* 18 * THC Port type 19 * @THC_PORT_TYPE_SPI: This port is used for HIDSPI 20 * @THC_PORT_TYPE_I2C: This port is used for HIDI2C 21 */ 22 enum thc_port_type { 23 THC_PORT_TYPE_SPI = 0, 24 THC_PORT_TYPE_I2C = 1, 25 }; 26 27 /** 28 * THC interrupt flag 29 * @THC_NONDMA_INT: THC non-DMA interrupt 30 * @THC_RXDMA1_INT: THC RxDMA1 interrupt 31 * @THC_RXDMA2_INT: THC RxDMA2 interrupt 32 * @THC_SWDMA_INT: THC SWDMA interrupt 33 * @THC_TXDMA_INT: THC TXDMA interrupt 34 * @THC_PIO_DONE_INT: THC PIO complete interrupt 35 * @THC_I2CSUBIP_INT: THC I2C subsystem interrupt 36 * @THC_TXN_ERR_INT: THC transfer error interrupt 37 * @THC_FATAL_ERR_INT: THC fatal error interrupt 38 */ 39 enum thc_int_type { 40 THC_NONDMA_INT = 0, 41 THC_RXDMA1_INT = 1, 42 THC_RXDMA2_INT = 2, 43 THC_SWDMA_INT = 3, 44 THC_TXDMA_INT = 4, 45 THC_PIO_DONE_INT = 5, 46 THC_I2CSUBIP_INT = 6, 47 THC_TXN_ERR_INT = 7, 48 THC_FATAL_ERR_INT = 8, 49 THC_UNKNOWN_INT 50 }; 51 52 /** 53 * struct thc_i2c_config - THC I2C bus configuration 54 * @target_addr: Slave address of touch device (TIC) 55 * @addr_mode: Slave address mode of touch device (TIC), 7bit or 10bit 56 * @speed: I2C bus frequency speed mode 57 * @scl_hcnt: I2C clock SCL high count 58 * @scl_lcnt: I2C clock SCL low count 59 * @sda_tx_hold: I2C Data SDA transmit hold period 60 * @sda_rx_hold: I2C Data SDA receive hold period 61 */ 62 struct thc_i2c_config { 63 u16 target_addr; 64 u8 addr_mode; 65 u32 speed; 66 u32 scl_hcnt; 67 u32 scl_lcnt; 68 u32 sda_tx_hold; 69 u32 sda_rx_hold; 70 }; 71 72 /** 73 * struct thc_device - THC private device struct 74 * @thc_regmap: MMIO regmap structure for accessing THC registers 75 * @mmio_addr: MMIO registers address 76 * @thc_bus_lock: Mutex locker for THC config 77 * @port_type: Port type of THC port instance 78 * @pio_int_supported: PIO interrupt supported flag 79 * @dma_ctx: DMA specific data 80 * @wot: THC Wake-on-Touch data 81 * @write_complete_wait: Signal event for DMA write complete 82 * @swdma_complete_wait: Signal event for SWDMA sequence complete 83 * @write_done: Bool value that indicates if DMA write is done 84 * @swdma_done: Bool value that indicates if SWDMA sequence is done 85 * @perf_limit: The delay between read operation and write operation 86 * @i2c_subip_regs: The copy of THC I2C sub-system registers for resuming restore 87 * @i2c_max_rx_size: I2C Rx transfer max input size 88 * @i2c_int_delay_us: I2C input interrupt delay, unit is us 89 * @i2c_max_rx_size_en: Bool value that indicates I2C max input size control enabled or not 90 * @i2c_int_delay_en: Bool value that indicates I2C input interrupt delay enabled or not 91 */ 92 struct thc_device { 93 struct device *dev; 94 struct regmap *thc_regmap; 95 void __iomem *mmio_addr; 96 struct mutex thc_bus_lock; 97 enum thc_port_type port_type; 98 bool pio_int_supported; 99 100 struct thc_dma_context *dma_ctx; 101 102 struct thc_wot wot; 103 104 wait_queue_head_t write_complete_wait; 105 wait_queue_head_t swdma_complete_wait; 106 bool write_done; 107 bool swdma_done; 108 109 u32 perf_limit; 110 111 u32 *i2c_subip_regs; 112 113 u32 i2c_max_rx_size; 114 u32 i2c_int_delay_us; 115 bool i2c_max_rx_size_en; 116 bool i2c_int_delay_en; 117 }; 118 119 struct thc_device *thc_dev_init(struct device *device, void __iomem *mem_addr); 120 int thc_tic_pio_read(struct thc_device *dev, const u32 address, 121 const u32 size, u32 *actual_size, u32 *buffer); 122 int thc_tic_pio_write(struct thc_device *dev, const u32 address, 123 const u32 size, const u32 *buffer); 124 int thc_tic_pio_write_and_read(struct thc_device *dev, const u32 address, 125 const u32 write_size, const u32 *write_buffer, 126 const u32 read_size, u32 *actual_size, u32 *read_buffer); 127 void thc_interrupt_config(struct thc_device *dev); 128 void thc_int_trigger_type_select(struct thc_device *dev, bool edge_trigger); 129 void thc_interrupt_enable(struct thc_device *dev, bool int_enable); 130 void thc_set_pio_interrupt_support(struct thc_device *dev, bool supported); 131 int thc_interrupt_quiesce(const struct thc_device *dev, bool int_quiesce); 132 void thc_ltr_config(struct thc_device *dev, u32 active_ltr_us, u32 lp_ltr_us); 133 void thc_change_ltr_mode(struct thc_device *dev, u32 ltr_mode); 134 void thc_ltr_unconfig(struct thc_device *dev); 135 u32 thc_int_cause_read(struct thc_device *dev); 136 int thc_interrupt_handler(struct thc_device *dev); 137 int thc_port_select(struct thc_device *dev, enum thc_port_type port_type); 138 int thc_spi_read_config(struct thc_device *dev, u32 spi_freq_val, 139 u32 io_mode, u32 opcode, u32 spi_rd_mps); 140 int thc_spi_write_config(struct thc_device *dev, u32 spi_freq_val, 141 u32 io_mode, u32 opcode, u32 spi_wr_mps, u32 perf_limit); 142 void thc_spi_input_output_address_config(struct thc_device *dev, u32 input_hdr_addr, 143 u32 input_bdy_addr, u32 output_addr); 144 int thc_i2c_subip_init(struct thc_device *dev, const struct thc_i2c_config *i2c_config); 145 int thc_i2c_subip_regs_save(struct thc_device *dev); 146 int thc_i2c_subip_regs_restore(struct thc_device *dev); 147 int thc_i2c_set_rx_max_size(struct thc_device *dev, u32 max_rx_size); 148 int thc_i2c_rx_max_size_enable(struct thc_device *dev, bool enable); 149 int thc_i2c_set_rx_int_delay(struct thc_device *dev, u32 delay_us); 150 int thc_i2c_rx_int_delay_enable(struct thc_device *dev, bool enable); 151 152 #endif /* _INTEL_THC_DEV_H_ */ 153