xref: /linux/drivers/gpu/drm/xe/xe_i2c.c (revision 570f7e331f5febb30f1384817463c7e42b65ca7d)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Intel Xe I2C attached Microcontroller Units (MCU)
4  *
5  * Copyright (C) 2025 Intel Corporation.
6  */
7 
8 #include <drm/drm_print.h>
9 #include <linux/array_size.h>
10 #include <linux/container_of.h>
11 #include <linux/device.h>
12 #include <linux/err.h>
13 #include <linux/i2c.h>
14 #include <linux/ioport.h>
15 #include <linux/irq.h>
16 #include <linux/irqdomain.h>
17 #include <linux/notifier.h>
18 #include <linux/pci.h>
19 #include <linux/platform_device.h>
20 #include <linux/property.h>
21 #include <linux/regmap.h>
22 #include <linux/sprintf.h>
23 #include <linux/string.h>
24 #include <linux/types.h>
25 #include <linux/workqueue.h>
26 
27 #include "regs/xe_i2c_regs.h"
28 #include "regs/xe_irq_regs.h"
29 
30 #include "xe_device.h"
31 #include "xe_i2c.h"
32 #include "xe_mmio.h"
33 #include "xe_sriov.h"
34 #include "xe_survivability_mode.h"
35 
36 /**
37  * DOC: Xe I2C devices
38  *
39  * Register a platform device for the I2C host controller (Synpsys DesignWare
40  * I2C) if the registers of that controller are mapped to the MMIO, and also the
41  * I2C client device for the Add-In Management Controller (the MCU) attached to
42  * the host controller.
43  *
44  * See drivers/i2c/busses/i2c-designware-* for more information on the I2C host
45  * controller.
46  */
47 
48 static const char adapter_name[] = "i2c_designware";
49 
50 static const struct property_entry xe_i2c_adapter_properties[] = {
51 	PROPERTY_ENTRY_STRING("compatible", "intel,xe-i2c"),
52 	PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_FAST_MODE_PLUS_FREQ),
53 	{ }
54 };
55 
56 static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep)
57 {
58 	u32 *val = ep;
59 
60 	val[0] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_PREFIX);
61 	val[1] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_POSTFIX);
62 }
63 
64 static void xe_i2c_client_work(struct work_struct *work)
65 {
66 	struct xe_i2c *i2c = container_of(work, struct xe_i2c, work);
67 	struct i2c_board_info info = {
68 		.type	= "amc",
69 		.flags	= I2C_CLIENT_HOST_NOTIFY,
70 		.addr	= i2c->ep.addr[1],
71 	};
72 
73 	i2c->client[0] = i2c_new_client_device(i2c->adapter, &info);
74 }
75 
76 static int xe_i2c_notifier(struct notifier_block *nb, unsigned long action, void *data)
77 {
78 	struct xe_i2c *i2c = container_of(nb, struct xe_i2c, bus_notifier);
79 	struct i2c_adapter *adapter = i2c_verify_adapter(data);
80 	struct device *dev = data;
81 
82 	if (action == BUS_NOTIFY_ADD_DEVICE &&
83 	    adapter && dev->parent == &i2c->pdev->dev) {
84 		i2c->adapter = adapter;
85 		schedule_work(&i2c->work);
86 		return NOTIFY_OK;
87 	}
88 
89 	return NOTIFY_DONE;
90 }
91 
92 static int xe_i2c_register_adapter(struct xe_i2c *i2c)
93 {
94 	struct pci_dev *pci = to_pci_dev(i2c->drm_dev);
95 	struct platform_device *pdev;
96 	int ret;
97 	u32 id;
98 
99 	id = (pci_domain_nr(pci->bus) << 16) | pci_dev_id(pci);
100 
101 	/*
102 	 * Not using platform_device_register_full() here because we don't have
103 	 * a handle to the platform_device before it returns. xe_i2c_notifier()
104 	 * uses that handle, but it may be called before
105 	 * platform_device_register_full() is done.
106 	 */
107 	pdev = platform_device_alloc(adapter_name, id);
108 	if (!pdev)
109 		return -ENOMEM;
110 
111 	ret = device_create_managed_software_node(&pdev->dev,
112 						  xe_i2c_adapter_properties,
113 						  NULL);
114 	if (ret)
115 		goto err_pdev_put;
116 
117 	if (i2c->adapter_irq) {
118 		struct resource res;
119 
120 		res = DEFINE_RES_IRQ_NAMED(i2c->adapter_irq, "xe_i2c");
121 
122 		ret = platform_device_add_resources(pdev, &res, 1);
123 		if (ret)
124 			goto err_pdev_put;
125 	}
126 
127 	pdev->dev.parent = i2c->drm_dev;
128 	i2c->pdev = pdev;
129 
130 	ret = platform_device_add(pdev);
131 	if (ret)
132 		goto err_pdev_put;
133 
134 	return 0;
135 
136 err_pdev_put:
137 	platform_device_put(pdev);
138 
139 	return ret;
140 }
141 
142 static void xe_i2c_unregister_adapter(struct xe_i2c *i2c)
143 {
144 	platform_device_unregister(i2c->pdev);
145 }
146 
147 /**
148  * xe_i2c_present - I2C controller is present and functional
149  * @xe: xe device instance
150  *
151  * Check whether the I2C controller is present and functioning with valid
152  * endpoint cookie.
153  *
154  * Return: %true if present, %false otherwise.
155  */
156 bool xe_i2c_present(struct xe_device *xe)
157 {
158 	return xe->i2c && xe->i2c->ep.cookie == XE_I2C_EP_COOKIE_DEVICE;
159 }
160 
161 static bool xe_i2c_irq_present(struct xe_device *xe)
162 {
163 	return xe->i2c && xe->i2c->adapter_irq;
164 }
165 
166 /**
167  * xe_i2c_irq_handler: Handler for I2C interrupts
168  * @xe: xe device instance
169  * @master_ctl: interrupt register
170  *
171  * Forward interrupts generated by the I2C host adapter to the I2C host adapter
172  * driver.
173  */
174 void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl)
175 {
176 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
177 
178 	if (!(master_ctl & I2C_IRQ) || !xe_i2c_irq_present(xe))
179 		return;
180 
181 	/* Forward interrupt to I2C adapter */
182 	generic_handle_irq_safe(xe->i2c->adapter_irq);
183 
184 	/* Deassert after I2C adapter clears the interrupt */
185 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_INTX_DISABLE);
186 	/* Reassert to allow subsequent interrupt generation */
187 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, PCI_COMMAND_INTX_DISABLE, 0);
188 }
189 
190 void xe_i2c_irq_reset(struct xe_device *xe)
191 {
192 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
193 
194 	if (!xe_i2c_irq_present(xe))
195 		return;
196 
197 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_INTX_DISABLE);
198 	xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, ACPI_INTR_EN, 0);
199 }
200 
201 void xe_i2c_irq_postinstall(struct xe_device *xe)
202 {
203 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
204 
205 	if (!xe_i2c_irq_present(xe))
206 		return;
207 
208 	xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, 0, ACPI_INTR_EN);
209 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, PCI_COMMAND_INTX_DISABLE, 0);
210 }
211 
212 static int xe_i2c_irq_map(struct irq_domain *h, unsigned int virq,
213 			  irq_hw_number_t hw_irq_num)
214 {
215 	irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq);
216 	return 0;
217 }
218 
219 static const struct irq_domain_ops xe_i2c_irq_ops = {
220 	.map = xe_i2c_irq_map,
221 };
222 
223 static int xe_i2c_create_irq(struct xe_device *xe)
224 {
225 	struct xe_i2c *i2c = xe->i2c;
226 	struct irq_domain *domain;
227 
228 	if (!(i2c->ep.capabilities & XE_I2C_EP_CAP_IRQ) ||
229 	    xe_survivability_mode_is_boot_enabled(xe))
230 		return 0;
231 
232 	domain = irq_domain_create_linear(dev_fwnode(i2c->drm_dev), 1, &xe_i2c_irq_ops, NULL);
233 	if (!domain)
234 		return -ENOMEM;
235 
236 	i2c->adapter_irq = irq_create_mapping(domain, 0);
237 	i2c->irqdomain = domain;
238 
239 	return 0;
240 }
241 
242 static void xe_i2c_remove_irq(struct xe_i2c *i2c)
243 {
244 	if (!i2c->irqdomain)
245 		return;
246 
247 	irq_dispose_mapping(i2c->adapter_irq);
248 	irq_domain_remove(i2c->irqdomain);
249 }
250 
251 static int xe_i2c_read(void *context, unsigned int reg, unsigned int *val)
252 {
253 	struct xe_i2c *i2c = context;
254 
255 	*val = xe_mmio_read32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET));
256 
257 	return 0;
258 }
259 
260 static int xe_i2c_write(void *context, unsigned int reg, unsigned int val)
261 {
262 	struct xe_i2c *i2c = context;
263 
264 	xe_mmio_write32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET), val);
265 
266 	return 0;
267 }
268 
269 static const struct regmap_config i2c_regmap_config = {
270 	.reg_bits = 32,
271 	.val_bits = 32,
272 	.reg_read = xe_i2c_read,
273 	.reg_write = xe_i2c_write,
274 	.fast_io = true,
275 };
276 
277 void xe_i2c_pm_suspend(struct xe_device *xe)
278 {
279 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
280 
281 	if (!xe_i2c_present(xe))
282 		return;
283 
284 	xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot);
285 	drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
286 }
287 
288 void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold)
289 {
290 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
291 
292 	if (!xe_i2c_present(xe))
293 		return;
294 
295 	if (d3cold)
296 		xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
297 
298 	xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0);
299 	drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
300 }
301 
302 static void xe_i2c_remove(void *data)
303 {
304 	struct xe_i2c *i2c = data;
305 	unsigned int i;
306 
307 	for (i = 0; i < XE_I2C_MAX_CLIENTS; i++)
308 		i2c_unregister_device(i2c->client[i]);
309 
310 	bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier);
311 	xe_i2c_unregister_adapter(i2c);
312 	xe_i2c_remove_irq(i2c);
313 }
314 
315 /**
316  * xe_i2c_probe: Probe the I2C host adapter and the I2C clients attached to it
317  * @xe: xe device instance
318  *
319  * Register all the I2C devices described in the I2C Endpoint data structure.
320  *
321  * Return: 0 on success, error code on failure
322  */
323 int xe_i2c_probe(struct xe_device *xe)
324 {
325 	struct device *drm_dev = xe->drm.dev;
326 	struct xe_i2c_endpoint ep;
327 	struct regmap *regmap;
328 	struct xe_i2c *i2c;
329 	int ret;
330 
331 	if (!xe->info.has_i2c)
332 		return 0;
333 
334 	xe_i2c_read_endpoint(xe_root_tile_mmio(xe), &ep);
335 	if (ep.cookie != XE_I2C_EP_COOKIE_DEVICE)
336 		return 0;
337 
338 	i2c = devm_kzalloc(drm_dev, sizeof(*i2c), GFP_KERNEL);
339 	if (!i2c)
340 		return -ENOMEM;
341 
342 	INIT_WORK(&i2c->work, xe_i2c_client_work);
343 	i2c->mmio = xe_root_tile_mmio(xe);
344 	i2c->drm_dev = drm_dev;
345 	i2c->ep = ep;
346 	xe->i2c = i2c;
347 
348 	/* PCI PM isn't aware of this device, bring it up and match it with SGUnit state. */
349 	xe_i2c_pm_resume(xe, true);
350 
351 	regmap = devm_regmap_init(drm_dev, NULL, i2c, &i2c_regmap_config);
352 	if (IS_ERR(regmap))
353 		return PTR_ERR(regmap);
354 
355 	i2c->bus_notifier.notifier_call = xe_i2c_notifier;
356 	ret = bus_register_notifier(&i2c_bus_type, &i2c->bus_notifier);
357 	if (ret)
358 		return ret;
359 
360 	ret = xe_i2c_create_irq(xe);
361 	if (ret)
362 		goto err_unregister_notifier;
363 
364 	ret = xe_i2c_register_adapter(i2c);
365 	if (ret)
366 		goto err_remove_irq;
367 
368 	xe_i2c_irq_postinstall(xe);
369 	return devm_add_action_or_reset(drm_dev, xe_i2c_remove, i2c);
370 
371 err_remove_irq:
372 	xe_i2c_remove_irq(i2c);
373 
374 err_unregister_notifier:
375 	bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier);
376 
377 	return ret;
378 }
379