xref: /linux/drivers/gpu/drm/drm_displayid_internal.h (revision 570f7e331f5febb30f1384817463c7e42b65ca7d)
1 /*
2  * Copyright © 2014 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef __DRM_DISPLAYID_INTERNAL_H__
24 #define __DRM_DISPLAYID_INTERNAL_H__
25 
26 #include <linux/types.h>
27 #include <linux/bits.h>
28 
29 struct drm_edid;
30 
31 #define VESA_IEEE_OUI				0x3a0292
32 
33 /* DisplayID Structure versions */
34 #define DISPLAY_ID_STRUCTURE_VER_20		0x20
35 
36 /* DisplayID Structure v1r2 Data Blocks */
37 #define DATA_BLOCK_PRODUCT_ID			0x00
38 #define DATA_BLOCK_DISPLAY_PARAMETERS		0x01
39 #define DATA_BLOCK_COLOR_CHARACTERISTICS	0x02
40 #define DATA_BLOCK_TYPE_1_DETAILED_TIMING	0x03
41 #define DATA_BLOCK_TYPE_2_DETAILED_TIMING	0x04
42 #define DATA_BLOCK_TYPE_3_SHORT_TIMING		0x05
43 #define DATA_BLOCK_TYPE_4_DMT_TIMING		0x06
44 #define DATA_BLOCK_VESA_TIMING			0x07
45 #define DATA_BLOCK_CEA_TIMING			0x08
46 #define DATA_BLOCK_VIDEO_TIMING_RANGE		0x09
47 #define DATA_BLOCK_PRODUCT_SERIAL_NUMBER	0x0a
48 #define DATA_BLOCK_GP_ASCII_STRING		0x0b
49 #define DATA_BLOCK_DISPLAY_DEVICE_DATA		0x0c
50 #define DATA_BLOCK_INTERFACE_POWER_SEQUENCING	0x0d
51 #define DATA_BLOCK_TRANSFER_CHARACTERISTICS	0x0e
52 #define DATA_BLOCK_DISPLAY_INTERFACE		0x0f
53 #define DATA_BLOCK_STEREO_DISPLAY_INTERFACE	0x10
54 #define DATA_BLOCK_TILED_DISPLAY		0x12
55 #define DATA_BLOCK_VENDOR_SPECIFIC		0x7f
56 #define DATA_BLOCK_CTA				0x81
57 
58 /* DisplayID Structure v2r0 Data Blocks */
59 #define DATA_BLOCK_2_PRODUCT_ID			0x20
60 #define DATA_BLOCK_2_DISPLAY_PARAMETERS		0x21
61 #define DATA_BLOCK_2_TYPE_7_DETAILED_TIMING	0x22
62 #define DATA_BLOCK_2_TYPE_8_ENUMERATED_TIMING	0x23
63 #define DATA_BLOCK_2_TYPE_9_FORMULA_TIMING	0x24
64 #define DATA_BLOCK_2_DYNAMIC_VIDEO_TIMING	0x25
65 #define DATA_BLOCK_2_DISPLAY_INTERFACE_FEATURES	0x26
66 #define DATA_BLOCK_2_STEREO_DISPLAY_INTERFACE	0x27
67 #define DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY	0x28
68 #define DATA_BLOCK_2_CONTAINER_ID		0x29
69 #define DATA_BLOCK_2_TYPE_10_FORMULA_TIMING	0x2a
70 #define DATA_BLOCK_2_VENDOR_SPECIFIC		0x7e
71 #define DATA_BLOCK_2_CTA_DISPLAY_ID		0x81
72 
73 /* DisplayID Structure v1r2 Product Type */
74 #define PRODUCT_TYPE_EXTENSION			0
75 #define PRODUCT_TYPE_TEST			1
76 #define PRODUCT_TYPE_PANEL			2
77 #define PRODUCT_TYPE_MONITOR			3
78 #define PRODUCT_TYPE_TV				4
79 #define PRODUCT_TYPE_REPEATER			5
80 #define PRODUCT_TYPE_DIRECT_DRIVE		6
81 
82 /* DisplayID Structure v2r0 Display Product Primary Use Case (~Product Type) */
83 #define PRIMARY_USE_EXTENSION			0
84 #define PRIMARY_USE_TEST			1
85 #define PRIMARY_USE_GENERIC			2
86 #define PRIMARY_USE_TV				3
87 #define PRIMARY_USE_DESKTOP_PRODUCTIVITY	4
88 #define PRIMARY_USE_DESKTOP_GAMING		5
89 #define PRIMARY_USE_PRESENTATION		6
90 #define PRIMARY_USE_HEAD_MOUNTED_VR		7
91 #define PRIMARY_USE_HEAD_MOUNTED_AR		8
92 
93 struct displayid_header {
94 	u8 rev;
95 	u8 bytes;
96 	u8 prod_id;
97 	u8 ext_count;
98 } __packed;
99 
100 struct displayid_block {
101 	u8 tag;
102 	u8 rev;
103 	u8 num_bytes;
104 } __packed;
105 
106 struct displayid_tiled_block {
107 	struct displayid_block base;
108 	u8 tile_cap;
109 	u8 topo[3];
110 	u8 tile_size[4];
111 	u8 tile_pixel_bezel[5];
112 	u8 topology_id[9];
113 } __packed;
114 
115 struct displayid_detailed_timings_1 {
116 	u8 pixel_clock[3];
117 	u8 flags;
118 	__le16 hactive;
119 	__le16 hblank;
120 	__le16 hsync;
121 	__le16 hsw;
122 	__le16 vactive;
123 	__le16 vblank;
124 	__le16 vsync;
125 	__le16 vsw;
126 } __packed;
127 
128 struct displayid_detailed_timing_block {
129 	struct displayid_block base;
130 	struct displayid_detailed_timings_1 timings[];
131 } __packed;
132 
133 struct displayid_formula_timings_9 {
134 	u8 flags;
135 	__le16 hactive;
136 	__le16 vactive;
137 	u8 vrefresh;
138 } __packed;
139 
140 struct displayid_formula_timing_block {
141 	struct displayid_block base;
142 	struct displayid_formula_timings_9 timings[];
143 } __packed;
144 
145 #define DISPLAYID_DEVICE_TECH_UNSPECIFIED	0
146 #define DISPLAYID_DEVICE_TECH_LCD		1
147 #define DISPLAYID_DEVICE_TECH_OLED		2
148 
149 #define DISPLAYID_DISPLAY_PARAMS_DEVICE_TECH	GENMASK(6, 4)
150 
151 struct displayid_display_params_block {
152 	struct displayid_block base;
153 	__le16 horiz_image_size;
154 	__le16 vert_image_size;
155 	__le16 horiz_pixel_count;
156 	__le16 vert_pixel_count;
157 	u8 features;
158 	u8 primary_color1[3];
159 	u8 primary_color2[3];
160 	u8 primary_color3[3];
161 	u8 white_point[3];
162 	__le16 max_luminance_full;
163 	__le16 max_luminance_10;
164 	__le16 min_luminance;
165 	u8 color_depth_and_tech;	/* [2:0] depth, [6:4] device tech, [7] theme */
166 	u8 gamma_eotf;
167 } __packed;
168 
169 #define DISPLAYID_VESA_MSO_OVERLAP	GENMASK(3, 0)
170 #define DISPLAYID_VESA_MSO_MODE		GENMASK(6, 5)
171 
172 struct displayid_vesa_vendor_specific_block {
173 	struct displayid_block base;
174 	u8 oui[3];
175 	u8 data_structure_type;
176 	u8 mso;
177 } __packed;
178 
179 /*
180  * DisplayID iteration.
181  *
182  * Do not access directly, this is private.
183  */
184 struct displayid_iter {
185 	const struct drm_edid *drm_edid;
186 
187 	const u8 *section;
188 	int length;
189 	int idx;
190 	int ext_index;
191 
192 	u8 version;
193 	u8 primary_use;
194 
195 	u8 quirks;
196 };
197 
198 void displayid_iter_edid_begin(const struct drm_edid *drm_edid,
199 			       struct displayid_iter *iter);
200 const struct displayid_block *
201 __displayid_iter_next(struct displayid_iter *iter);
202 #define displayid_iter_for_each(__block, __iter) \
203 	while (((__block) = __displayid_iter_next(__iter)))
204 void displayid_iter_end(struct displayid_iter *iter);
205 
206 u8 displayid_version(const struct displayid_iter *iter);
207 u8 displayid_primary_use(const struct displayid_iter *iter);
208 
209 #endif
210