1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Motorola CPCAP PMIC RTC driver 4 * 5 * Based on cpcap-regulator.c from Motorola Linux kernel tree 6 * Copyright (C) 2009 Motorola, Inc. 7 * 8 * Rewritten for mainline kernel 9 * - use DT 10 * - use regmap 11 * - use standard interrupt framework 12 * - use managed device resources 13 * - remove custom "secure clock daemon" helpers 14 * 15 * Copyright (C) 2017 Sebastian Reichel <sre@kernel.org> 16 */ 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/device.h> 21 #include <linux/platform_device.h> 22 #include <linux/rtc.h> 23 #include <linux/err.h> 24 #include <linux/regmap.h> 25 #include <linux/mfd/motorola-cpcap.h> 26 #include <linux/slab.h> 27 #include <linux/sched.h> 28 29 #define SECS_PER_DAY 86400 30 #define DAY_MASK 0x7FFF 31 #define TOD1_MASK 0x00FF 32 #define TOD2_MASK 0x01FF 33 34 struct cpcap_time { 35 int day; 36 int tod1; 37 int tod2; 38 }; 39 40 struct cpcap_rtc { 41 struct regmap *regmap; 42 struct rtc_device *rtc_dev; 43 u16 vendor; 44 int alarm_irq; 45 bool alarm_enabled; 46 int update_irq; 47 bool update_enabled; 48 }; 49 50 static void cpcap2rtc_time(struct rtc_time *rtc, struct cpcap_time *cpcap) 51 { 52 unsigned long int tod; 53 unsigned long int time; 54 55 tod = (cpcap->tod1 & TOD1_MASK) | ((cpcap->tod2 & TOD2_MASK) << 8); 56 time = tod + ((cpcap->day & DAY_MASK) * SECS_PER_DAY); 57 58 rtc_time64_to_tm(time, rtc); 59 } 60 61 static void rtc2cpcap_time(struct cpcap_time *cpcap, struct rtc_time *rtc) 62 { 63 unsigned long time; 64 65 time = rtc_tm_to_time64(rtc); 66 67 cpcap->day = time / SECS_PER_DAY; 68 time %= SECS_PER_DAY; 69 cpcap->tod2 = (time >> 8) & TOD2_MASK; 70 cpcap->tod1 = time & TOD1_MASK; 71 } 72 73 static int cpcap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 74 { 75 struct cpcap_rtc *rtc = dev_get_drvdata(dev); 76 77 if (rtc->alarm_enabled == enabled) 78 return 0; 79 80 if (enabled) 81 enable_irq(rtc->alarm_irq); 82 else 83 disable_irq(rtc->alarm_irq); 84 85 rtc->alarm_enabled = !!enabled; 86 87 return 0; 88 } 89 90 static int cpcap_rtc_read_time(struct device *dev, struct rtc_time *tm) 91 { 92 struct cpcap_rtc *rtc; 93 struct cpcap_time cpcap_tm; 94 int temp_tod2; 95 int ret; 96 97 rtc = dev_get_drvdata(dev); 98 99 ret = regmap_read(rtc->regmap, CPCAP_REG_TOD2, &temp_tod2); 100 ret |= regmap_read(rtc->regmap, CPCAP_REG_DAY, &cpcap_tm.day); 101 ret |= regmap_read(rtc->regmap, CPCAP_REG_TOD1, &cpcap_tm.tod1); 102 ret |= regmap_read(rtc->regmap, CPCAP_REG_TOD2, &cpcap_tm.tod2); 103 104 if (temp_tod2 > cpcap_tm.tod2) 105 ret |= regmap_read(rtc->regmap, CPCAP_REG_DAY, &cpcap_tm.day); 106 107 if (ret) { 108 dev_err(dev, "Failed to read time\n"); 109 return -EIO; 110 } 111 112 cpcap2rtc_time(tm, &cpcap_tm); 113 114 return 0; 115 } 116 117 static int cpcap_rtc_set_time(struct device *dev, struct rtc_time *tm) 118 { 119 struct cpcap_rtc *rtc; 120 struct cpcap_time cpcap_tm; 121 int ret = 0; 122 123 rtc = dev_get_drvdata(dev); 124 125 rtc2cpcap_time(&cpcap_tm, tm); 126 127 if (rtc->alarm_enabled) 128 disable_irq(rtc->alarm_irq); 129 if (rtc->update_enabled) 130 disable_irq(rtc->update_irq); 131 132 if (rtc->vendor == CPCAP_VENDOR_ST) { 133 /* The TOD1 and TOD2 registers MUST be written in this order 134 * for the change to properly set. 135 */ 136 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1, 137 TOD1_MASK, cpcap_tm.tod1); 138 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD2, 139 TOD2_MASK, cpcap_tm.tod2); 140 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_DAY, 141 DAY_MASK, cpcap_tm.day); 142 } else { 143 /* Clearing the upper lower 8 bits of the TOD guarantees that 144 * the upper half of TOD (TOD2) will not increment for 0xFF RTC 145 * ticks (255 seconds). During this time we can safely write 146 * to DAY, TOD2, then TOD1 (in that order) and expect RTC to be 147 * synchronized to the exact time requested upon the final write 148 * to TOD1. 149 */ 150 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1, 151 TOD1_MASK, 0); 152 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_DAY, 153 DAY_MASK, cpcap_tm.day); 154 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD2, 155 TOD2_MASK, cpcap_tm.tod2); 156 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1, 157 TOD1_MASK, cpcap_tm.tod1); 158 } 159 160 if (rtc->update_enabled) 161 enable_irq(rtc->update_irq); 162 if (rtc->alarm_enabled) 163 enable_irq(rtc->alarm_irq); 164 165 return ret; 166 } 167 168 static int cpcap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 169 { 170 struct cpcap_rtc *rtc; 171 struct cpcap_time cpcap_tm; 172 int ret; 173 174 rtc = dev_get_drvdata(dev); 175 176 alrm->enabled = rtc->alarm_enabled; 177 178 ret = regmap_read(rtc->regmap, CPCAP_REG_DAYA, &cpcap_tm.day); 179 ret |= regmap_read(rtc->regmap, CPCAP_REG_TODA2, &cpcap_tm.tod2); 180 ret |= regmap_read(rtc->regmap, CPCAP_REG_TODA1, &cpcap_tm.tod1); 181 182 if (ret) { 183 dev_err(dev, "Failed to read time\n"); 184 return -EIO; 185 } 186 187 cpcap2rtc_time(&alrm->time, &cpcap_tm); 188 return rtc_valid_tm(&alrm->time); 189 } 190 191 static int cpcap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 192 { 193 struct cpcap_rtc *rtc; 194 struct cpcap_time cpcap_tm; 195 int ret; 196 197 rtc = dev_get_drvdata(dev); 198 199 rtc2cpcap_time(&cpcap_tm, &alrm->time); 200 201 if (rtc->alarm_enabled) 202 disable_irq(rtc->alarm_irq); 203 204 ret = regmap_update_bits(rtc->regmap, CPCAP_REG_DAYA, DAY_MASK, 205 cpcap_tm.day); 206 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TODA2, TOD2_MASK, 207 cpcap_tm.tod2); 208 ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TODA1, TOD1_MASK, 209 cpcap_tm.tod1); 210 211 if (!ret) { 212 enable_irq(rtc->alarm_irq); 213 rtc->alarm_enabled = true; 214 } 215 216 return ret; 217 } 218 219 static const struct rtc_class_ops cpcap_rtc_ops = { 220 .read_time = cpcap_rtc_read_time, 221 .set_time = cpcap_rtc_set_time, 222 .read_alarm = cpcap_rtc_read_alarm, 223 .set_alarm = cpcap_rtc_set_alarm, 224 .alarm_irq_enable = cpcap_rtc_alarm_irq_enable, 225 }; 226 227 static irqreturn_t cpcap_rtc_alarm_irq(int irq, void *data) 228 { 229 struct cpcap_rtc *rtc = data; 230 231 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF); 232 return IRQ_HANDLED; 233 } 234 235 static irqreturn_t cpcap_rtc_update_irq(int irq, void *data) 236 { 237 struct cpcap_rtc *rtc = data; 238 239 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF); 240 return IRQ_HANDLED; 241 } 242 243 static int cpcap_rtc_probe(struct platform_device *pdev) 244 { 245 struct device *dev = &pdev->dev; 246 struct cpcap_rtc *rtc; 247 int err; 248 249 rtc = devm_kzalloc(dev, sizeof(*rtc), GFP_KERNEL); 250 if (!rtc) 251 return -ENOMEM; 252 253 rtc->regmap = dev_get_regmap(dev->parent, NULL); 254 if (!rtc->regmap) 255 return -ENODEV; 256 257 platform_set_drvdata(pdev, rtc); 258 rtc->rtc_dev = devm_rtc_allocate_device(dev); 259 if (IS_ERR(rtc->rtc_dev)) 260 return PTR_ERR(rtc->rtc_dev); 261 262 rtc->rtc_dev->ops = &cpcap_rtc_ops; 263 rtc->rtc_dev->range_max = (timeu64_t) (DAY_MASK + 1) * SECS_PER_DAY - 1; 264 265 err = cpcap_get_vendor(dev, rtc->regmap, &rtc->vendor); 266 if (err) 267 return err; 268 269 rtc->alarm_irq = platform_get_irq(pdev, 0); 270 err = devm_request_threaded_irq(dev, rtc->alarm_irq, NULL, 271 cpcap_rtc_alarm_irq, 272 IRQF_TRIGGER_NONE | IRQF_ONESHOT, 273 "rtc_alarm", rtc); 274 if (err) { 275 dev_err(dev, "Could not request alarm irq: %d\n", err); 276 return err; 277 } 278 disable_irq(rtc->alarm_irq); 279 280 /* Stock Android uses the 1 Hz interrupt for "secure clock daemon", 281 * which is not supported by the mainline kernel. The mainline kernel 282 * does not use the irq at the moment, but we explicitly request and 283 * disable it, so that its masked and does not wake up the processor 284 * every second. 285 */ 286 rtc->update_irq = platform_get_irq(pdev, 1); 287 err = devm_request_threaded_irq(dev, rtc->update_irq, NULL, 288 cpcap_rtc_update_irq, 289 IRQF_TRIGGER_NONE | IRQF_ONESHOT, 290 "rtc_1hz", rtc); 291 if (err) { 292 dev_err(dev, "Could not request update irq: %d\n", err); 293 return err; 294 } 295 disable_irq(rtc->update_irq); 296 297 err = device_init_wakeup(dev, true); 298 if (err) { 299 dev_err(dev, "wakeup initialization failed (%d)\n", err); 300 /* ignore error and continue without wakeup support */ 301 } 302 303 return devm_rtc_register_device(rtc->rtc_dev); 304 } 305 306 static const struct of_device_id cpcap_rtc_of_match[] = { 307 { .compatible = "motorola,cpcap-rtc", }, 308 {}, 309 }; 310 MODULE_DEVICE_TABLE(of, cpcap_rtc_of_match); 311 312 static struct platform_driver cpcap_rtc_driver = { 313 .probe = cpcap_rtc_probe, 314 .driver = { 315 .name = "cpcap-rtc", 316 .of_match_table = cpcap_rtc_of_match, 317 }, 318 }; 319 320 module_platform_driver(cpcap_rtc_driver); 321 322 MODULE_DESCRIPTION("CPCAP RTC driver"); 323 MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>"); 324 MODULE_LICENSE("GPL"); 325