1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include <drm/intel/display_parent_interface.h> 7 8 #include "regs/xe_gtt_defs.h" 9 10 #include "intel_crtc.h" 11 #include "intel_display_regs.h" 12 #include "intel_display_types.h" 13 #include "intel_fb.h" 14 #include "intel_fb_pin.h" 15 #include "intel_fbdev_fb.h" 16 #include "xe_bo.h" 17 #include "xe_display_vma.h" 18 #include "xe_ggtt.h" 19 #include "xe_mmio.h" 20 #include "xe_vram_types.h" 21 22 /* Early xe has no irq */ 23 static void xe_initial_plane_vblank_wait(struct drm_crtc *_crtc) 24 { 25 struct intel_crtc *crtc = to_intel_crtc(_crtc); 26 struct xe_device *xe = to_xe_device(crtc->base.dev); 27 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); 28 u32 timestamp; 29 int ret; 30 31 timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp); 32 33 ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false); 34 if (ret < 0) 35 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret); 36 } 37 38 static struct xe_bo * 39 initial_plane_bo(struct xe_device *xe, 40 struct intel_initial_plane_config *plane_config) 41 { 42 struct xe_tile *tile0 = xe_device_get_root_tile(xe); 43 struct xe_bo *bo; 44 resource_size_t phys_base; 45 u32 base, size, flags; 46 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 47 48 if (plane_config->size == 0) 49 return NULL; 50 51 flags = XE_BO_FLAG_FORCE_WC | XE_BO_FLAG_GGTT; 52 53 base = round_down(plane_config->base, page_size); 54 if (IS_DGFX(xe)) { 55 u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base); 56 57 if (!(pte & XE_GGTT_PTE_DM)) { 58 drm_err(&xe->drm, 59 "Initial plane programming missing DM bit\n"); 60 return NULL; 61 } 62 63 phys_base = pte & ~(page_size - 1); 64 flags |= XE_BO_FLAG_VRAM0; 65 66 /* 67 * We don't currently expect this to ever be placed in the 68 * stolen portion. 69 */ 70 if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) { 71 drm_err(&xe->drm, 72 "Initial plane programming using invalid range, phys_base=%pa\n", 73 &phys_base); 74 return NULL; 75 } 76 77 drm_dbg(&xe->drm, 78 "Using phys_base=%pa, based on initial plane programming\n", 79 &phys_base); 80 } else { 81 struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN); 82 83 if (!stolen) 84 return NULL; 85 phys_base = base; 86 flags |= XE_BO_FLAG_STOLEN; 87 88 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 89 !intel_fbdev_fb_prefer_stolen(&xe->drm, plane_config->size)) { 90 drm_info(&xe->drm, "Initial FB size exceeds half of stolen, discarding\n"); 91 return NULL; 92 } 93 } 94 95 size = round_up(plane_config->base + plane_config->size, 96 page_size); 97 size -= base; 98 99 bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base, 100 ttm_bo_type_kernel, flags, 0, false); 101 if (IS_ERR(bo)) { 102 drm_dbg(&xe->drm, 103 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n", 104 &phys_base, size, flags, PTR_ERR(bo)); 105 return NULL; 106 } 107 108 return bo; 109 } 110 111 static struct drm_gem_object * 112 xe_alloc_initial_plane_obj(struct drm_device *drm, 113 struct intel_initial_plane_config *plane_config) 114 { 115 struct xe_device *xe = to_xe_device(drm); 116 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 117 struct drm_framebuffer *fb = &plane_config->fb->base; 118 struct xe_bo *bo; 119 120 mode_cmd.pixel_format = fb->format->format; 121 mode_cmd.width = fb->width; 122 mode_cmd.height = fb->height; 123 mode_cmd.pitches[0] = fb->pitches[0]; 124 mode_cmd.modifier[0] = fb->modifier; 125 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 126 127 bo = initial_plane_bo(xe, plane_config); 128 if (!bo) 129 return NULL; 130 131 if (intel_framebuffer_init(to_intel_framebuffer(fb), 132 &bo->ttm.base, fb->format, &mode_cmd)) { 133 drm_dbg_kms(&xe->drm, "intel fb init failed\n"); 134 goto err_bo; 135 } 136 /* Reference handed over to fb */ 137 xe_bo_put(bo); 138 139 return &bo->ttm.base; 140 141 err_bo: 142 xe_bo_unpin_map_no_vm(bo); 143 return NULL; 144 } 145 146 static int 147 xe_initial_plane_setup(struct drm_plane_state *_plane_state, 148 struct intel_initial_plane_config *plane_config, 149 struct drm_framebuffer *fb, 150 struct i915_vma *_unused) 151 { 152 struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state); 153 struct i915_vma *vma; 154 155 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, 156 0, 0, 0, false, &plane_state->flags); 157 if (IS_ERR(vma)) 158 return PTR_ERR(vma); 159 160 plane_state->ggtt_vma = vma; 161 162 plane_state->surf = xe_ggtt_node_addr(plane_state->ggtt_vma->node); 163 164 plane_config->vma = vma; 165 166 return 0; 167 } 168 169 static void xe_plane_config_fini(struct intel_initial_plane_config *plane_config) 170 { 171 } 172 173 const struct intel_display_initial_plane_interface xe_display_initial_plane_interface = { 174 .vblank_wait = xe_initial_plane_vblank_wait, 175 .alloc_obj = xe_alloc_initial_plane_obj, 176 .setup = xe_initial_plane_setup, 177 .config_fini = xe_plane_config_fini, 178 }; 179