1 // SPDX-License-Identifier: GPL-2.0 2 3 use kernel::{ 4 io::Io, 5 prelude::*, // 6 }; 7 8 use crate::{ 9 driver::Bar0, 10 fb::hal::FbHal, 11 regs, // 12 }; 13 14 /// Shift applied to the sysmem address before it is written into `NV_PFB_NISO_FLUSH_SYSMEM_ADDR`, 15 /// to be used by HALs. 16 pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8; 17 18 pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 { 19 u64::from(bar.read(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT 20 } 21 22 pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result { 23 // Check that the address doesn't overflow the receiving 32-bit register. 24 u32::try_from(addr >> FLUSH_SYSMEM_ADDR_SHIFT) 25 .map_err(|_| EINVAL) 26 .map(|addr| { 27 bar.write_reg(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::zeroed().with_adr_39_08(addr)) 28 }) 29 } 30 31 pub(super) fn display_enabled_gm107(bar: &Bar0) -> bool { 32 !bar.read(regs::gm107::NV_FUSE_STATUS_OPT_DISPLAY) 33 .display_disabled() 34 } 35 36 pub(super) fn vidmem_size_gp102(bar: &Bar0) -> u64 { 37 bar.read(regs::NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE) 38 .usable_fb_size() 39 } 40 41 struct Tu102; 42 43 impl FbHal for Tu102 { 44 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { 45 read_sysmem_flush_page_gm107(bar) 46 } 47 48 fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result { 49 write_sysmem_flush_page_gm107(bar, addr) 50 } 51 52 fn supports_display(&self, bar: &Bar0) -> bool { 53 display_enabled_gm107(bar) 54 } 55 56 fn vidmem_size(&self, bar: &Bar0) -> u64 { 57 vidmem_size_gp102(bar) 58 } 59 } 60 61 const TU102: Tu102 = Tu102; 62 pub(super) const TU102_HAL: &dyn FbHal = &TU102; 63