1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_DP_H__ 7 #define __INTEL_DP_H__ 8 9 #include <linux/types.h> 10 11 #include "intel_dp_link_caps.h" 12 13 enum intel_output_format; 14 enum pipe; 15 enum port; 16 struct drm_connector_state; 17 struct drm_dp_desc; 18 struct drm_dp_vsc_sdp; 19 struct drm_encoder; 20 struct drm_modeset_acquire_ctx; 21 struct intel_atomic_state; 22 struct intel_connector; 23 struct intel_crtc_state; 24 struct intel_digital_port; 25 struct intel_display; 26 struct intel_dp; 27 struct intel_dp_link_config; 28 struct intel_encoder; 29 30 struct link_config_limits { 31 struct intel_dp_link_caps_filter link_config_filter; 32 struct { 33 /* Uncompressed DSC input or link output bpp in 1 bpp units */ 34 int min_bpp, max_bpp; 35 } pipe; 36 struct { 37 /* Compressed or uncompressed link output bpp in 1/16 bpp units */ 38 int min_bpp_x16, max_bpp_x16; 39 } link; 40 }; 41 42 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 43 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state, 44 const struct drm_connector_state *conn_state); 45 int intel_dp_min_bpp(enum intel_output_format output_format); 46 void intel_dp_init_modeset_retry_work(struct intel_connector *connector); 47 void 48 intel_dp_queue_modeset_retry_for_link(struct intel_atomic_state *state, 49 struct intel_encoder *encoder, 50 const struct intel_crtc_state *crtc_state); 51 bool intel_dp_init_connector(struct intel_digital_port *dig_port, 52 struct intel_connector *intel_connector); 53 void intel_dp_cleanup_connector(struct intel_digital_port *dig_port, 54 struct intel_connector *connector); 55 56 void intel_dp_connector_sync_state(struct intel_connector *connector, 57 const struct intel_crtc_state *crtc_state); 58 void intel_dp_set_link_params(struct intel_dp *intel_dp, 59 int link_rate, int lane_count); 60 int intel_dp_get_active_pipes(struct intel_dp *intel_dp, 61 struct drm_modeset_acquire_ctx *ctx, 62 u8 *pipe_mask); 63 void intel_dp_flush_connector_commits(struct intel_connector *connector); 64 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode); 65 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, 66 const struct intel_crtc_state *crtc_state); 67 void intel_dp_sink_enable_decompression(struct intel_atomic_state *state, 68 struct intel_connector *connector, 69 const struct intel_crtc_state *new_crtc_state); 70 void intel_dp_sink_disable_decompression(struct intel_atomic_state *state, 71 struct intel_connector *connector, 72 const struct intel_crtc_state *old_crtc_state); 73 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); 74 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder); 75 void intel_dp_encoder_flush_work(struct drm_encoder *encoder); 76 int intel_dp_compute_config(struct intel_atomic_state *state, 77 struct intel_encoder *encoder, 78 struct intel_crtc_state *pipe_config, 79 struct drm_connector_state *conn_state); 80 bool intel_dp_needs_8b10b_fec(const struct intel_crtc_state *crtc_state, 81 bool dsc_enabled_on_crtc); 82 void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state); 83 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, 84 struct intel_crtc_state *pipe_config, 85 struct drm_connector_state *conn_state, 86 const struct link_config_limits *limits, 87 int timeslots); 88 void intel_dp_audio_compute_config(struct intel_encoder *encoder, 89 struct intel_crtc_state *pipe_config, 90 struct drm_connector_state *conn_state); 91 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp); 92 bool intel_dp_is_edp(struct intel_dp *intel_dp); 93 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state); 94 bool intel_dp_has_dsc(const struct intel_connector *connector); 95 int intel_dp_link_symbol_size(int rate); 96 int intel_dp_link_symbol_clock(int rate); 97 bool intel_dp_is_port_edp(struct intel_display *display, enum port port); 98 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port, 99 bool long_hpd); 100 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state, 101 const struct drm_connector_state *conn_state); 102 void intel_edp_backlight_off(const struct drm_connector_state *conn_state); 103 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 104 void intel_dp_mst_suspend(struct intel_display *display); 105 void intel_dp_mst_resume(struct intel_display *display); 106 int intel_dp_rate_limit_len(const int *rates, int len, int max_rate); 107 int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port); 108 int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state); 109 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); 110 int intel_dp_rate_index(const int *rates, int len, int rate); 111 void intel_dp_update_sink_caps(struct intel_dp *intel_dp); 112 void intel_dp_reset_link_params(struct intel_dp *intel_dp); 113 114 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, 115 u8 *link_bw, u8 *rate_select); 116 bool intel_dp_source_supports_tps3(struct intel_display *display); 117 bool intel_dp_source_supports_tps4(struct intel_display *display); 118 119 int intel_dp_link_bw_overhead(int link_clock, int lane_count, int hdisplay, 120 int dsc_slice_count, int bpp_x16, unsigned long flags); 121 int intel_dp_link_required(int link_clock, int lane_count, 122 int mode_clock, int mode_hdisplay, 123 int link_bpp_x16, unsigned long bw_overhead_flags); 124 int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, 125 int bw_overhead); 126 int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, 127 int max_dprx_rate, int max_dprx_lanes); 128 bool intel_dp_joiner_needs_dsc(struct intel_display *display, 129 int num_joined_pipes); 130 bool intel_dp_has_joiner(struct intel_dp *intel_dp); 131 bool intel_dp_needs_vsc_colorimetry(const struct intel_crtc_state *crtc_state, 132 const struct drm_connector_state *conn_state); 133 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, 134 const struct intel_crtc_state *crtc_state, 135 const struct drm_connector_state *conn_state); 136 void intel_read_dp_sdp(struct intel_encoder *encoder, 137 struct intel_crtc_state *crtc_state, 138 unsigned int type); 139 void intel_digital_port_lock(struct intel_encoder *encoder); 140 void intel_digital_port_unlock(struct intel_encoder *encoder); 141 bool intel_digital_port_connected(struct intel_encoder *encoder); 142 bool intel_digital_port_connected_locked(struct intel_encoder *encoder); 143 int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, 144 u8 dsc_max_bpc); 145 int intel_dp_compute_min_compressed_bpp_x16(struct intel_connector *connector, 146 enum intel_output_format output_format); 147 bool intel_dp_get_connector_max_link_config(struct intel_connector *connector, 148 const struct link_config_limits *limits, 149 struct intel_dp_link_config *max_link_config); 150 bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector, 151 int link_clock, int lane_count, 152 int mode_clock, int mode_hdisplay, 153 int num_joined_pipes, 154 enum intel_output_format output_format, 155 int pipe_bpp, unsigned long bw_overhead_flags); 156 bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16); 157 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, 158 int mode_clock, int mode_hdisplay, 159 int num_joined_pipes); 160 static inline unsigned int intel_dp_unused_lane_mask(int lane_count) 161 { 162 return ~((1 << lane_count) - 1) & 0xf; 163 } 164 165 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 166 const struct intel_connector *connector, 167 const struct intel_crtc_state *pipe_config); 168 u32 intel_dp_mode_to_fec_clock(u32 mode_clock); 169 int intel_dp_bw_fec_overhead(bool fec_enabled); 170 171 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 172 const struct intel_connector *connector, 173 const struct intel_crtc_state *pipe_config); 174 175 bool intel_dp_supports_dsc(struct intel_dp *intel_dp, 176 const struct intel_connector *connector, 177 const struct intel_crtc_state *crtc_state); 178 179 void intel_ddi_update_pipe(struct intel_atomic_state *state, 180 struct intel_encoder *encoder, 181 const struct intel_crtc_state *crtc_state, 182 const struct drm_connector_state *conn_state); 183 184 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder, 185 struct intel_crtc_state *crtc_state); 186 void intel_dp_sync_state(struct intel_encoder *encoder, 187 const struct intel_crtc_state *crtc_state); 188 189 void intel_dp_check_frl_training(struct intel_dp *intel_dp); 190 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, 191 const struct intel_crtc_state *crtc_state); 192 193 void intel_dp_invalidate_source_oui(struct intel_dp *intel_dp); 194 void intel_dp_wait_source_oui(struct intel_dp *intel_dp); 195 int intel_dp_output_format_link_bpp_x16(enum intel_output_format output_format, 196 int pipe_bpp); 197 198 bool intel_dp_compute_config_limits(struct intel_dp *intel_dp, 199 struct drm_connector_state *conn_state, 200 struct intel_crtc_state *crtc_state, 201 bool respect_downstream_limits, 202 bool dsc, 203 struct link_config_limits *limits); 204 205 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, 206 const struct drm_dp_desc *desc, bool is_branch, 207 struct intel_connector *connector); 208 bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder); 209 210 bool intel_dp_has_connector(struct intel_dp *intel_dp, 211 const struct drm_connector_state *conn_state); 212 int intel_dp_dsc_max_src_input_bpc(struct intel_display *display); 213 int intel_dp_dsc_min_src_input_bpc(void); 214 int intel_dp_dsc_min_src_compressed_bpp(void); 215 int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state, 216 const struct drm_connector_state *conn_state); 217 218 int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector); 219 void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external); 220 bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state); 221 int intel_dp_compute_config_late(struct intel_encoder *encoder, 222 struct intel_crtc_state *crtc_state, 223 struct drm_connector_state *conn_state); 224 int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state, 225 bool assume_all_enabled); 226 int intel_dp_max_hdisplay_per_pipe(struct intel_display *display); 227 bool intel_dp_dotclk_valid(struct intel_display *display, 228 int target_clock, 229 int htotal, 230 int dsc_slice_count, 231 int num_joined_pipes); 232 bool intel_dp_joiner_candidate_valid(struct intel_connector *connector, 233 int hdisplay, 234 int num_joined_pipes); 235 236 #define for_each_joiner_candidate(__connector, __mode, __num_joined_pipes) \ 237 for ((__num_joined_pipes) = 1; (__num_joined_pipes) <= (I915_MAX_PIPES); (__num_joined_pipes)++) \ 238 for_each_if(intel_dp_joiner_candidate_valid(__connector, (__mode)->hdisplay, __num_joined_pipes)) 239 240 u8 intel_dp_as_sdp_transmission_time(void); 241 242 int intel_dp_link_init(struct intel_dp *intel_dp); 243 void intel_dp_link_cleanup(struct intel_dp *intel_dp); 244 245 #endif /* __INTEL_DP_H__ */ 246