1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 */ 24 25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 27 28 #include "core_types.h" 29 #include "core_status.h" 30 #include "dal_asic_id.h" 31 #include "dm_pp_smu.h" 32 33 #define MEMORY_TYPE_MULTIPLIER_CZ 4 34 #define MEMORY_TYPE_HBM 2 35 #define MAX_MCACHES 8 36 37 38 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0) 39 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F) 40 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd)) 41 42 enum dce_version resource_parse_asic_id( 43 struct hw_asic_id asic_id); 44 45 struct resource_caps { 46 int num_timing_generator; 47 int num_opp; 48 int num_dpp; 49 int num_video_plane; 50 int num_audio; 51 int num_stream_encoder; 52 int num_analog_stream_encoder; 53 int num_pll; 54 int num_dwb; 55 int num_ddc; 56 int num_vmid; 57 int num_dsc; 58 unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output). 59 unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters). 60 int num_hpo_frl; 61 int num_hpo_dp_stream_encoder; 62 int num_hpo_dp_link_encoder; 63 int num_mpc_3dlut; 64 int num_mpc; 65 int num_rmcm; 66 int num_aux; 67 }; 68 69 struct resource_straps { 70 uint32_t hdmi_disable; 71 uint32_t dc_pinstraps_audio; 72 uint32_t audio_stream_number; 73 }; 74 75 struct dc_mcache_allocations { 76 int global_mcache_ids_plane0[MAX_MCACHES + 1]; 77 int global_mcache_ids_plane1[MAX_MCACHES + 1]; 78 int global_mcache_ids_mall_plane0[MAX_MCACHES + 1]; 79 int global_mcache_ids_mall_plane1[MAX_MCACHES + 1]; 80 }; 81 82 struct resource_create_funcs { 83 void (*read_dce_straps)( 84 struct dc_context *ctx, struct resource_straps *straps); 85 86 struct audio *(*create_audio)( 87 struct dc_context *ctx, unsigned int inst); 88 89 struct stream_encoder *(*create_stream_encoder)( 90 enum engine_id eng_id, struct dc_context *ctx); 91 92 struct hpo_frl_stream_encoder *(*create_hpo_frl_stream_encoder)( 93 enum engine_id eng_id, struct dc_context *ctx); 94 struct hpo_frl_link_encoder *(*create_hpo_frl_link_encoder)( 95 enum engine_id eng_id, struct dc_context *ctx); 96 struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)( 97 enum engine_id eng_id, struct dc_context *ctx); 98 struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)( 99 uint8_t inst, 100 struct dc_context *ctx); 101 struct dce_hwseq *(*create_hwseq)( 102 struct dc_context *ctx); 103 }; 104 105 bool resource_construct( 106 unsigned int num_virtual_links, 107 struct dc *dc, 108 struct resource_pool *pool, 109 const struct resource_create_funcs *create_funcs); 110 111 struct resource_pool *dc_create_resource_pool(struct dc *dc, 112 const struct dc_init_data *init_data, 113 enum dce_version dc_version); 114 115 void dc_destroy_resource_pool(struct dc *dc); 116 117 enum dc_status resource_map_pool_resources( 118 const struct dc *dc, 119 struct dc_state *context, 120 struct dc_stream_state *stream); 121 122 void resource_build_test_pattern_params( 123 struct resource_context *res_ctx, 124 struct pipe_ctx *pipe_ctx); 125 126 enum upsp_mode resource_is_upsp_required(enum surface_pixel_format format); 127 128 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx); 129 130 enum dc_status resource_build_scaling_params_for_context( 131 const struct dc *dc, 132 struct dc_state *context); 133 134 void resource_build_info_frame(struct pipe_ctx *pipe_ctx); 135 136 void resource_unreference_clock_source( 137 struct resource_context *res_ctx, 138 const struct resource_pool *pool, 139 struct clock_source *clock_source); 140 141 void resource_reference_clock_source( 142 struct resource_context *res_ctx, 143 const struct resource_pool *pool, 144 struct clock_source *clock_source); 145 146 int resource_get_clock_source_reference( 147 struct resource_context *res_ctx, 148 const struct resource_pool *pool, 149 struct clock_source *clock_source); 150 151 bool resource_are_streams_timing_synchronizable( 152 struct dc_stream_state *stream1, 153 struct dc_stream_state *stream2); 154 155 bool resource_are_vblanks_synchronizable( 156 struct dc_stream_state *stream1, 157 struct dc_stream_state *stream2); 158 159 struct clock_source *resource_find_used_clk_src_for_sharing( 160 struct resource_context *res_ctx, 161 struct pipe_ctx *pipe_ctx); 162 163 struct clock_source *dc_resource_find_first_free_pll( 164 struct resource_context *res_ctx, 165 const struct resource_pool *pool); 166 167 bool resource_attach_surfaces_to_context( 168 struct dc_plane_state *const *plane_state, 169 int surface_count, 170 struct dc_stream_state *dc_stream, 171 struct dc_state *context, 172 const struct resource_pool *pool); 173 174 bool resource_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx); 175 176 #define FREE_PIPE_INDEX_NOT_FOUND -1 177 178 /* 179 * pipe types are identified based on MUXes in DCN front end that are capable 180 * of taking input from one DCN pipeline to another DCN pipeline. The name is 181 * in a form of XXXX_YYYY, where XXXX is the DCN front end hardware block the 182 * pipeline ends with and YYYY is the rendering role that the pipe is in. 183 * 184 * For instance OTG_MASTER is a pipe ending with OTG hardware block in its 185 * pipeline and it is in a role of a master pipe for timing generation. 186 * 187 * For quick reference a diagram of each pipe type's areas of responsibility 188 * for outputting timings on the screen is shown below: 189 * 190 * Timing Active for Stream 0 191 * __________________________________________________ 192 * |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) | 193 * | (DPP pipe 0)| | 194 * | Top Plane 0 | | 195 * | ______________|____ | 196 * | |DPP pipe 1 |DPP | | 197 * | | |pipe| | 198 * | | Bottom |3 | | 199 * | | Plane 1 | | | 200 * | | | | | 201 * | |______________|____| | 202 * | | | 203 * | | | 204 * | ODM slice 0 | ODM slice 1 | 205 * |_________________________|________________________| 206 * 207 * Timing Active for Stream 1 208 * __________________________________________________ 209 * |OTG master 4 (OPP head 4) | 210 * | | 211 * | | 212 * | | 213 * | | 214 * | | 215 * | Blank Pixel Data | 216 * | (generated by DPG4) | 217 * | | 218 * | | 219 * | | 220 * | | 221 * | | 222 * |__________________________________________________| 223 * 224 * Inter-pipe Relation 225 * __________________________________________________ 226 * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | 227 * | | plane 0 | slice 0 | | 228 * | 0 | -------------MPC---------ODM----------- | 229 * | | plane 1 | | | | | 230 * | 1 | ------------- | | | | 231 * | | plane 0 | slice 1 | | | 232 * | 2 | -------------MPC--------- | | 233 * | | plane 1 | | | | 234 * | 3 | ------------- | | | 235 * | | | blank | | 236 * | 4 | | ----------------------- | 237 * | | | | | 238 * | 5 | (FREE) | | | 239 * |________|_______________|___________|_____________| 240 * 241 * The following is a quick reference of the class relation: 242 * 243 * DC state ---1--------0..N--- streams 244 * 245 * stream ---1-----------1--- OTG Master pipe 246 * 247 * OTG Master pipe ---1--------1..N--- OPP Head pipes 248 * 249 * OPP Head pipe ---1--------0..N--- DPP pipes 250 * 251 * stream ---1--------0..N--- Planes 252 * 253 * Plane ---1--------1..N--- DPP pipes 254 * 255 */ 256 enum pipe_type { 257 /* free pipe - free pipe is an uninitialized pipe without a stream 258 * associated with it. It is a free DCN pipe resource. It can be 259 * acquired as any type of pipe. 260 */ 261 FREE_PIPE, 262 263 /* OTG master pipe - the master pipe of its OPP head pipes with a 264 * functional OTG. It merges all its OPP head pipes pixel data in ODM 265 * block and output to back end DIG. OTG master pipe is responsible for 266 * generating entire CRTC timing to back end DIG. An OTG master pipe may 267 * or may not have a plane. If it has a plane it blends it as the left 268 * most MPC slice of the top most layer. If it doesn't have a plane it 269 * can output pixel data from its OPP head pipes' test pattern 270 * generators (DPG) such as solid black pixel data to blank the screen. 271 */ 272 OTG_MASTER, 273 274 /* OPP head pipe - the head pipe of an MPC blending tree with a 275 * functional OPP outputting to an OTG. OPP head pipe is responsible for 276 * processing output pixels in its own ODM slice. It may or may not have 277 * a plane. If it has a plane it blends it as the top most layer within 278 * its own ODM slice. If it doesn't have a plane it can output pixel 279 * data from its DPG such as solid black pixel data to blank the pixel 280 * data in its own ODM slice. OTG master pipe is also an OPP head pipe 281 * but with more responsibility. 282 */ 283 OPP_HEAD, 284 285 /* DPP pipe - the pipe with a functional DPP outputting to an OPP head 286 * pipe's MPC. DPP pipe is responsible for processing pixel data from 287 * its own MPC slice of a plane. It must be connected to an OPP head 288 * pipe and it must have a plane associated with it. 289 */ 290 DPP_PIPE, 291 }; 292 293 /* 294 * Determine if the input pipe_ctx is of a pipe type. 295 * return - true if pipe_ctx is of the input type. 296 */ 297 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type); 298 299 /* 300 * Acquire a pipe as OTG master pipe and allocate pipe resources required to 301 * enable stream output. 302 */ 303 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx, 304 const struct resource_pool *pool, 305 struct dc_stream_state *stream); 306 307 /* 308 * Release pipe resources and the OTG master pipe associated with the stream 309 * The stream must have all planes removed and ODM/MPC slice counts are reset 310 * to 1 before invoking this interface. 311 */ 312 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx, 313 const struct resource_pool *pool, 314 struct dc_stream_state *stream); 315 316 /* 317 * Add plane to the bottom most layer in plane composition and allocate DPP pipe 318 * resources as needed. 319 * return - true if plane is added in plane composition, false otherwise. 320 */ 321 bool resource_append_dpp_pipes_for_plane_composition( 322 struct dc_state *new_ctx, 323 struct dc_state *cur_ctx, 324 struct resource_pool *pool, 325 struct pipe_ctx *otg_master_pipe, 326 struct dc_plane_state *plane_state); 327 328 /* 329 * Add plane to the bottom most layer in plane composition and allocate DPP pipe 330 * resources as needed. 331 * return - true if plane is added in plane composition, false otherwise. 332 */ 333 void resource_remove_dpp_pipes_for_plane_composition( 334 struct dc_state *context, 335 const struct resource_pool *pool, 336 const struct dc_plane_state *plane_state); 337 338 /* 339 * Update ODM slice count by acquiring or releasing pipes. If new slices need 340 * to be added, it is going to add them to the last ODM index. If existing 341 * slices need to be removed, it is going to remove them from the last ODM 342 * index. 343 * 344 * return - true if ODM slices are updated and required pipes are acquired. All 345 * affected pipe parameters are updated. 346 * 347 * false if resource fails to complete this update. The function is not designed 348 * to recover the creation of invalid topologies. Returning false is typically 349 * an indication of insufficient validation in caller's stack. new_ctx will be 350 * invalid. Caller may attempt to restore new_ctx by calling this function 351 * again with original slice count. 352 */ 353 bool resource_update_pipes_for_stream_with_slice_count( 354 struct dc_state *new_ctx, 355 const struct dc_state *cur_ctx, 356 const struct resource_pool *pool, 357 const struct dc_stream_state *stream, 358 int new_slice_count); 359 360 /* 361 * Update MPC slice count by acquiring or releasing DPP pipes. If new slices 362 * need to be added it is going to add to the last MPC index. If existing 363 * slices need to be removed, it is going to remove them from the last MPC 364 * index. 365 * 366 * @dpp_pipe - top most dpp pipe for MPCC combine. 367 * 368 * return - true if MPC slices are updated and required pipes are acquired. All 369 * affected pipe parameters are updated. 370 * 371 * false if resource fails to complete this update. The function is not designed 372 * to recover the creation of invalid topologies. Returning false is typically 373 * an indication of insufficient validation in caller's stack. new_ctx will be 374 * invalid. Caller may attempt to restore new_ctx by calling this function 375 * again with original slice count. 376 */ 377 bool resource_update_pipes_for_plane_with_slice_count( 378 struct dc_state *new_ctx, 379 const struct dc_state *cur_ctx, 380 const struct resource_pool *pool, 381 const struct dc_plane_state *plane, 382 int slice_count); 383 384 /* 385 * Get the OTG master pipe in resource context associated with the stream. 386 * return - NULL if not found. Otherwise the OTG master pipe associated with the 387 * stream. 388 */ 389 struct pipe_ctx *resource_get_otg_master_for_stream( 390 struct resource_context *res_ctx, 391 const struct dc_stream_state *stream); 392 393 /* 394 * Get an array of OPP heads in opp_heads ordered with index low to high for OTG 395 * master pipe in res_ctx. 396 * return - number of OPP heads in the array. If otg_master passed in is not 397 * an OTG master, the function returns 0. 398 */ 399 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master, 400 struct resource_context *res_ctx, 401 struct pipe_ctx *opp_heads[MAX_PIPES]); 402 403 /* 404 * Get an array of DPP pipes in dpp_pipes ordered with index low to high for OPP 405 * head pipe in res_ctx. 406 * return - number of DPP pipes in the array. If opp_head passed in is not 407 * an OPP pipe, the function returns 0. 408 */ 409 int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head, 410 struct resource_context *res_ctx, 411 struct pipe_ctx *dpp_pipes[MAX_PIPES]); 412 413 /* 414 * Get an array of DPP pipes in dpp_pipes ordered with index low to high for 415 * plane in res_ctx. 416 * return - number of DPP pipes in the array. 417 */ 418 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane, 419 struct resource_context *res_ctx, 420 struct pipe_ctx *dpp_pipes[MAX_PIPES]); 421 422 /* 423 * Get the OTG master pipe for the input pipe context. 424 * return - the OTG master pipe for the input pipe 425 * context. 426 */ 427 struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx); 428 429 /* 430 * Get the OPP head pipe for the input pipe context. 431 * return - the OPP head pipe for the input pipe 432 * context. 433 */ 434 struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx); 435 436 /* 437 * Get the DPP pipe allocated for MPC slice 0 and ODM slice 0 of the plane 438 * associated with dpp_pipe. 439 */ 440 struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe); 441 442 /* 443 * Get the MPC slice index counting from 0 from left most slice 444 * For example, if a DPP pipe is used as a secondary pipe in MPCC combine, MPC 445 * split index is greater than 0. 446 */ 447 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe); 448 449 /* 450 * Get the number of MPC slices associated with the pipe. 451 * The function returns 0 if the pipe is not associated with an MPC combine 452 * pipe topology. 453 */ 454 int resource_get_mpc_slice_count(const struct pipe_ctx *pipe); 455 456 /* 457 * Get the number of ODM slices associated with the pipe. 458 * The function returns 0 if the pipe is not associated with an ODM combine 459 * pipe topology. 460 */ 461 int resource_get_odm_slice_count(const struct pipe_ctx *pipe); 462 463 /* Get the ODM slice index counting from 0 from left most slice */ 464 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head); 465 466 /* Get ODM slice source rect in timing active as input to OPP block */ 467 struct rect resource_get_odm_slice_src_rect(struct pipe_ctx *pipe_ctx); 468 469 /* Get ODM slice destination rect in timing active as output from OPP block */ 470 struct rect resource_get_odm_slice_dst_rect(struct pipe_ctx *pipe_ctx); 471 472 /* Get ODM slice destination width in timing active as output from OPP block */ 473 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master, 474 bool is_last_segment); 475 476 /* determine if pipe topology is changed between state a and state b */ 477 bool resource_is_pipe_topology_changed(const struct dc_state *state_a, 478 const struct dc_state *state_b); 479 480 /* 481 * determine if the two OTG master pipes have the same ODM topology 482 * return 483 * false - if pipes passed in are not OTG masters or ODM topology is 484 * changed. 485 * true - otherwise 486 */ 487 bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a, 488 const struct pipe_ctx *otg_master_b); 489 490 /* log the pipe topology update in state */ 491 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state); 492 493 /* 494 * Look for a free pipe in new resource context that is used as a secondary OPP 495 * head by cur_otg_master. 496 * 497 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 498 * pipe idx of the free pipe 499 */ 500 int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master( 501 const struct resource_context *cur_res_ctx, 502 struct resource_context *new_res_ctx, 503 const struct pipe_ctx *cur_otg_master); 504 505 /* 506 * Look for a free pipe in new resource context that is used as a secondary DPP 507 * pipe in MPC blending tree associated with input OPP head pipe. 508 * 509 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 510 * pipe idx of the free pipe 511 */ 512 int resource_find_free_pipe_used_in_cur_mpc_blending_tree( 513 const struct resource_context *cur_res_ctx, 514 struct resource_context *new_res_ctx, 515 const struct pipe_ctx *cur_opp_head); 516 517 /* 518 * Look for a free pipe in new resource context that is not used in current 519 * resource context. 520 * 521 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 522 * pipe idx of the free pipe 523 */ 524 int recource_find_free_pipe_not_used_in_cur_res_ctx( 525 const struct resource_context *cur_res_ctx, 526 struct resource_context *new_res_ctx, 527 const struct resource_pool *pool); 528 529 /* 530 * Look for a free pipe in new resource context that is used in current resource 531 * context as an OTG master pipe. 532 * 533 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 534 * pipe idx of the free pipe 535 */ 536 int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx( 537 const struct resource_context *cur_res_ctx, 538 struct resource_context *new_res_ctx, 539 const struct resource_pool *pool); 540 541 /* 542 * Look for a free pipe in new resource context that is used as a secondary DPP 543 * pipe in current resource context. 544 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 545 * pipe idx of the free pipe 546 */ 547 int resource_find_free_pipe_used_as_cur_sec_dpp( 548 const struct resource_context *cur_res_ctx, 549 struct resource_context *new_res_ctx, 550 const struct resource_pool *pool); 551 552 /* 553 * Look for a free pipe in new resource context that is used as a secondary DPP 554 * pipe in any MPCC combine in current resource context. 555 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 556 * pipe idx of the free pipe 557 */ 558 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( 559 const struct resource_context *cur_res_ctx, 560 struct resource_context *new_res_ctx, 561 const struct resource_pool *pool); 562 563 /* 564 * Look for any free pipe in new resource context. 565 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 566 * pipe idx of the free pipe 567 */ 568 int resource_find_any_free_pipe(struct resource_context *new_res_ctx, 569 const struct resource_pool *pool); 570 571 /* 572 * Legacy find free secondary pipe logic deprecated for newer DCNs as it doesn't 573 * find the most optimal free pipe to prevent from time consuming hardware state 574 * transitions. 575 */ 576 struct pipe_ctx *resource_find_free_secondary_pipe_legacy( 577 struct resource_context *res_ctx, 578 const struct resource_pool *pool, 579 const struct pipe_ctx *primary_pipe); 580 581 bool resource_validate_attach_surfaces( 582 const struct dc_validation_set *set, 583 const struct dc_state *old_context, 584 struct dc_state *context, 585 const struct resource_pool *pool); 586 587 enum dc_status resource_validate_probe_set(struct dc *dc, 588 const struct dc_probe_state *probes, 589 uint8_t probe_count); 590 591 enum dc_status resource_map_clock_resources( 592 const struct dc *dc, 593 struct dc_state *context, 594 struct dc_stream_state *stream); 595 596 enum dc_status resource_map_phy_clock_resources( 597 const struct dc *dc, 598 struct dc_state *context, 599 struct dc_stream_state *stream); 600 601 bool pipe_need_reprogram( 602 struct pipe_ctx *pipe_ctx_old, 603 struct pipe_ctx *pipe_ctx); 604 605 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream, 606 struct bit_depth_reduction_params *fmt_bit_depth); 607 608 void update_audio_usage( 609 struct resource_context *res_ctx, 610 const struct resource_pool *pool, 611 struct audio *audio, 612 bool acquired); 613 614 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format); 615 616 bool get_temp_dp_link_res(struct dc_link *link, 617 struct link_resource *link_res, 618 struct dc_link_settings *link_settings); 619 bool get_temp_frl_link_res(struct dc_link *link, 620 struct link_resource *link_res); 621 622 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc, 623 struct dc_state *context); 624 625 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc, 626 struct dc_state *context, 627 uint8_t disabled_master_pipe_idx); 628 629 void reset_sync_context_for_pipe(const struct dc *dc, 630 struct dc_state *context, 631 uint8_t pipe_idx); 632 633 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter); 634 635 const struct link_hwss *get_link_hwss(const struct dc_link *link, 636 const struct link_resource *link_res); 637 638 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream); 639 640 bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy( 641 const struct dc *dc, 642 struct dc_state *state, 643 struct pipe_ctx *pri_pipe, 644 struct pipe_ctx *sec_pipe, 645 bool odm); 646 647 /* A test harness interface that modifies dp encoder resources in the given dc 648 * state and bypasses the need to revalidate. The interface assumes that the 649 * test harness interface is called with pre-validated link config stored in the 650 * pipe_ctx and updates dp encoder resources according to the link config. 651 */ 652 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc, 653 struct dc_state *context, 654 struct pipe_ctx *pipe_ctx); 655 656 /* Get hw programming parameters container from pipe context 657 * @pipe_ctx: pipe context 658 * @dscl_prog_data: struct to hold programmable hw reg values 659 */ 660 struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx); 661 /* Setup dc callbacks for dml2 662 * @dc: the display core structure 663 * @dml2_options: struct to hold callbacks 664 */ 665 void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options); 666 667 /* 668 *Calculate total DET allocated for all pipes for a given OTG_MASTER pipe 669 */ 670 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master); 671 672 bool resource_is_hpo_acquired(struct dc_state *context); 673 674 struct link_encoder *get_temp_dio_link_enc( 675 const struct resource_context *res_ctx, 676 const struct resource_pool *const pool, 677 const struct dc_link *link); 678 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */ 679