xref: /linux/drivers/mtd/nand/spi/foresee.c (revision ff124bbbca1d3a07fa1392ffdbbdeece71f68ece)
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (c) 2023, SberDevices. All Rights Reserved.
4  *
5  * Author: Martin Kurbanov <mmkurbanov@salutedevices.com>
6  */
7 
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/mtd/spinand.h>
11 
12 #define SPINAND_MFR_FORESEE		0xCD
13 
14 #define F35SQB002G_STATUS_ECC_MASK		(7 << 4)
15 #define F35SQB002G_STATUS_ECC_NO_BITFLIPS	(0 << 4)
16 #define F35SQB002G_STATUS_ECC_1_3_BITFLIPS	(1 << 4)
17 #define F35SQB002G_STATUS_ECC_UNCOR_ERROR	(7 << 4)
18 
19 static SPINAND_OP_VARIANTS(read_cache_variants,
20 		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
21 		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_2S_OP(0, 1, NULL, 0, 0),
22 		SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
23 		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
24 
25 static SPINAND_OP_VARIANTS(write_cache_variants,
26 		SPINAND_PROG_LOAD_1S_1S_4S_OP(true, 0, NULL, 0),
27 		SPINAND_PROG_LOAD_1S_1S_1S_OP(true, 0, NULL, 0));
28 
29 static SPINAND_OP_VARIANTS(update_cache_variants,
30 		SPINAND_PROG_LOAD_1S_1S_4S_OP(false, 0, NULL, 0),
31 		SPINAND_PROG_LOAD_1S_1S_1S_OP(false, 0, NULL, 0));
32 
33 static int f35sqa002g_ooblayout_ecc(struct mtd_info *mtd, int section,
34 				    struct mtd_oob_region *region)
35 {
36 	return -ERANGE;
37 }
38 
39 static int f35sqa002g_ooblayout_free(struct mtd_info *mtd, int section,
40 				     struct mtd_oob_region *region)
41 {
42 	if (section)
43 		return -ERANGE;
44 
45 	/* Reserve 2 bytes for the BBM. */
46 	region->offset = 2;
47 	region->length = 62;
48 
49 	return 0;
50 }
51 
52 static const struct mtd_ooblayout_ops f35sqa002g_ooblayout = {
53 	.ecc = f35sqa002g_ooblayout_ecc,
54 	.free = f35sqa002g_ooblayout_free,
55 };
56 
57 static int f35sqa002g_ecc_get_status(struct spinand_device *spinand, u8 status)
58 {
59 	struct nand_device *nand = spinand_to_nand(spinand);
60 
61 	switch (status & STATUS_ECC_MASK) {
62 	case STATUS_ECC_NO_BITFLIPS:
63 		return 0;
64 
65 	case STATUS_ECC_HAS_BITFLIPS:
66 		return nanddev_get_ecc_conf(nand)->strength;
67 
68 	default:
69 		break;
70 	}
71 
72 	/* More than 1-bit error was detected in one or more sectors and
73 	 * cannot be corrected.
74 	 */
75 	return -EBADMSG;
76 }
77 
78 static int f35sqb002g_ecc_get_status(struct spinand_device *spinand, u8 status)
79 {
80 	switch (status & F35SQB002G_STATUS_ECC_MASK) {
81 	case F35SQB002G_STATUS_ECC_NO_BITFLIPS:
82 		return 0;
83 
84 	case F35SQB002G_STATUS_ECC_1_3_BITFLIPS:
85 		return 3;
86 
87 	case F35SQB002G_STATUS_ECC_UNCOR_ERROR:
88 		return -EBADMSG;
89 
90 	default: /* (2 << 4) through (6 << 4) are 4-8 corrected errors */
91 		return ((status & F35SQB002G_STATUS_ECC_MASK) >> 4) + 2;
92 	}
93 
94 	return -EINVAL;
95 }
96 
97 static const struct spinand_info foresee_spinand_table[] = {
98 	SPINAND_INFO("F35SQA002G",
99 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72, 0x72),
100 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
101 		     NAND_ECCREQ(1, 512),
102 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
103 					      &write_cache_variants,
104 					      &update_cache_variants),
105 		     SPINAND_HAS_QE_BIT,
106 		     SPINAND_ECCINFO(&f35sqa002g_ooblayout,
107 				     f35sqa002g_ecc_get_status)),
108 	SPINAND_INFO("F35SQA001G",
109 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71, 0x71),
110 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
111 		     NAND_ECCREQ(1, 512),
112 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
113 					      &write_cache_variants,
114 					      &update_cache_variants),
115 		     SPINAND_HAS_QE_BIT,
116 		     SPINAND_ECCINFO(&f35sqa002g_ooblayout,
117 				     f35sqa002g_ecc_get_status)),
118 	SPINAND_INFO("F35SQB002G",
119 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52, 0x52),
120 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
121 		     NAND_ECCREQ(8, 512),
122 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
123 					      &write_cache_variants,
124 					      &update_cache_variants),
125 		     SPINAND_HAS_QE_BIT,
126 		     SPINAND_ECCINFO(&f35sqa002g_ooblayout,
127 				     f35sqb002g_ecc_get_status)),
128 };
129 
130 static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {
131 };
132 
133 const struct spinand_manufacturer foresee_spinand_manufacturer = {
134 	.id = SPINAND_MFR_FORESEE,
135 	.name = "FORESEE",
136 	.chips = foresee_spinand_table,
137 	.nchips = ARRAY_SIZE(foresee_spinand_table),
138 	.ops = &foresee_spinand_manuf_ops,
139 };
140