1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Intel Xe I2C attached Microcontroller Units (MCU) 4 * 5 * Copyright (C) 2025 Intel Corporation. 6 */ 7 8 #include <drm/drm_print.h> 9 #include <linux/array_size.h> 10 #include <linux/container_of.h> 11 #include <linux/device.h> 12 #include <linux/err.h> 13 #include <linux/i2c.h> 14 #include <linux/ioport.h> 15 #include <linux/irq.h> 16 #include <linux/irqdomain.h> 17 #include <linux/notifier.h> 18 #include <linux/pci.h> 19 #include <linux/platform_device.h> 20 #include <linux/property.h> 21 #include <linux/regmap.h> 22 #include <linux/sprintf.h> 23 #include <linux/string.h> 24 #include <linux/types.h> 25 #include <linux/workqueue.h> 26 27 #include "regs/xe_i2c_regs.h" 28 #include "regs/xe_irq_regs.h" 29 30 #include "xe_device.h" 31 #include "xe_i2c.h" 32 #include "xe_mmio.h" 33 #include "xe_sriov.h" 34 #include "xe_survivability_mode.h" 35 36 /** 37 * DOC: Xe I2C devices 38 * 39 * Register a platform device for the I2C host controller (Synpsys DesignWare 40 * I2C) if the registers of that controller are mapped to the MMIO, and also the 41 * I2C client device for the Add-In Management Controller (the MCU) attached to 42 * the host controller. 43 * 44 * See drivers/i2c/busses/i2c-designware-* for more information on the I2C host 45 * controller. 46 */ 47 48 static const char adapter_name[] = "i2c_designware"; 49 50 static const struct property_entry xe_i2c_adapter_properties[] = { 51 PROPERTY_ENTRY_STRING("compatible", "intel,xe-i2c"), 52 PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_FAST_MODE_PLUS_FREQ), 53 { } 54 }; 55 56 static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep) 57 { 58 u32 *val = ep; 59 60 val[0] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_PREFIX); 61 val[1] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_POSTFIX); 62 } 63 64 static void xe_i2c_client_work(struct work_struct *work) 65 { 66 struct xe_i2c *i2c = container_of(work, struct xe_i2c, work); 67 struct i2c_board_info info = { 68 .type = "amc", 69 .flags = I2C_CLIENT_HOST_NOTIFY, 70 .addr = i2c->ep.addr[1], 71 }; 72 73 i2c->client[0] = i2c_new_client_device(i2c->adapter, &info); 74 } 75 76 static int xe_i2c_notifier(struct notifier_block *nb, unsigned long action, void *data) 77 { 78 struct xe_i2c *i2c = container_of(nb, struct xe_i2c, bus_notifier); 79 struct i2c_adapter *adapter = i2c_verify_adapter(data); 80 struct device *dev = data; 81 82 if (action == BUS_NOTIFY_ADD_DEVICE && 83 adapter && dev->parent == &i2c->pdev->dev) { 84 i2c->adapter = adapter; 85 schedule_work(&i2c->work); 86 return NOTIFY_OK; 87 } 88 89 return NOTIFY_DONE; 90 } 91 92 static int xe_i2c_register_adapter(struct xe_i2c *i2c) 93 { 94 struct pci_dev *pci = to_pci_dev(i2c->drm_dev); 95 struct platform_device *pdev; 96 struct fwnode_handle *fwnode; 97 int ret; 98 99 fwnode = fwnode_create_software_node(xe_i2c_adapter_properties, NULL); 100 if (IS_ERR(fwnode)) 101 return PTR_ERR(fwnode); 102 103 /* 104 * Not using platform_device_register_full() here because we don't have 105 * a handle to the platform_device before it returns. xe_i2c_notifier() 106 * uses that handle, but it may be called before 107 * platform_device_register_full() is done. 108 */ 109 pdev = platform_device_alloc(adapter_name, pci_dev_id(pci)); 110 if (!pdev) { 111 ret = -ENOMEM; 112 goto err_fwnode_remove; 113 } 114 115 if (i2c->adapter_irq) { 116 struct resource res; 117 118 res = DEFINE_RES_IRQ_NAMED(i2c->adapter_irq, "xe_i2c"); 119 120 ret = platform_device_add_resources(pdev, &res, 1); 121 if (ret) 122 goto err_pdev_put; 123 } 124 125 pdev->dev.parent = i2c->drm_dev; 126 pdev->dev.fwnode = fwnode; 127 i2c->adapter_node = fwnode; 128 i2c->pdev = pdev; 129 130 ret = platform_device_add(pdev); 131 if (ret) 132 goto err_pdev_put; 133 134 return 0; 135 136 err_pdev_put: 137 platform_device_put(pdev); 138 err_fwnode_remove: 139 fwnode_remove_software_node(fwnode); 140 141 return ret; 142 } 143 144 static void xe_i2c_unregister_adapter(struct xe_i2c *i2c) 145 { 146 platform_device_unregister(i2c->pdev); 147 fwnode_remove_software_node(i2c->adapter_node); 148 } 149 150 /** 151 * xe_i2c_present - I2C controller is present and functional 152 * @xe: xe device instance 153 * 154 * Check whether the I2C controller is present and functioning with valid 155 * endpoint cookie. 156 * 157 * Return: %true if present, %false otherwise. 158 */ 159 bool xe_i2c_present(struct xe_device *xe) 160 { 161 return xe->i2c && xe->i2c->ep.cookie == XE_I2C_EP_COOKIE_DEVICE; 162 } 163 164 static bool xe_i2c_irq_present(struct xe_device *xe) 165 { 166 return xe->i2c && xe->i2c->adapter_irq; 167 } 168 169 /** 170 * xe_i2c_irq_handler: Handler for I2C interrupts 171 * @xe: xe device instance 172 * @master_ctl: interrupt register 173 * 174 * Forward interrupts generated by the I2C host adapter to the I2C host adapter 175 * driver. 176 */ 177 void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl) 178 { 179 struct xe_mmio *mmio = xe_root_tile_mmio(xe); 180 181 if (!(master_ctl & I2C_IRQ) || !xe_i2c_irq_present(xe)) 182 return; 183 184 /* Forward interrupt to I2C adapter */ 185 generic_handle_irq_safe(xe->i2c->adapter_irq); 186 187 /* Deassert after I2C adapter clears the interrupt */ 188 xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_INTX_DISABLE); 189 /* Reassert to allow subsequent interrupt generation */ 190 xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, PCI_COMMAND_INTX_DISABLE, 0); 191 } 192 193 void xe_i2c_irq_reset(struct xe_device *xe) 194 { 195 struct xe_mmio *mmio = xe_root_tile_mmio(xe); 196 197 if (!xe_i2c_irq_present(xe)) 198 return; 199 200 xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_INTX_DISABLE); 201 xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, ACPI_INTR_EN, 0); 202 } 203 204 void xe_i2c_irq_postinstall(struct xe_device *xe) 205 { 206 struct xe_mmio *mmio = xe_root_tile_mmio(xe); 207 208 if (!xe_i2c_irq_present(xe)) 209 return; 210 211 xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, 0, ACPI_INTR_EN); 212 xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, PCI_COMMAND_INTX_DISABLE, 0); 213 } 214 215 static int xe_i2c_irq_map(struct irq_domain *h, unsigned int virq, 216 irq_hw_number_t hw_irq_num) 217 { 218 irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq); 219 return 0; 220 } 221 222 static const struct irq_domain_ops xe_i2c_irq_ops = { 223 .map = xe_i2c_irq_map, 224 }; 225 226 static int xe_i2c_create_irq(struct xe_device *xe) 227 { 228 struct xe_i2c *i2c = xe->i2c; 229 struct irq_domain *domain; 230 231 if (!(i2c->ep.capabilities & XE_I2C_EP_CAP_IRQ) || 232 xe_survivability_mode_is_boot_enabled(xe)) 233 return 0; 234 235 domain = irq_domain_create_linear(dev_fwnode(i2c->drm_dev), 1, &xe_i2c_irq_ops, NULL); 236 if (!domain) 237 return -ENOMEM; 238 239 i2c->adapter_irq = irq_create_mapping(domain, 0); 240 i2c->irqdomain = domain; 241 242 return 0; 243 } 244 245 static void xe_i2c_remove_irq(struct xe_i2c *i2c) 246 { 247 if (!i2c->irqdomain) 248 return; 249 250 irq_dispose_mapping(i2c->adapter_irq); 251 irq_domain_remove(i2c->irqdomain); 252 } 253 254 static int xe_i2c_read(void *context, unsigned int reg, unsigned int *val) 255 { 256 struct xe_i2c *i2c = context; 257 258 *val = xe_mmio_read32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET)); 259 260 return 0; 261 } 262 263 static int xe_i2c_write(void *context, unsigned int reg, unsigned int val) 264 { 265 struct xe_i2c *i2c = context; 266 267 xe_mmio_write32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET), val); 268 269 return 0; 270 } 271 272 static const struct regmap_config i2c_regmap_config = { 273 .reg_bits = 32, 274 .val_bits = 32, 275 .reg_read = xe_i2c_read, 276 .reg_write = xe_i2c_write, 277 .fast_io = true, 278 }; 279 280 void xe_i2c_pm_suspend(struct xe_device *xe) 281 { 282 struct xe_mmio *mmio = xe_root_tile_mmio(xe); 283 284 if (!xe_i2c_present(xe)) 285 return; 286 287 xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot); 288 drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR)); 289 } 290 291 void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold) 292 { 293 struct xe_mmio *mmio = xe_root_tile_mmio(xe); 294 295 if (!xe_i2c_present(xe)) 296 return; 297 298 if (d3cold) 299 xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); 300 301 xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0); 302 drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR)); 303 } 304 305 static void xe_i2c_remove(void *data) 306 { 307 struct xe_i2c *i2c = data; 308 unsigned int i; 309 310 for (i = 0; i < XE_I2C_MAX_CLIENTS; i++) 311 i2c_unregister_device(i2c->client[i]); 312 313 bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier); 314 xe_i2c_unregister_adapter(i2c); 315 xe_i2c_remove_irq(i2c); 316 } 317 318 /** 319 * xe_i2c_probe: Probe the I2C host adapter and the I2C clients attached to it 320 * @xe: xe device instance 321 * 322 * Register all the I2C devices described in the I2C Endpoint data structure. 323 * 324 * Return: 0 on success, error code on failure 325 */ 326 int xe_i2c_probe(struct xe_device *xe) 327 { 328 struct device *drm_dev = xe->drm.dev; 329 struct xe_i2c_endpoint ep; 330 struct regmap *regmap; 331 struct xe_i2c *i2c; 332 int ret; 333 334 if (!xe->info.has_i2c) 335 return 0; 336 337 if (IS_SRIOV_VF(xe)) 338 return 0; 339 340 xe_i2c_read_endpoint(xe_root_tile_mmio(xe), &ep); 341 if (ep.cookie != XE_I2C_EP_COOKIE_DEVICE) 342 return 0; 343 344 i2c = devm_kzalloc(drm_dev, sizeof(*i2c), GFP_KERNEL); 345 if (!i2c) 346 return -ENOMEM; 347 348 INIT_WORK(&i2c->work, xe_i2c_client_work); 349 i2c->mmio = xe_root_tile_mmio(xe); 350 i2c->drm_dev = drm_dev; 351 i2c->ep = ep; 352 xe->i2c = i2c; 353 354 /* PCI PM isn't aware of this device, bring it up and match it with SGUnit state. */ 355 xe_i2c_pm_resume(xe, true); 356 357 regmap = devm_regmap_init(drm_dev, NULL, i2c, &i2c_regmap_config); 358 if (IS_ERR(regmap)) 359 return PTR_ERR(regmap); 360 361 i2c->bus_notifier.notifier_call = xe_i2c_notifier; 362 ret = bus_register_notifier(&i2c_bus_type, &i2c->bus_notifier); 363 if (ret) 364 return ret; 365 366 ret = xe_i2c_create_irq(xe); 367 if (ret) 368 goto err_unregister_notifier; 369 370 ret = xe_i2c_register_adapter(i2c); 371 if (ret) 372 goto err_remove_irq; 373 374 xe_i2c_irq_postinstall(xe); 375 return devm_add_action_or_reset(drm_dev, xe_i2c_remove, i2c); 376 377 err_remove_irq: 378 xe_i2c_remove_irq(i2c); 379 380 err_unregister_notifier: 381 bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier); 382 383 return ret; 384 } 385