1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/debugfs.h> 25 #include <linux/delay.h> 26 #include <linux/gpio/consumer.h> 27 #include <linux/iopoll.h> 28 #include <linux/module.h> 29 #include <linux/of_platform.h> 30 #include <linux/platform_device.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/regulator/consumer.h> 33 34 #include <video/display_timing.h> 35 #include <video/of_display_timing.h> 36 #include <video/videomode.h> 37 38 #include <drm/display/drm_dp_aux_bus.h> 39 #include <drm/display/drm_dp_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_device.h> 42 #include <drm/drm_edid.h> 43 #include <drm/drm_of.h> 44 #include <drm/drm_panel.h> 45 46 /** 47 * struct panel_delay - Describes delays for a simple panel. 48 */ 49 struct panel_delay { 50 /** 51 * @hpd_reliable: Time for HPD to be reliable 52 * 53 * The time (in milliseconds) that it takes after powering the panel 54 * before the HPD signal is reliable. Ideally this is 0 but some panels, 55 * board designs, or bad pulldown configs can cause a glitch here. 56 * 57 * NOTE: on some old panel data this number appears to be much too big. 58 * Presumably some old panels simply didn't have HPD hooked up and put 59 * the hpd_absent here because this field predates the 60 * hpd_absent. While that works, it's non-ideal. 61 */ 62 unsigned int hpd_reliable; 63 64 /** 65 * @hpd_absent: Time to wait if HPD isn't hooked up. 66 * 67 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 68 * 69 * This is T3-max on eDP timing diagrams or the delay from power on 70 * until HPD is guaranteed to be asserted. 71 */ 72 unsigned int hpd_absent; 73 74 /** 75 * @powered_on_to_enable: Time between panel powered on and enable. 76 * 77 * The minimum time, in milliseconds, that needs to have passed 78 * between when panel powered on and enable may begin. 79 * 80 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the 81 * power supply enabled until we can turn the backlight on and see 82 * valid data. 83 * 84 * This doesn't normally need to be set if timings are already met by 85 * prepare_to_enable or enable. 86 */ 87 unsigned int powered_on_to_enable; 88 89 /** 90 * @prepare_to_enable: Time between prepare and enable. 91 * 92 * The minimum time, in milliseconds, that needs to have passed 93 * between when prepare finished and enable may begin. If at 94 * enable time less time has passed since prepare finished, 95 * the driver waits for the remaining time. 96 * 97 * If a fixed enable delay is also specified, we'll start 98 * counting before delaying for the fixed delay. 99 * 100 * If a fixed prepare delay is also specified, we won't start 101 * counting until after the fixed delay. We can't overlap this 102 * fixed delay with the min time because the fixed delay 103 * doesn't happen at the end of the function if a HPD GPIO was 104 * specified. 105 * 106 * In other words: 107 * prepare() 108 * ... 109 * // do fixed prepare delay 110 * // wait for HPD GPIO if applicable 111 * // start counting for prepare_to_enable 112 * 113 * enable() 114 * // do fixed enable delay 115 * // enforce prepare_to_enable min time 116 * 117 * This is usually (T4+T5+T6+T8)-min on eDP timing diagrams. 118 * It is effectively the time from HPD going high till you can 119 * turn on the backlight. 120 */ 121 unsigned int prepare_to_enable; 122 123 /** 124 * @enable: Time for the panel to display a valid frame. 125 * 126 * The time (in milliseconds) that it takes for the panel to 127 * display the first valid frame after starting to receive 128 * video data. 129 * 130 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 131 * the delay after link training finishes until we can turn the 132 * backlight on and see valid data. 133 */ 134 unsigned int enable; 135 136 /** 137 * @disable: Time for the panel to turn the display off. 138 * 139 * The time (in milliseconds) that it takes for the panel to 140 * turn the display off (no content is visible). 141 * 142 * This is T9-min (delay from backlight off to end of valid video 143 * data) on eDP timing diagrams. It is not common to set. 144 */ 145 unsigned int disable; 146 147 /** 148 * @pre_unprepare: Time for the end of video data to power off. 149 * 150 * The time (in milliseconds) that it needs to have passed between 151 * the end of valid video data from source and start powering off. 152 * 153 * This is T10-min on eDP timing diagrams. It is not common to set. 154 */ 155 unsigned int pre_unprepare; 156 157 /** 158 * @unprepare: Time to power down completely. 159 * 160 * The time (in milliseconds) that it takes for the panel 161 * to power itself down completely. 162 * 163 * This time is used to prevent a future "prepare" from 164 * starting until at least this many milliseconds has passed. 165 * If at prepare time less time has passed since unprepare 166 * finished, the driver waits for the remaining time. 167 * 168 * This is T12-min on eDP timing diagrams. 169 */ 170 unsigned int unprepare; 171 }; 172 173 /** 174 * struct panel_desc - Describes a simple panel. 175 */ 176 struct panel_desc { 177 /** 178 * @modes: Pointer to array of fixed modes appropriate for this panel. 179 * 180 * If only one mode then this can just be the address of the mode. 181 * NOTE: cannot be used with "timings" and also if this is specified 182 * then you cannot override the mode in the device tree. 183 */ 184 const struct drm_display_mode *modes; 185 186 /** @num_modes: Number of elements in modes array. */ 187 unsigned int num_modes; 188 189 /** 190 * @timings: Pointer to array of display timings 191 * 192 * NOTE: cannot be used with "modes" and also these will be used to 193 * validate a device tree override if one is present. 194 */ 195 const struct display_timing *timings; 196 197 /** @num_timings: Number of elements in timings array. */ 198 unsigned int num_timings; 199 200 /** @bpc: Bits per color. */ 201 unsigned int bpc; 202 203 /** @size: Structure containing the physical size of this panel. */ 204 struct { 205 /** 206 * @size.width: Width (in mm) of the active display area. 207 */ 208 unsigned int width; 209 210 /** 211 * @size.height: Height (in mm) of the active display area. 212 */ 213 unsigned int height; 214 } size; 215 216 /** @delay: Structure containing various delay values for this panel. */ 217 struct panel_delay delay; 218 }; 219 220 /** 221 * struct edp_panel_entry - Maps panel ID to delay / panel name. 222 */ 223 struct edp_panel_entry { 224 /** @ident: edid identity used for panel matching. */ 225 const struct drm_edid_ident ident; 226 227 /** @delay: The power sequencing delays needed for this panel. */ 228 const struct panel_delay *delay; 229 230 /** @override_edid_mode: Override the mode obtained by edid. */ 231 const struct drm_display_mode *override_edid_mode; 232 }; 233 234 struct panel_edp { 235 struct drm_panel base; 236 bool no_hpd; 237 238 ktime_t prepared_time; 239 ktime_t powered_on_time; 240 ktime_t unprepared_time; 241 242 const struct panel_desc *desc; 243 244 struct regulator *supply; 245 struct i2c_adapter *ddc; 246 struct drm_dp_aux *aux; 247 248 struct gpio_desc *enable_gpio; 249 struct gpio_desc *hpd_gpio; 250 251 const struct edp_panel_entry *detected_panel; 252 253 const struct drm_edid *drm_edid; 254 255 struct drm_display_mode override_mode; 256 257 enum drm_panel_orientation orientation; 258 }; 259 260 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 261 { 262 return container_of(panel, struct panel_edp, base); 263 } 264 265 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 266 struct drm_connector *connector) 267 { 268 struct drm_display_mode *mode; 269 unsigned int i, num = 0; 270 271 for (i = 0; i < panel->desc->num_timings; i++) { 272 const struct display_timing *dt = &panel->desc->timings[i]; 273 struct videomode vm; 274 275 videomode_from_timing(dt, &vm); 276 mode = drm_mode_create(connector->dev); 277 if (!mode) { 278 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 279 dt->hactive.typ, dt->vactive.typ); 280 continue; 281 } 282 283 drm_display_mode_from_videomode(&vm, mode); 284 285 mode->type |= DRM_MODE_TYPE_DRIVER; 286 287 if (panel->desc->num_timings == 1) 288 mode->type |= DRM_MODE_TYPE_PREFERRED; 289 290 drm_mode_probed_add(connector, mode); 291 num++; 292 } 293 294 return num; 295 } 296 297 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 298 struct drm_connector *connector) 299 { 300 struct drm_display_mode *mode; 301 unsigned int i, num = 0; 302 303 for (i = 0; i < panel->desc->num_modes; i++) { 304 const struct drm_display_mode *m = &panel->desc->modes[i]; 305 306 mode = drm_mode_duplicate(connector->dev, m); 307 if (!mode) { 308 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 309 m->hdisplay, m->vdisplay, 310 drm_mode_vrefresh(m)); 311 continue; 312 } 313 314 mode->type |= DRM_MODE_TYPE_DRIVER; 315 316 if (panel->desc->num_modes == 1) 317 mode->type |= DRM_MODE_TYPE_PREFERRED; 318 319 drm_mode_set_name(mode); 320 321 drm_mode_probed_add(connector, mode); 322 num++; 323 } 324 325 return num; 326 } 327 328 static int panel_edp_override_edid_mode(struct panel_edp *panel, 329 struct drm_connector *connector, 330 const struct drm_display_mode *override_mode) 331 { 332 struct drm_display_mode *mode; 333 334 mode = drm_mode_duplicate(connector->dev, override_mode); 335 if (!mode) { 336 dev_err(panel->base.dev, "failed to add additional mode\n"); 337 return 0; 338 } 339 340 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 341 drm_mode_set_name(mode); 342 drm_mode_probed_add(connector, mode); 343 return 1; 344 } 345 346 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 347 struct drm_connector *connector) 348 { 349 struct drm_display_mode *mode; 350 bool has_override = panel->override_mode.type; 351 unsigned int num = 0; 352 353 if (!panel->desc) 354 return 0; 355 356 if (has_override) { 357 mode = drm_mode_duplicate(connector->dev, 358 &panel->override_mode); 359 if (mode) { 360 drm_mode_probed_add(connector, mode); 361 num = 1; 362 } else { 363 dev_err(panel->base.dev, "failed to add override mode\n"); 364 } 365 } 366 367 /* Only add timings if override was not there or failed to validate */ 368 if (num == 0 && panel->desc->num_timings) 369 num = panel_edp_get_timings_modes(panel, connector); 370 371 /* 372 * Only add fixed modes if timings/override added no mode. 373 * 374 * We should only ever have either the display timings specified 375 * or a fixed mode. Anything else is rather bogus. 376 */ 377 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 378 if (num == 0) 379 num = panel_edp_get_display_modes(panel, connector); 380 381 connector->display_info.bpc = panel->desc->bpc; 382 connector->display_info.width_mm = panel->desc->size.width; 383 connector->display_info.height_mm = panel->desc->size.height; 384 385 return num; 386 } 387 388 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 389 { 390 ktime_t now_ktime, min_ktime; 391 392 if (!min_ms) 393 return; 394 395 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 396 now_ktime = ktime_get_boottime(); 397 398 if (ktime_before(now_ktime, min_ktime)) 399 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 400 } 401 402 static int panel_edp_disable(struct drm_panel *panel) 403 { 404 struct panel_edp *p = to_panel_edp(panel); 405 406 if (p->desc->delay.disable) 407 msleep(p->desc->delay.disable); 408 409 return 0; 410 } 411 412 static int panel_edp_suspend(struct device *dev) 413 { 414 struct panel_edp *p = dev_get_drvdata(dev); 415 416 drm_dp_dpcd_set_powered(p->aux, false); 417 gpiod_set_value_cansleep(p->enable_gpio, 0); 418 regulator_disable(p->supply); 419 p->unprepared_time = ktime_get_boottime(); 420 421 return 0; 422 } 423 424 static int panel_edp_unprepare(struct drm_panel *panel) 425 { 426 struct panel_edp *p = to_panel_edp(panel); 427 int ret; 428 429 if (p->desc->delay.pre_unprepare) 430 msleep(p->desc->delay.pre_unprepare); 431 432 ret = pm_runtime_put_sync_suspend(panel->dev); 433 if (ret < 0) 434 return ret; 435 436 return 0; 437 } 438 439 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 440 { 441 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 442 if (IS_ERR(p->hpd_gpio)) 443 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 444 "failed to get 'hpd' GPIO\n"); 445 446 return 0; 447 } 448 449 static bool panel_edp_can_read_hpd(struct panel_edp *p) 450 { 451 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 452 } 453 454 static int panel_edp_prepare_once(struct panel_edp *p) 455 { 456 struct device *dev = p->base.dev; 457 unsigned int delay; 458 int err; 459 int hpd_asserted; 460 unsigned long hpd_wait_us; 461 462 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 463 464 err = regulator_enable(p->supply); 465 if (err < 0) { 466 dev_err(dev, "failed to enable supply: %d\n", err); 467 return err; 468 } 469 470 gpiod_set_value_cansleep(p->enable_gpio, 1); 471 drm_dp_dpcd_set_powered(p->aux, true); 472 473 p->powered_on_time = ktime_get_boottime(); 474 475 delay = p->desc->delay.hpd_reliable; 476 if (p->no_hpd) 477 delay = max(delay, p->desc->delay.hpd_absent); 478 if (delay) 479 msleep(delay); 480 481 if (panel_edp_can_read_hpd(p)) { 482 if (p->desc->delay.hpd_absent) 483 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 484 else 485 hpd_wait_us = 2000000; 486 487 if (p->hpd_gpio) { 488 err = readx_poll_timeout(gpiod_get_value_cansleep, 489 p->hpd_gpio, hpd_asserted, 490 hpd_asserted, 1000, hpd_wait_us); 491 if (hpd_asserted < 0) 492 err = hpd_asserted; 493 } else { 494 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 495 } 496 497 if (err) { 498 if (err != -ETIMEDOUT) 499 dev_err(dev, 500 "error waiting for hpd GPIO: %d\n", err); 501 goto error; 502 } 503 } 504 505 p->prepared_time = ktime_get_boottime(); 506 507 return 0; 508 509 error: 510 drm_dp_dpcd_set_powered(p->aux, false); 511 gpiod_set_value_cansleep(p->enable_gpio, 0); 512 regulator_disable(p->supply); 513 p->unprepared_time = ktime_get_boottime(); 514 515 return err; 516 } 517 518 /* 519 * Some panels simply don't always come up and need to be power cycled to 520 * work properly. We'll allow for a handful of retries. 521 */ 522 #define MAX_PANEL_PREPARE_TRIES 5 523 524 static int panel_edp_resume(struct device *dev) 525 { 526 struct panel_edp *p = dev_get_drvdata(dev); 527 int ret; 528 int try; 529 530 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 531 ret = panel_edp_prepare_once(p); 532 if (ret != -ETIMEDOUT) 533 break; 534 } 535 536 if (ret == -ETIMEDOUT) 537 dev_err(dev, "Prepare timeout after %d tries\n", try); 538 else if (try) 539 dev_warn(dev, "Prepare needed %d retries\n", try); 540 541 return ret; 542 } 543 544 static int panel_edp_prepare(struct drm_panel *panel) 545 { 546 int ret; 547 548 ret = pm_runtime_get_sync(panel->dev); 549 if (ret < 0) { 550 pm_runtime_put_autosuspend(panel->dev); 551 return ret; 552 } 553 554 return 0; 555 } 556 557 static int panel_edp_enable(struct drm_panel *panel) 558 { 559 struct panel_edp *p = to_panel_edp(panel); 560 unsigned int delay; 561 562 delay = p->desc->delay.enable; 563 564 /* 565 * If there is a "prepare_to_enable" delay then that's supposed to be 566 * the delay from HPD going high until we can turn the backlight on. 567 * However, we can only count this if HPD is readable by the panel 568 * driver. 569 * 570 * If we aren't handling the HPD pin ourselves then the best we 571 * can do is assume that HPD went high immediately before we were 572 * called (and link training took zero time). Note that "no-hpd" 573 * actually counts as handling HPD ourselves since we're doing the 574 * worst case delay (in prepare) ourselves. 575 * 576 * NOTE: if we ever end up in this "if" statement then we're 577 * guaranteed that the panel_edp_wait() call below will do no delay. 578 * It already handles that case, though, so we don't need any special 579 * code for it. 580 */ 581 if (p->desc->delay.prepare_to_enable && 582 !panel_edp_can_read_hpd(p) && !p->no_hpd) 583 delay = max(delay, p->desc->delay.prepare_to_enable); 584 585 if (delay) 586 msleep(delay); 587 588 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 589 590 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); 591 592 return 0; 593 } 594 595 static int panel_edp_get_modes(struct drm_panel *panel, 596 struct drm_connector *connector) 597 { 598 struct panel_edp *p = to_panel_edp(panel); 599 int num = 0; 600 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; 601 bool has_override_edid_mode = p->detected_panel && 602 p->detected_panel != ERR_PTR(-EINVAL) && 603 p->detected_panel->override_edid_mode; 604 605 /* probe EDID if a DDC bus is available */ 606 if (p->ddc) { 607 pm_runtime_get_sync(panel->dev); 608 609 if (!p->drm_edid) 610 p->drm_edid = drm_edid_read_ddc(connector, p->ddc); 611 612 drm_edid_connector_update(connector, p->drm_edid); 613 614 /* 615 * If both edid and hard-coded modes exists, skip edid modes to 616 * avoid multiple preferred modes. 617 */ 618 if (p->drm_edid && !has_hard_coded_modes) { 619 if (has_override_edid_mode) { 620 /* 621 * override_edid_mode is specified. Use 622 * override_edid_mode instead of from edid. 623 */ 624 num += panel_edp_override_edid_mode(p, connector, 625 p->detected_panel->override_edid_mode); 626 } else { 627 num += drm_edid_connector_add_modes(connector); 628 } 629 } 630 631 pm_runtime_mark_last_busy(panel->dev); 632 pm_runtime_put_autosuspend(panel->dev); 633 } 634 635 if (has_hard_coded_modes) 636 num += panel_edp_get_non_edid_modes(p, connector); 637 else if (!num) 638 dev_warn(p->base.dev, "No display modes\n"); 639 640 /* 641 * TODO: Remove once all drm drivers call 642 * drm_connector_set_orientation_from_panel() 643 */ 644 drm_connector_set_panel_orientation(connector, p->orientation); 645 646 return num; 647 } 648 649 static int panel_edp_get_timings(struct drm_panel *panel, 650 unsigned int num_timings, 651 struct display_timing *timings) 652 { 653 struct panel_edp *p = to_panel_edp(panel); 654 unsigned int i; 655 656 if (p->desc->num_timings < num_timings) 657 num_timings = p->desc->num_timings; 658 659 if (timings) 660 for (i = 0; i < num_timings; i++) 661 timings[i] = p->desc->timings[i]; 662 663 return p->desc->num_timings; 664 } 665 666 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 667 { 668 struct panel_edp *p = to_panel_edp(panel); 669 670 return p->orientation; 671 } 672 673 static int detected_panel_show(struct seq_file *s, void *data) 674 { 675 struct drm_panel *panel = s->private; 676 struct panel_edp *p = to_panel_edp(panel); 677 678 if (IS_ERR(p->detected_panel)) 679 seq_puts(s, "UNKNOWN\n"); 680 else if (!p->detected_panel) 681 seq_puts(s, "HARDCODED\n"); 682 else 683 seq_printf(s, "%s\n", p->detected_panel->ident.name); 684 685 return 0; 686 } 687 688 DEFINE_SHOW_ATTRIBUTE(detected_panel); 689 690 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 691 { 692 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 693 } 694 695 static const struct drm_panel_funcs panel_edp_funcs = { 696 .disable = panel_edp_disable, 697 .unprepare = panel_edp_unprepare, 698 .prepare = panel_edp_prepare, 699 .enable = panel_edp_enable, 700 .get_modes = panel_edp_get_modes, 701 .get_orientation = panel_edp_get_orientation, 702 .get_timings = panel_edp_get_timings, 703 .debugfs_init = panel_edp_debugfs_init, 704 }; 705 706 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 707 (to_check->field.typ >= bounds->field.min && \ 708 to_check->field.typ <= bounds->field.max) 709 static void panel_edp_parse_panel_timing_node(struct device *dev, 710 struct panel_edp *panel, 711 const struct display_timing *ot) 712 { 713 const struct panel_desc *desc = panel->desc; 714 struct videomode vm; 715 unsigned int i; 716 717 if (WARN_ON(desc->num_modes)) { 718 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 719 return; 720 } 721 if (WARN_ON(!desc->num_timings)) { 722 dev_err(dev, "Reject override mode: no timings specified\n"); 723 return; 724 } 725 726 for (i = 0; i < panel->desc->num_timings; i++) { 727 const struct display_timing *dt = &panel->desc->timings[i]; 728 729 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 730 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 731 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 732 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 733 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 734 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 735 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 736 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 737 continue; 738 739 if (ot->flags != dt->flags) 740 continue; 741 742 videomode_from_timing(ot, &vm); 743 drm_display_mode_from_videomode(&vm, &panel->override_mode); 744 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 745 DRM_MODE_TYPE_PREFERRED; 746 break; 747 } 748 749 if (WARN_ON(!panel->override_mode.type)) 750 dev_err(dev, "Reject override mode: No display_timing found\n"); 751 } 752 753 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid); 754 755 static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc) 756 { 757 /* 758 * It's highly likely that the panel will work if we use very 759 * conservative timings, so let's do that. 760 * 761 * Nearly all panels have a "unprepare" delay of 500 ms though 762 * there are a few with 1000. Let's stick 2000 in just to be 763 * super conservative. 764 * 765 * An "enable" delay of 80 ms seems the most common, but we'll 766 * throw in 200 ms to be safe. 767 */ 768 desc->delay.unprepare = 2000; 769 desc->delay.enable = 200; 770 771 panel->detected_panel = ERR_PTR(-EINVAL); 772 } 773 774 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 775 { 776 struct panel_desc *desc; 777 const struct drm_edid *base_block; 778 u32 panel_id; 779 char vend[4]; 780 u16 product_id; 781 u32 reliable_ms = 0; 782 u32 absent_ms = 0; 783 int ret; 784 785 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 786 if (!desc) 787 return -ENOMEM; 788 panel->desc = desc; 789 790 /* 791 * Read the dts properties for the initial probe. These are used by 792 * the runtime resume code which will get called by the 793 * pm_runtime_get_sync() call below. 794 */ 795 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 796 desc->delay.hpd_reliable = reliable_ms; 797 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 798 desc->delay.hpd_absent = absent_ms; 799 800 /* Power the panel on so we can read the EDID */ 801 ret = pm_runtime_get_sync(dev); 802 if (ret < 0) { 803 dev_err(dev, 804 "Couldn't power on panel to ID it; using conservative timings: %d\n", 805 ret); 806 panel_edp_set_conservative_timings(panel, desc); 807 goto exit; 808 } 809 810 base_block = drm_edid_read_base_block(panel->ddc); 811 if (base_block) { 812 panel_id = drm_edid_get_panel_id(base_block); 813 } else { 814 dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n"); 815 panel_edp_set_conservative_timings(panel, desc); 816 goto exit; 817 } 818 drm_edid_decode_panel_id(panel_id, vend, &product_id); 819 820 panel->detected_panel = find_edp_panel(panel_id, base_block); 821 822 drm_edid_free(base_block); 823 824 /* 825 * We're using non-optimized timings and want it really obvious that 826 * someone needs to add an entry to the table, so we'll do a WARN_ON 827 * splat. 828 */ 829 if (WARN_ON(!panel->detected_panel)) { 830 dev_warn(dev, 831 "Unknown panel %s %#06x, using conservative timings\n", 832 vend, product_id); 833 panel_edp_set_conservative_timings(panel, desc); 834 } else { 835 dev_info(dev, "Detected %s %s (%#06x)\n", 836 vend, panel->detected_panel->ident.name, product_id); 837 838 /* Update the delay; everything else comes from EDID */ 839 desc->delay = *panel->detected_panel->delay; 840 } 841 842 exit: 843 pm_runtime_mark_last_busy(dev); 844 pm_runtime_put_autosuspend(dev); 845 846 return 0; 847 } 848 849 static void panel_edp_put_adapter(void *_adap) 850 { 851 struct i2c_adapter *adap = _adap; 852 853 i2c_put_adapter(adap); 854 } 855 856 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 857 struct drm_dp_aux *aux) 858 { 859 struct panel_edp *panel; 860 struct display_timing dt; 861 struct device_node *ddc; 862 int err; 863 864 panel = devm_drm_panel_alloc(dev, struct panel_edp, base, 865 &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 866 if (IS_ERR(panel)) 867 return PTR_ERR(panel); 868 869 panel->prepared_time = 0; 870 panel->desc = desc; 871 panel->aux = aux; 872 873 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 874 if (!panel->no_hpd) { 875 err = panel_edp_get_hpd_gpio(dev, panel); 876 if (err) 877 return err; 878 } 879 880 panel->supply = devm_regulator_get(dev, "power"); 881 if (IS_ERR(panel->supply)) 882 return PTR_ERR(panel->supply); 883 884 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 885 GPIOD_OUT_LOW); 886 if (IS_ERR(panel->enable_gpio)) 887 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 888 "failed to request GPIO\n"); 889 890 err = drm_of_get_panel_orientation(dev->of_node, &panel->orientation); 891 if (err) { 892 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 893 return err; 894 } 895 896 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 897 if (ddc) { 898 panel->ddc = of_get_i2c_adapter_by_node(ddc); 899 of_node_put(ddc); 900 901 if (!panel->ddc) 902 return -EPROBE_DEFER; 903 904 err = devm_add_action_or_reset(dev, panel_edp_put_adapter, 905 panel->ddc); 906 if (err) 907 return err; 908 } else if (aux) { 909 panel->ddc = &aux->ddc; 910 } 911 912 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 913 panel_edp_parse_panel_timing_node(dev, panel, &dt); 914 915 dev_set_drvdata(dev, panel); 916 917 err = drm_panel_of_backlight(&panel->base); 918 if (err) 919 return err; 920 921 /* 922 * We use runtime PM for prepare / unprepare since those power the panel 923 * on and off and those can be very slow operations. This is important 924 * to optimize powering the panel on briefly to read the EDID before 925 * fully enabling the panel. 926 */ 927 pm_runtime_enable(dev); 928 pm_runtime_set_autosuspend_delay(dev, 1000); 929 pm_runtime_use_autosuspend(dev); 930 931 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 932 err = generic_edp_panel_probe(dev, panel); 933 if (err) { 934 dev_err_probe(dev, err, 935 "Couldn't detect panel nor find a fallback\n"); 936 goto err_finished_pm_runtime; 937 } 938 /* generic_edp_panel_probe() replaces desc in the panel */ 939 desc = panel->desc; 940 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 941 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 942 } 943 944 if (!panel->base.backlight && panel->aux) { 945 pm_runtime_get_sync(dev); 946 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 947 pm_runtime_mark_last_busy(dev); 948 pm_runtime_put_autosuspend(dev); 949 950 /* 951 * Warn if we get an error, but don't consider it fatal. Having 952 * a panel where we can't control the backlight is better than 953 * no panel. 954 */ 955 if (err) 956 dev_warn(dev, "failed to register dp aux backlight: %d\n", err); 957 } 958 959 drm_panel_add(&panel->base); 960 961 return 0; 962 963 err_finished_pm_runtime: 964 pm_runtime_dont_use_autosuspend(dev); 965 pm_runtime_disable(dev); 966 967 return err; 968 } 969 970 static void panel_edp_shutdown(struct device *dev) 971 { 972 struct panel_edp *panel = dev_get_drvdata(dev); 973 974 /* 975 * NOTE: the following two calls don't really belong here. It is the 976 * responsibility of a correctly written DRM modeset driver to call 977 * drm_atomic_helper_shutdown() at shutdown time and that should 978 * cause the panel to be disabled / unprepared if needed. For now, 979 * however, we'll keep these calls due to the sheer number of 980 * different DRM modeset drivers used with panel-edp. Once we've 981 * confirmed that all DRM modeset drivers using this panel properly 982 * call drm_atomic_helper_shutdown() we can simply delete the two 983 * calls below. 984 * 985 * TO BE EXPLICIT: THE CALLS BELOW SHOULDN'T BE COPIED TO ANY NEW 986 * PANEL DRIVERS. 987 * 988 * FIXME: If we're still haven't figured out if all DRM modeset 989 * drivers properly call drm_atomic_helper_shutdown() but we _have_ 990 * managed to make sure that DRM modeset drivers get their shutdown() 991 * callback before the panel's shutdown() callback (perhaps using 992 * device link), we could add a WARN_ON here to help move forward. 993 */ 994 if (panel->base.enabled) 995 drm_panel_disable(&panel->base); 996 if (panel->base.prepared) 997 drm_panel_unprepare(&panel->base); 998 } 999 1000 static void panel_edp_remove(struct device *dev) 1001 { 1002 struct panel_edp *panel = dev_get_drvdata(dev); 1003 1004 drm_panel_remove(&panel->base); 1005 panel_edp_shutdown(dev); 1006 1007 pm_runtime_dont_use_autosuspend(dev); 1008 pm_runtime_disable(dev); 1009 1010 drm_edid_free(panel->drm_edid); 1011 panel->drm_edid = NULL; 1012 } 1013 1014 static const struct display_timing auo_b101ean01_timing = { 1015 .pixelclock = { 65300000, 72500000, 75000000 }, 1016 .hactive = { 1280, 1280, 1280 }, 1017 .hfront_porch = { 18, 119, 119 }, 1018 .hback_porch = { 21, 21, 21 }, 1019 .hsync_len = { 32, 32, 32 }, 1020 .vactive = { 800, 800, 800 }, 1021 .vfront_porch = { 4, 4, 4 }, 1022 .vback_porch = { 8, 8, 8 }, 1023 .vsync_len = { 18, 20, 20 }, 1024 }; 1025 1026 static const struct panel_desc auo_b101ean01 = { 1027 .timings = &auo_b101ean01_timing, 1028 .num_timings = 1, 1029 .bpc = 6, 1030 .size = { 1031 .width = 217, 1032 .height = 136, 1033 }, 1034 }; 1035 1036 static const struct drm_display_mode auo_b116xa3_mode = { 1037 .clock = 70589, 1038 .hdisplay = 1366, 1039 .hsync_start = 1366 + 40, 1040 .hsync_end = 1366 + 40 + 40, 1041 .htotal = 1366 + 40 + 40 + 32, 1042 .vdisplay = 768, 1043 .vsync_start = 768 + 10, 1044 .vsync_end = 768 + 10 + 12, 1045 .vtotal = 768 + 10 + 12 + 6, 1046 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1047 }; 1048 1049 static const struct drm_display_mode auo_b116xak01_mode = { 1050 .clock = 69300, 1051 .hdisplay = 1366, 1052 .hsync_start = 1366 + 48, 1053 .hsync_end = 1366 + 48 + 32, 1054 .htotal = 1366 + 48 + 32 + 10, 1055 .vdisplay = 768, 1056 .vsync_start = 768 + 4, 1057 .vsync_end = 768 + 4 + 6, 1058 .vtotal = 768 + 4 + 6 + 15, 1059 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1060 }; 1061 1062 static const struct panel_desc auo_b116xak01 = { 1063 .modes = &auo_b116xak01_mode, 1064 .num_modes = 1, 1065 .bpc = 6, 1066 .size = { 1067 .width = 256, 1068 .height = 144, 1069 }, 1070 .delay = { 1071 .hpd_absent = 200, 1072 .unprepare = 500, 1073 .enable = 50, 1074 }, 1075 }; 1076 1077 static const struct drm_display_mode auo_b133htn01_mode = { 1078 .clock = 150660, 1079 .hdisplay = 1920, 1080 .hsync_start = 1920 + 172, 1081 .hsync_end = 1920 + 172 + 80, 1082 .htotal = 1920 + 172 + 80 + 60, 1083 .vdisplay = 1080, 1084 .vsync_start = 1080 + 25, 1085 .vsync_end = 1080 + 25 + 10, 1086 .vtotal = 1080 + 25 + 10 + 10, 1087 }; 1088 1089 static const struct panel_desc auo_b133htn01 = { 1090 .modes = &auo_b133htn01_mode, 1091 .num_modes = 1, 1092 .bpc = 6, 1093 .size = { 1094 .width = 293, 1095 .height = 165, 1096 }, 1097 .delay = { 1098 .hpd_reliable = 105, 1099 .enable = 20, 1100 .unprepare = 50, 1101 }, 1102 }; 1103 1104 static const struct drm_display_mode auo_b133xtn01_mode = { 1105 .clock = 69500, 1106 .hdisplay = 1366, 1107 .hsync_start = 1366 + 48, 1108 .hsync_end = 1366 + 48 + 32, 1109 .htotal = 1366 + 48 + 32 + 20, 1110 .vdisplay = 768, 1111 .vsync_start = 768 + 3, 1112 .vsync_end = 768 + 3 + 6, 1113 .vtotal = 768 + 3 + 6 + 13, 1114 }; 1115 1116 static const struct panel_desc auo_b133xtn01 = { 1117 .modes = &auo_b133xtn01_mode, 1118 .num_modes = 1, 1119 .bpc = 6, 1120 .size = { 1121 .width = 293, 1122 .height = 165, 1123 }, 1124 }; 1125 1126 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1127 { 1128 .clock = 71900, 1129 .hdisplay = 1280, 1130 .hsync_start = 1280 + 48, 1131 .hsync_end = 1280 + 48 + 32, 1132 .htotal = 1280 + 48 + 32 + 80, 1133 .vdisplay = 800, 1134 .vsync_start = 800 + 3, 1135 .vsync_end = 800 + 3 + 5, 1136 .vtotal = 800 + 3 + 5 + 24, 1137 }, 1138 { 1139 .clock = 57500, 1140 .hdisplay = 1280, 1141 .hsync_start = 1280 + 48, 1142 .hsync_end = 1280 + 48 + 32, 1143 .htotal = 1280 + 48 + 32 + 80, 1144 .vdisplay = 800, 1145 .vsync_start = 800 + 3, 1146 .vsync_end = 800 + 3 + 5, 1147 .vtotal = 800 + 3 + 5 + 24, 1148 }, 1149 }; 1150 1151 static const struct panel_desc boe_nv101wxmn51 = { 1152 .modes = boe_nv101wxmn51_modes, 1153 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1154 .bpc = 8, 1155 .size = { 1156 .width = 217, 1157 .height = 136, 1158 }, 1159 .delay = { 1160 /* TODO: should be hpd-absent and no-hpd should be set? */ 1161 .hpd_reliable = 210, 1162 .enable = 50, 1163 .unprepare = 160, 1164 }, 1165 }; 1166 1167 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1168 { 1169 .clock = 207800, 1170 .hdisplay = 2160, 1171 .hsync_start = 2160 + 48, 1172 .hsync_end = 2160 + 48 + 32, 1173 .htotal = 2160 + 48 + 32 + 100, 1174 .vdisplay = 1440, 1175 .vsync_start = 1440 + 3, 1176 .vsync_end = 1440 + 3 + 6, 1177 .vtotal = 1440 + 3 + 6 + 31, 1178 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1179 }, 1180 { 1181 .clock = 138500, 1182 .hdisplay = 2160, 1183 .hsync_start = 2160 + 48, 1184 .hsync_end = 2160 + 48 + 32, 1185 .htotal = 2160 + 48 + 32 + 100, 1186 .vdisplay = 1440, 1187 .vsync_start = 1440 + 3, 1188 .vsync_end = 1440 + 3 + 6, 1189 .vtotal = 1440 + 3 + 6 + 31, 1190 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1191 }, 1192 }; 1193 1194 static const struct panel_desc boe_nv110wtm_n61 = { 1195 .modes = boe_nv110wtm_n61_modes, 1196 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1197 .bpc = 8, 1198 .size = { 1199 .width = 233, 1200 .height = 155, 1201 }, 1202 .delay = { 1203 .hpd_absent = 200, 1204 .prepare_to_enable = 80, 1205 .enable = 50, 1206 .unprepare = 500, 1207 }, 1208 }; 1209 1210 /* Also used for boe_nv133fhm_n62 */ 1211 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1212 .clock = 147840, 1213 .hdisplay = 1920, 1214 .hsync_start = 1920 + 48, 1215 .hsync_end = 1920 + 48 + 32, 1216 .htotal = 1920 + 48 + 32 + 200, 1217 .vdisplay = 1080, 1218 .vsync_start = 1080 + 3, 1219 .vsync_end = 1080 + 3 + 6, 1220 .vtotal = 1080 + 3 + 6 + 31, 1221 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1222 }; 1223 1224 /* Also used for boe_nv133fhm_n62 */ 1225 static const struct panel_desc boe_nv133fhm_n61 = { 1226 .modes = &boe_nv133fhm_n61_modes, 1227 .num_modes = 1, 1228 .bpc = 6, 1229 .size = { 1230 .width = 294, 1231 .height = 165, 1232 }, 1233 .delay = { 1234 /* 1235 * When power is first given to the panel there's a short 1236 * spike on the HPD line. It was explained that this spike 1237 * was until the TCON data download was complete. On 1238 * one system this was measured at 8 ms. We'll put 15 ms 1239 * in the prepare delay just to be safe. That means: 1240 * - If HPD isn't hooked up you still have 200 ms delay. 1241 * - If HPD is hooked up we won't try to look at it for the 1242 * first 15 ms. 1243 */ 1244 .hpd_reliable = 15, 1245 .hpd_absent = 200, 1246 1247 .unprepare = 500, 1248 }, 1249 }; 1250 1251 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1252 { 1253 .clock = 148500, 1254 .hdisplay = 1920, 1255 .hsync_start = 1920 + 48, 1256 .hsync_end = 1920 + 48 + 32, 1257 .htotal = 2200, 1258 .vdisplay = 1080, 1259 .vsync_start = 1080 + 3, 1260 .vsync_end = 1080 + 3 + 5, 1261 .vtotal = 1125, 1262 }, 1263 }; 1264 1265 static const struct panel_desc boe_nv140fhmn49 = { 1266 .modes = boe_nv140fhmn49_modes, 1267 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1268 .bpc = 6, 1269 .size = { 1270 .width = 309, 1271 .height = 174, 1272 }, 1273 .delay = { 1274 /* TODO: should be hpd-absent and no-hpd should be set? */ 1275 .hpd_reliable = 210, 1276 .enable = 50, 1277 .unprepare = 160, 1278 }, 1279 }; 1280 1281 static const struct drm_display_mode friendlyarm_hd702e_mode = { 1282 .clock = 67185, 1283 .hdisplay = 800, 1284 .hsync_start = 800 + 20, 1285 .hsync_end = 800 + 20 + 24, 1286 .htotal = 800 + 20 + 24 + 20, 1287 .vdisplay = 1280, 1288 .vsync_start = 1280 + 4, 1289 .vsync_end = 1280 + 4 + 8, 1290 .vtotal = 1280 + 4 + 8 + 4, 1291 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1292 }; 1293 1294 static const struct panel_desc friendlyarm_hd702e = { 1295 .modes = &friendlyarm_hd702e_mode, 1296 .num_modes = 1, 1297 .bpc = 8, 1298 .size = { 1299 .width = 94, 1300 .height = 151, 1301 }, 1302 }; 1303 1304 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1305 .clock = 76420, 1306 .hdisplay = 1366, 1307 .hsync_start = 1366 + 136, 1308 .hsync_end = 1366 + 136 + 30, 1309 .htotal = 1366 + 136 + 30 + 60, 1310 .vdisplay = 768, 1311 .vsync_start = 768 + 8, 1312 .vsync_end = 768 + 8 + 12, 1313 .vtotal = 768 + 8 + 12 + 12, 1314 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1315 }; 1316 1317 static const struct panel_desc innolux_n116bca_ea1 = { 1318 .modes = &innolux_n116bca_ea1_mode, 1319 .num_modes = 1, 1320 .bpc = 6, 1321 .size = { 1322 .width = 256, 1323 .height = 144, 1324 }, 1325 .delay = { 1326 .hpd_absent = 200, 1327 .enable = 80, 1328 .disable = 50, 1329 .unprepare = 500, 1330 }, 1331 }; 1332 1333 /* 1334 * Datasheet specifies that at 60 Hz refresh rate: 1335 * - total horizontal time: { 1506, 1592, 1716 } 1336 * - total vertical time: { 788, 800, 868 } 1337 * 1338 * ...but doesn't go into exactly how that should be split into a front 1339 * porch, back porch, or sync length. For now we'll leave a single setting 1340 * here which allows a bit of tweaking of the pixel clock at the expense of 1341 * refresh rate. 1342 */ 1343 static const struct display_timing innolux_n116bge_timing = { 1344 .pixelclock = { 72600000, 76420000, 80240000 }, 1345 .hactive = { 1366, 1366, 1366 }, 1346 .hfront_porch = { 136, 136, 136 }, 1347 .hback_porch = { 60, 60, 60 }, 1348 .hsync_len = { 30, 30, 30 }, 1349 .vactive = { 768, 768, 768 }, 1350 .vfront_porch = { 8, 8, 8 }, 1351 .vback_porch = { 12, 12, 12 }, 1352 .vsync_len = { 12, 12, 12 }, 1353 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1354 }; 1355 1356 static const struct panel_desc innolux_n116bge = { 1357 .timings = &innolux_n116bge_timing, 1358 .num_timings = 1, 1359 .bpc = 6, 1360 .size = { 1361 .width = 256, 1362 .height = 144, 1363 }, 1364 }; 1365 1366 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1367 .clock = 162000, 1368 .hdisplay = 1920, 1369 .hsync_start = 1920 + 40, 1370 .hsync_end = 1920 + 40 + 40, 1371 .htotal = 1920 + 40 + 40 + 80, 1372 .vdisplay = 1080, 1373 .vsync_start = 1080 + 4, 1374 .vsync_end = 1080 + 4 + 4, 1375 .vtotal = 1080 + 4 + 4 + 24, 1376 }; 1377 1378 static const struct panel_desc innolux_n125hce_gn1 = { 1379 .modes = &innolux_n125hce_gn1_mode, 1380 .num_modes = 1, 1381 .bpc = 8, 1382 .size = { 1383 .width = 276, 1384 .height = 155, 1385 }, 1386 }; 1387 1388 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1389 .clock = 206016, 1390 .hdisplay = 2160, 1391 .hsync_start = 2160 + 48, 1392 .hsync_end = 2160 + 48 + 32, 1393 .htotal = 2160 + 48 + 32 + 80, 1394 .vdisplay = 1440, 1395 .vsync_start = 1440 + 3, 1396 .vsync_end = 1440 + 3 + 10, 1397 .vtotal = 1440 + 3 + 10 + 27, 1398 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1399 }; 1400 1401 static const struct panel_desc innolux_p120zdg_bf1 = { 1402 .modes = &innolux_p120zdg_bf1_mode, 1403 .num_modes = 1, 1404 .bpc = 8, 1405 .size = { 1406 .width = 254, 1407 .height = 169, 1408 }, 1409 .delay = { 1410 .hpd_absent = 200, 1411 .unprepare = 500, 1412 }, 1413 }; 1414 1415 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1416 .clock = 81000, 1417 .hdisplay = 1366, 1418 .hsync_start = 1366 + 40, 1419 .hsync_end = 1366 + 40 + 32, 1420 .htotal = 1366 + 40 + 32 + 62, 1421 .vdisplay = 768, 1422 .vsync_start = 768 + 5, 1423 .vsync_end = 768 + 5 + 5, 1424 .vtotal = 768 + 5 + 5 + 122, 1425 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1426 }; 1427 1428 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1429 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1430 .num_modes = 1, 1431 .bpc = 6, 1432 .size = { 1433 .width = 256, 1434 .height = 144, 1435 }, 1436 .delay = { 1437 .hpd_absent = 200, 1438 }, 1439 }; 1440 1441 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1442 .clock = 200000, 1443 .hdisplay = 1536, 1444 .hsync_start = 1536 + 12, 1445 .hsync_end = 1536 + 12 + 16, 1446 .htotal = 1536 + 12 + 16 + 48, 1447 .vdisplay = 2048, 1448 .vsync_start = 2048 + 8, 1449 .vsync_end = 2048 + 8 + 4, 1450 .vtotal = 2048 + 8 + 4 + 8, 1451 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1452 }; 1453 1454 static const struct panel_desc lg_lp079qx1_sp0v = { 1455 .modes = &lg_lp079qx1_sp0v_mode, 1456 .num_modes = 1, 1457 .size = { 1458 .width = 129, 1459 .height = 171, 1460 }, 1461 }; 1462 1463 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1464 .clock = 205210, 1465 .hdisplay = 2048, 1466 .hsync_start = 2048 + 150, 1467 .hsync_end = 2048 + 150 + 5, 1468 .htotal = 2048 + 150 + 5 + 5, 1469 .vdisplay = 1536, 1470 .vsync_start = 1536 + 3, 1471 .vsync_end = 1536 + 3 + 1, 1472 .vtotal = 1536 + 3 + 1 + 9, 1473 }; 1474 1475 static const struct panel_desc lg_lp097qx1_spa1 = { 1476 .modes = &lg_lp097qx1_spa1_mode, 1477 .num_modes = 1, 1478 .size = { 1479 .width = 208, 1480 .height = 147, 1481 }, 1482 }; 1483 1484 static const struct drm_display_mode lg_lp120up1_mode = { 1485 .clock = 162300, 1486 .hdisplay = 1920, 1487 .hsync_start = 1920 + 40, 1488 .hsync_end = 1920 + 40 + 40, 1489 .htotal = 1920 + 40 + 40 + 80, 1490 .vdisplay = 1280, 1491 .vsync_start = 1280 + 4, 1492 .vsync_end = 1280 + 4 + 4, 1493 .vtotal = 1280 + 4 + 4 + 12, 1494 }; 1495 1496 static const struct panel_desc lg_lp120up1 = { 1497 .modes = &lg_lp120up1_mode, 1498 .num_modes = 1, 1499 .bpc = 8, 1500 .size = { 1501 .width = 267, 1502 .height = 183, 1503 }, 1504 }; 1505 1506 static const struct drm_display_mode lg_lp129qe_mode = { 1507 .clock = 285250, 1508 .hdisplay = 2560, 1509 .hsync_start = 2560 + 48, 1510 .hsync_end = 2560 + 48 + 32, 1511 .htotal = 2560 + 48 + 32 + 80, 1512 .vdisplay = 1700, 1513 .vsync_start = 1700 + 3, 1514 .vsync_end = 1700 + 3 + 10, 1515 .vtotal = 1700 + 3 + 10 + 36, 1516 }; 1517 1518 static const struct panel_desc lg_lp129qe = { 1519 .modes = &lg_lp129qe_mode, 1520 .num_modes = 1, 1521 .bpc = 8, 1522 .size = { 1523 .width = 272, 1524 .height = 181, 1525 }, 1526 }; 1527 1528 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1529 { 1530 .clock = 138500, 1531 .hdisplay = 1920, 1532 .hsync_start = 1920 + 48, 1533 .hsync_end = 1920 + 48 + 32, 1534 .htotal = 1920 + 48 + 32 + 80, 1535 .vdisplay = 1080, 1536 .vsync_start = 1080 + 3, 1537 .vsync_end = 1080 + 3 + 5, 1538 .vtotal = 1080 + 3 + 5 + 23, 1539 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1540 }, { 1541 .clock = 110920, 1542 .hdisplay = 1920, 1543 .hsync_start = 1920 + 48, 1544 .hsync_end = 1920 + 48 + 32, 1545 .htotal = 1920 + 48 + 32 + 80, 1546 .vdisplay = 1080, 1547 .vsync_start = 1080 + 3, 1548 .vsync_end = 1080 + 3 + 5, 1549 .vtotal = 1080 + 3 + 5 + 23, 1550 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1551 } 1552 }; 1553 1554 static const struct panel_desc neweast_wjfh116008a = { 1555 .modes = neweast_wjfh116008a_modes, 1556 .num_modes = 2, 1557 .bpc = 6, 1558 .size = { 1559 .width = 260, 1560 .height = 150, 1561 }, 1562 .delay = { 1563 .hpd_reliable = 110, 1564 .enable = 20, 1565 .unprepare = 500, 1566 }, 1567 }; 1568 1569 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1570 .clock = 271560, 1571 .hdisplay = 2560, 1572 .hsync_start = 2560 + 48, 1573 .hsync_end = 2560 + 48 + 32, 1574 .htotal = 2560 + 48 + 32 + 80, 1575 .vdisplay = 1600, 1576 .vsync_start = 1600 + 2, 1577 .vsync_end = 1600 + 2 + 5, 1578 .vtotal = 1600 + 2 + 5 + 57, 1579 }; 1580 1581 static const struct panel_desc samsung_lsn122dl01_c01 = { 1582 .modes = &samsung_lsn122dl01_c01_mode, 1583 .num_modes = 1, 1584 .size = { 1585 .width = 263, 1586 .height = 164, 1587 }, 1588 }; 1589 1590 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1591 .clock = 76300, 1592 .hdisplay = 1366, 1593 .hsync_start = 1366 + 64, 1594 .hsync_end = 1366 + 64 + 48, 1595 .htotal = 1366 + 64 + 48 + 128, 1596 .vdisplay = 768, 1597 .vsync_start = 768 + 2, 1598 .vsync_end = 768 + 2 + 5, 1599 .vtotal = 768 + 2 + 5 + 17, 1600 }; 1601 1602 static const struct panel_desc samsung_ltn140at29_301 = { 1603 .modes = &samsung_ltn140at29_301_mode, 1604 .num_modes = 1, 1605 .bpc = 6, 1606 .size = { 1607 .width = 320, 1608 .height = 187, 1609 }, 1610 }; 1611 1612 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1613 .clock = 168480, 1614 .hdisplay = 1920, 1615 .hsync_start = 1920 + 48, 1616 .hsync_end = 1920 + 48 + 32, 1617 .htotal = 1920 + 48 + 32 + 80, 1618 .vdisplay = 1280, 1619 .vsync_start = 1280 + 3, 1620 .vsync_end = 1280 + 3 + 10, 1621 .vtotal = 1280 + 3 + 10 + 57, 1622 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1623 }; 1624 1625 static const struct panel_desc sharp_ld_d5116z01b = { 1626 .modes = &sharp_ld_d5116z01b_mode, 1627 .num_modes = 1, 1628 .bpc = 8, 1629 .size = { 1630 .width = 260, 1631 .height = 120, 1632 }, 1633 }; 1634 1635 static const struct display_timing sharp_lq123p1jx31_timing = { 1636 .pixelclock = { 252750000, 252750000, 266604720 }, 1637 .hactive = { 2400, 2400, 2400 }, 1638 .hfront_porch = { 48, 48, 48 }, 1639 .hback_porch = { 80, 80, 84 }, 1640 .hsync_len = { 32, 32, 32 }, 1641 .vactive = { 1600, 1600, 1600 }, 1642 .vfront_porch = { 3, 3, 3 }, 1643 .vback_porch = { 33, 33, 120 }, 1644 .vsync_len = { 10, 10, 10 }, 1645 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1646 }; 1647 1648 static const struct panel_desc sharp_lq123p1jx31 = { 1649 .timings = &sharp_lq123p1jx31_timing, 1650 .num_timings = 1, 1651 .bpc = 8, 1652 .size = { 1653 .width = 259, 1654 .height = 173, 1655 }, 1656 .delay = { 1657 .hpd_reliable = 110, 1658 .enable = 50, 1659 .unprepare = 550, 1660 }, 1661 }; 1662 1663 static const struct of_device_id platform_of_match[] = { 1664 { 1665 /* Must be first */ 1666 .compatible = "edp-panel", 1667 }, 1668 /* 1669 * Do not add panels to the list below unless they cannot be handled by 1670 * the generic edp-panel compatible. 1671 * 1672 * The only two valid reasons are: 1673 * - Because of the panel issues (e.g. broken EDID or broken 1674 * identification). 1675 * - Because the eDP drivers didn't wire up the AUX bus properly. 1676 * NOTE that, though this is a marginally valid reason, 1677 * some justification needs to be made for why the platform can't 1678 * wire up the AUX bus properly. 1679 * 1680 * In all other cases the platform should use the aux-bus and declare 1681 * the panel using the 'edp-panel' compatible as a device on the AUX 1682 * bus. 1683 */ 1684 { 1685 .compatible = "auo,b101ean01", 1686 .data = &auo_b101ean01, 1687 }, { 1688 .compatible = "auo,b116xa01", 1689 .data = &auo_b116xak01, 1690 }, { 1691 .compatible = "auo,b133htn01", 1692 .data = &auo_b133htn01, 1693 }, { 1694 .compatible = "auo,b133xtn01", 1695 .data = &auo_b133xtn01, 1696 }, { 1697 .compatible = "boe,nv101wxmn51", 1698 .data = &boe_nv101wxmn51, 1699 }, { 1700 .compatible = "boe,nv110wtm-n61", 1701 .data = &boe_nv110wtm_n61, 1702 }, { 1703 .compatible = "boe,nv133fhm-n61", 1704 .data = &boe_nv133fhm_n61, 1705 }, { 1706 .compatible = "boe,nv133fhm-n62", 1707 .data = &boe_nv133fhm_n61, 1708 }, { 1709 .compatible = "boe,nv140fhmn49", 1710 .data = &boe_nv140fhmn49, 1711 }, { 1712 .compatible = "friendlyarm,hd702e", 1713 .data = &friendlyarm_hd702e, 1714 }, { 1715 .compatible = "innolux,n116bca-ea1", 1716 .data = &innolux_n116bca_ea1, 1717 }, { 1718 .compatible = "innolux,n116bge", 1719 .data = &innolux_n116bge, 1720 }, { 1721 .compatible = "innolux,n125hce-gn1", 1722 .data = &innolux_n125hce_gn1, 1723 }, { 1724 .compatible = "innolux,p120zdg-bf1", 1725 .data = &innolux_p120zdg_bf1, 1726 }, { 1727 .compatible = "kingdisplay,kd116n21-30nv-a010", 1728 .data = &kingdisplay_kd116n21_30nv_a010, 1729 }, { 1730 .compatible = "lg,lp079qx1-sp0v", 1731 .data = &lg_lp079qx1_sp0v, 1732 }, { 1733 .compatible = "lg,lp097qx1-spa1", 1734 .data = &lg_lp097qx1_spa1, 1735 }, { 1736 .compatible = "lg,lp120up1", 1737 .data = &lg_lp120up1, 1738 }, { 1739 .compatible = "lg,lp129qe", 1740 .data = &lg_lp129qe, 1741 }, { 1742 .compatible = "neweast,wjfh116008a", 1743 .data = &neweast_wjfh116008a, 1744 }, { 1745 .compatible = "samsung,lsn122dl01-c01", 1746 .data = &samsung_lsn122dl01_c01, 1747 }, { 1748 .compatible = "samsung,ltn140at29-301", 1749 .data = &samsung_ltn140at29_301, 1750 }, { 1751 .compatible = "sharp,ld-d5116z01b", 1752 .data = &sharp_ld_d5116z01b, 1753 }, { 1754 .compatible = "sharp,lq123p1jx31", 1755 .data = &sharp_lq123p1jx31, 1756 }, { 1757 /* sentinel */ 1758 } 1759 }; 1760 MODULE_DEVICE_TABLE(of, platform_of_match); 1761 1762 static const struct panel_delay delay_200_500_p2e80 = { 1763 .hpd_absent = 200, 1764 .unprepare = 500, 1765 .prepare_to_enable = 80, 1766 }; 1767 1768 static const struct panel_delay delay_200_500_e50_p2e80 = { 1769 .hpd_absent = 200, 1770 .unprepare = 500, 1771 .enable = 50, 1772 .prepare_to_enable = 80, 1773 }; 1774 1775 static const struct panel_delay delay_200_500_p2e100 = { 1776 .hpd_absent = 200, 1777 .unprepare = 500, 1778 .prepare_to_enable = 100, 1779 }; 1780 1781 static const struct panel_delay delay_200_500_p2e200 = { 1782 .hpd_absent = 200, 1783 .unprepare = 500, 1784 .prepare_to_enable = 200, 1785 }; 1786 1787 static const struct panel_delay delay_200_500_e50 = { 1788 .hpd_absent = 200, 1789 .unprepare = 500, 1790 .enable = 50, 1791 }; 1792 1793 static const struct panel_delay delay_200_500_e50_d50_p2e200 = { 1794 .hpd_absent = 200, 1795 .unprepare = 500, 1796 .enable = 50, 1797 .disable = 50, 1798 .prepare_to_enable = 200, 1799 }; 1800 1801 static const struct panel_delay delay_200_500_e80 = { 1802 .hpd_absent = 200, 1803 .unprepare = 500, 1804 .enable = 80, 1805 }; 1806 1807 static const struct panel_delay delay_200_500_e80_d50 = { 1808 .hpd_absent = 200, 1809 .unprepare = 500, 1810 .enable = 80, 1811 .disable = 50, 1812 }; 1813 1814 static const struct panel_delay delay_80_500_e50 = { 1815 .hpd_absent = 80, 1816 .unprepare = 500, 1817 .enable = 50, 1818 }; 1819 1820 static const struct panel_delay delay_80_500_e80_p2e200 = { 1821 .hpd_absent = 80, 1822 .unprepare = 500, 1823 .enable = 80, 1824 .prepare_to_enable = 200, 1825 }; 1826 1827 static const struct panel_delay delay_200_500_e80_pu100 = { 1828 .hpd_absent = 200, 1829 .unprepare = 500, 1830 .enable = 80, 1831 .pre_unprepare = 100, 1832 }; 1833 1834 static const struct panel_delay delay_100_500_e200 = { 1835 .hpd_absent = 100, 1836 .unprepare = 500, 1837 .enable = 200, 1838 }; 1839 1840 static const struct panel_delay delay_200_500_e200 = { 1841 .hpd_absent = 200, 1842 .unprepare = 500, 1843 .enable = 200, 1844 }; 1845 1846 static const struct panel_delay delay_200_500_e200_d100 = { 1847 .hpd_absent = 200, 1848 .unprepare = 500, 1849 .enable = 200, 1850 .disable = 100, 1851 }; 1852 1853 static const struct panel_delay delay_200_500_e200_d200 = { 1854 .hpd_absent = 200, 1855 .unprepare = 500, 1856 .enable = 200, 1857 .disable = 200, 1858 }; 1859 1860 static const struct panel_delay delay_200_500_e200_d10 = { 1861 .hpd_absent = 200, 1862 .unprepare = 500, 1863 .enable = 200, 1864 .disable = 10, 1865 }; 1866 1867 static const struct panel_delay delay_200_500_e200_d50 = { 1868 .hpd_absent = 200, 1869 .unprepare = 500, 1870 .enable = 200, 1871 .disable = 50, 1872 }; 1873 1874 static const struct panel_delay delay_200_150_e200 = { 1875 .hpd_absent = 200, 1876 .unprepare = 150, 1877 .enable = 200, 1878 }; 1879 1880 static const struct panel_delay delay_200_500_e50_po2e200 = { 1881 .hpd_absent = 200, 1882 .unprepare = 500, 1883 .enable = 50, 1884 .powered_on_to_enable = 200, 1885 }; 1886 1887 static const struct panel_delay delay_200_500_e50_po2e200_d100 = { 1888 .hpd_absent = 200, 1889 .unprepare = 500, 1890 .enable = 50, 1891 .powered_on_to_enable = 200, 1892 .disable = 100, 1893 }; 1894 1895 static const struct panel_delay delay_200_150_e50 = { 1896 .hpd_absent = 200, 1897 .unprepare = 150, 1898 .enable = 50, 1899 }; 1900 1901 static const struct panel_delay delay_200_500_e250 = { 1902 .hpd_absent = 200, 1903 .unprepare = 500, 1904 .enable = 250, 1905 }; 1906 1907 static const struct panel_delay delay_50_500_e200_d200_po2e335 = { 1908 .hpd_absent = 50, 1909 .unprepare = 500, 1910 .enable = 200, 1911 .disable = 200, 1912 .powered_on_to_enable = 335, 1913 }; 1914 1915 static const struct panel_delay delay_200_500_e50_d100 = { 1916 .hpd_absent = 200, 1917 .unprepare = 500, 1918 .enable = 50, 1919 .disable = 100, 1920 }; 1921 1922 static const struct panel_delay delay_80_500_e50_d50 = { 1923 .hpd_absent = 80, 1924 .unprepare = 500, 1925 .enable = 50, 1926 .disable = 50, 1927 }; 1928 1929 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1930 { \ 1931 .ident = { \ 1932 .name = _name, \ 1933 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1934 product_id), \ 1935 }, \ 1936 .delay = _delay \ 1937 } 1938 1939 #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1940 { \ 1941 .ident = { \ 1942 .name = _name, \ 1943 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1944 product_id), \ 1945 }, \ 1946 .delay = _delay, \ 1947 .override_edid_mode = _mode \ 1948 } 1949 1950 /* 1951 * This table is used to figure out power sequencing delays for panels that 1952 * are detected by EDID. Entries here may point to entries in the 1953 * platform_of_match table (if a panel is listed in both places). 1954 * 1955 * Sort first by vendor, then by product ID. 1956 */ 1957 static const struct edp_panel_entry edp_panels[] = { 1958 EDP_PANEL_ENTRY('A', 'U', 'O', 0x0290, &delay_200_500_e50, "B140XTN07.5"), 1959 EDP_PANEL_ENTRY('A', 'U', 'O', 0x04a4, &delay_200_500_e50, "B122UAN01.0"), 1960 EDP_PANEL_ENTRY('A', 'U', 'O', 0x0ba4, &delay_200_500_e50, "B140QAX01.H"), 1961 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), 1962 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1963 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), 1964 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1965 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"), 1966 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1967 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e200, "B116XAK01.6"), 1968 EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"), 1969 EDP_PANEL_ENTRY('A', 'U', 'O', 0x205c, &delay_200_500_e50, "B116XAN02.0"), 1970 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"), 1971 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1972 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"), 1973 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"), 1974 EDP_PANEL_ENTRY('A', 'U', 'O', 0x29c0, &delay_200_500_e50, "B116XAT04.3"), 1975 EDP_PANEL_ENTRY('A', 'U', 'O', 0x30ed, &delay_200_500_e50, "G156HAN03.0"), 1976 EDP_PANEL_ENTRY('A', 'U', 'O', 0x3c9f, &delay_200_500_e50, "B140HAK03.5"), 1977 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), 1978 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"), 1979 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0", 1980 &auo_b116xa3_mode), 1981 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), 1982 EDP_PANEL_ENTRY('A', 'U', 'O', 0x49ba, &delay_200_500_e50, "B116XTN02.3"), 1983 EDP_PANEL_ENTRY('A', 'U', 'O', 0x52b0, &delay_200_500_e50, "B116XAK02.0"), 1984 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1985 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1986 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), 1987 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), 1988 EDP_PANEL_ENTRY('A', 'U', 'O', 0x643d, &delay_200_500_e50, "B140HAN06.4"), 1989 EDP_PANEL_ENTRY('A', 'U', 'O', 0x67a8, &delay_200_500_e200, "B140XTK02.4"), 1990 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), 1991 EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3"), 1992 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 1993 EDP_PANEL_ENTRY('A', 'U', 'O', 0x89ba, &delay_200_500_e50, "B116XAT04.1"), 1994 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8bba, &delay_200_500_e50, "B140UAN08.5"), 1995 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa199, &delay_200_500_e50, "B116XAN06.1"), 1996 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa7b3, &delay_200_500_e50, "B140UAN04.4"), 1997 EDP_PANEL_ENTRY('A', 'U', 'O', 0xb7a9, &delay_200_500_e50, "B140HAK03.3"), 1998 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc4b4, &delay_200_500_e50, "B116XAT04.1"), 1999 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc7ad, &delay_200_500_e50, "B140HAN07.7"), 2000 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc9a8, &delay_200_500_e50, "B140QAN08.H"), 2001 EDP_PANEL_ENTRY('A', 'U', 'O', 0xcb8f, &delay_200_500_e50, "B133HAN06.6"), 2002 EDP_PANEL_ENTRY('A', 'U', 'O', 0xcdba, &delay_200_500_e50, "B140UAX01.2"), 2003 EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"), 2004 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), 2005 2006 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), 2007 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"), 2008 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1"), 2009 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0"), 2010 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), 2011 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), 2012 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), 2013 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), 2014 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"), 2015 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"), 2016 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"), 2017 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"), 2018 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), 2019 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), 2020 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), 2021 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"), 2022 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), 2023 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 2024 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), 2025 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21"), 2026 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 2027 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), 2028 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"), 2029 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), 2030 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), 2031 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"), 2032 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 2033 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), 2034 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"), 2035 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), 2036 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), 2037 EDP_PANEL_ENTRY('B', 'O', 'E', 0x090d, &delay_200_500_e50, "NT140WHM-N4T"), 2038 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 2039 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 2040 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"), 2041 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 2042 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0964, &delay_200_500_e50, "NV133WUM-N61"), 2043 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"), 2044 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 2045 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0985, &delay_200_500_e50, "NE160QDM-NY1"), 2046 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 2047 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"), 2048 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"), 2049 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"), 2050 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 2051 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a1b, &delay_200_500_e50, "NV133WUM-N63"), 2052 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a25, &delay_200_500_e50_po2e200, "NV133FHM-N4F V8.0"), 2053 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), 2054 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80_d50, "NV116WHM-N49"), 2055 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 2056 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a6a, &delay_200_500_e80, "NV140WUM-N44"), 2057 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a84, &delay_200_500_e50, "NV133WUM-T01"), 2058 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 2059 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41"), 2060 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0af2, &delay_200_500_e50_p2e80, "NE140QDM-NX2"), 2061 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b09, &delay_200_500_e50_po2e200, "NV140FHM-NZ"), 2062 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b1e, &delay_200_500_e80, "NE140QDM-N6A"), 2063 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80_d50, "NV122WUM-N41"), 2064 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"), 2065 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"), 2066 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G"), 2067 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b85, &delay_200_500_e50, "NT140WHM-T05"), 2068 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"), 2069 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c26, &delay_200_500_p2e200, "NV140WUM-T08"), 2070 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c6f, &delay_200_500_e50, "NV140FHM-N40"), 2071 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c93, &delay_200_500_e200, "Unknown"), 2072 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"), 2073 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cc9, &delay_200_500_e50, "NE120DRM-N28"), 2074 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf2, &delay_200_500_e200, "NV156FHM-N4S"), 2075 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf6, &delay_200_500_e200_d100, "NV140WUM-N64"), 2076 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"), 2077 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d45, &delay_200_500_e80, "NV116WHM-N4B"), 2078 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d73, &delay_200_500_e80, "NE140WUM-N6S"), 2079 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d98, &delay_200_500_e50_po2e200_d100, "NV140FHM-N5B"), 2080 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0db3, &delay_200_500_e80, "NV153WUM-N42"), 2081 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ddf, &delay_200_500_e80, "NV116WHM-T01"), 2082 EDP_PANEL_ENTRY('B', 'O', 'E', 0x386e, &delay_200_500_e80, "NV116WH2-M30"), 2083 EDP_PANEL_ENTRY('B', 'O', 'E', 0x3879, &delay_200_500_e80, "NT116WHM-N21"), 2084 EDP_PANEL_ENTRY('B', 'O', 'E', 0x388b, &delay_200_500_e80, "NV116FH1-M31"), 2085 EDP_PANEL_ENTRY('B', 'O', 'E', 0x388c, &delay_200_500_e80, "NV116FH1-M30"), 2086 2087 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), 2088 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"), 2089 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"), 2090 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 2091 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), 2092 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"), 2093 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), 2094 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 2095 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 2096 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 2097 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 2098 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), 2099 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"), 2100 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"), 2101 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115d, &delay_200_500_e80_d50, "N116BCA-EA2"), 2102 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"), 2103 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115f, &delay_200_500_e80_d50, "N116BCL-EAK"), 2104 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2105 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2"), 2106 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1163, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2107 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1169, &delay_200_500_e80_d50, "N116BCN-EA1"), 2108 EDP_PANEL_ENTRY('C', 'M', 'N', 0x116c, &delay_200_500_e80_d50, "N116BCP-EA2"), 2109 EDP_PANEL_ENTRY('C', 'M', 'N', 0x116d, &delay_200_500_e80_d50, "N116BCP-EA2"), 2110 EDP_PANEL_ENTRY('C', 'M', 'N', 0x117a, &delay_200_500_e80_d50, "N116BCL-EAK"), 2111 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 2112 EDP_PANEL_ENTRY('C', 'M', 'N', 0x124c, &delay_200_500_e80_d50, "N122JCA-ENK"), 2113 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"), 2114 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"), 2115 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1441, &delay_200_500_e80_d50, "N140JCA-ELK"), 2116 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"), 2117 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), 2118 EDP_PANEL_ENTRY('C', 'M', 'N', 0x148f, &delay_200_500_e80, "N140HCA-EAC"), 2119 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14a8, &delay_200_500_e80, "N140JCA-ELP"), 2120 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14c7, &delay_200_500_e80, "N140HCA-EEK"), 2121 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 2122 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80, "N140BGA-E54"), 2123 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"), 2124 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1565, &delay_200_500_e80, "N156HCA-EAB"), 2125 EDP_PANEL_ENTRY('C', 'M', 'N', 0x156b, &delay_200_500_e80_d50, "N153JCA-ELK"), 2126 EDP_PANEL_ENTRY('C', 'M', 'N', 0x162b, &delay_200_500_e80_d50, "N160JCE-ELL"), 2127 EDP_PANEL_ENTRY('C', 'M', 'N', 0x7402, &delay_200_500_e200_d50, "N116BCA-EAK"), 2128 2129 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_d50_p2e200, "MNC207QS1-1"), 2130 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1413, &delay_200_500_e50_d50_p2e200, "MNE007JA1-2"), 2131 2132 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"), 2133 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"), 2134 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50_d100, "MNB601LS1-4"), 2135 EDP_PANEL_ENTRY('C', 'S', 'W', 0x110a, &delay_200_500_e50, "PNB601LS1-2"), 2136 EDP_PANEL_ENTRY('C', 'S', 'W', 0x110d, &delay_200_500_e50, "MNB601LS1-8"), 2137 EDP_PANEL_ENTRY('C', 'S', 'W', 0x143f, &delay_200_500_e50, "MNE007QS3-6"), 2138 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"), 2139 EDP_PANEL_ENTRY('C', 'S', 'W', 0x144b, &delay_200_500_e80, "MNE001BS1-4"), 2140 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8"), 2141 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1462, &delay_200_500_e50, "MNE007QS5-2"), 2142 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1468, &delay_200_500_e50, "MNE007QB2-2"), 2143 EDP_PANEL_ENTRY('C', 'S', 'W', 0x146e, &delay_80_500_e50_d50, "MNE007QB3-1"), 2144 EDP_PANEL_ENTRY('C', 'S', 'W', 0x147c, &delay_200_500_e50_d100, "MNE007QB3-1"), 2145 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1486, &delay_200_500_e50_d100, "MNE001BS6-2"), 2146 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1519, &delay_200_500_e80_d50, "MNF601BS1-3"), 2147 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1529, &delay_200_500_e80_d50, "MNF307QS3-2"), 2148 EDP_PANEL_ENTRY('C', 'S', 'W', 0x153f, &delay_200_500_e200_d50, "MNF601BS4-1"), 2149 2150 EDP_PANEL_ENTRY('E', 'T', 'C', 0x0000, &delay_50_500_e200_d200_po2e335, "LP079QX1-SP0V"), 2151 2152 EDP_PANEL_ENTRY('H', 'K', 'C', 0x1203, &delay_200_500_e80, "MB116AS01'3"), 2153 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), 2154 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "MB116AN01"), 2155 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"), 2156 2157 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"), 2158 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 2159 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 2160 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 2161 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"), 2162 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8cd5, &delay_200_500_e200_d10, "M140NWFQ R5"), 2163 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8ce6, &delay_200_500_e200, "R140NWFW R0"), 2164 2165 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), 2166 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 2167 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"), 2168 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 2169 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16"), 2170 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1707, &delay_200_150_e50, "KD116N2130B12"), 2171 2172 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0110, &delay_200_500_e50, "KD116N3730A07"), 2173 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0397, &delay_200_500_e50, "KD116N3730A12"), 2174 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"), 2175 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"), 2176 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), 2177 EDP_PANEL_ENTRY('K', 'D', 'C', 0x1220, &delay_200_500_e50, "KD116N3730A05"), 2178 2179 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"), 2180 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"), 2181 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"), 2182 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"), 2183 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"), 2184 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"), 2185 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"), 2186 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"), 2187 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"), 2188 EDP_PANEL_ENTRY('L', 'G', 'D', 0x06b2, &delay_200_500_e200_d200, "LP129WT232166"), 2189 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"), 2190 EDP_PANEL_ENTRY('L', 'G', 'D', 0x07fe, &delay_200_500_e200_d200, "LP116WHA-SPB1"), 2191 2192 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 2193 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"), 2194 EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"), 2195 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 2196 EDP_PANEL_ENTRY('S', 'H', 'P', 0x158f, &delay_200_500_p2e100, "LQ134Z1"), 2197 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1593, &delay_200_500_p2e100, "LQ134N1"), 2198 EDP_PANEL_ENTRY('S', 'H', 'P', 0x15a7, &delay_200_500_e200, "LQ120P1JX51"), 2199 2200 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0004, &delay_200_500_e200, "116KHD024006"), 2201 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0009, &delay_200_500_e250, "116QHD024002"), 2202 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 2203 2204 EDP_PANEL_ENTRY('T', 'M', 'A', 0x0811, &delay_200_500_e80_d50, "TM140VDXP01-04"), 2205 EDP_PANEL_ENTRY('T', 'M', 'A', 0x2094, &delay_200_500_e50_d100, "TL140VDMS03-01"), 2206 EDP_PANEL_ENTRY('T', 'M', 'A', 0x2139, &delay_200_500_e80_pu100, "TM156VDXP25"), 2207 2208 { /* sentinal */ } 2209 }; 2210 2211 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid) 2212 { 2213 const struct edp_panel_entry *panel; 2214 2215 if (!panel_id) 2216 return NULL; 2217 2218 /* 2219 * Match with identity first. This allows handling the case where 2220 * vendors incorrectly reused the same panel ID for multiple panels that 2221 * need different settings. If there's no match, try again with panel 2222 * ID, which should be unique. 2223 */ 2224 for (panel = edp_panels; panel->ident.panel_id; panel++) 2225 if (drm_edid_match(edid, &panel->ident)) 2226 return panel; 2227 2228 for (panel = edp_panels; panel->ident.panel_id; panel++) 2229 if (panel->ident.panel_id == panel_id) 2230 return panel; 2231 2232 return NULL; 2233 } 2234 2235 static int panel_edp_platform_probe(struct platform_device *pdev) 2236 { 2237 const struct of_device_id *id; 2238 2239 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 2240 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 2241 if (!id) 2242 return -ENODEV; 2243 2244 return panel_edp_probe(&pdev->dev, id->data, NULL); 2245 } 2246 2247 static void panel_edp_platform_remove(struct platform_device *pdev) 2248 { 2249 panel_edp_remove(&pdev->dev); 2250 } 2251 2252 static void panel_edp_platform_shutdown(struct platform_device *pdev) 2253 { 2254 panel_edp_shutdown(&pdev->dev); 2255 } 2256 2257 static const struct dev_pm_ops panel_edp_pm_ops = { 2258 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 2259 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 2260 pm_runtime_force_resume) 2261 }; 2262 2263 static struct platform_driver panel_edp_platform_driver = { 2264 .driver = { 2265 .name = "panel-edp", 2266 .of_match_table = platform_of_match, 2267 .pm = &panel_edp_pm_ops, 2268 }, 2269 .probe = panel_edp_platform_probe, 2270 .remove = panel_edp_platform_remove, 2271 .shutdown = panel_edp_platform_shutdown, 2272 }; 2273 2274 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 2275 { 2276 const struct of_device_id *id; 2277 2278 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 2279 if (!id) 2280 return -ENODEV; 2281 2282 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 2283 } 2284 2285 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 2286 { 2287 panel_edp_remove(&aux_ep->dev); 2288 } 2289 2290 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 2291 { 2292 panel_edp_shutdown(&aux_ep->dev); 2293 } 2294 2295 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2296 .driver = { 2297 .name = "panel-simple-dp-aux", 2298 .of_match_table = platform_of_match, /* Same as platform one! */ 2299 .pm = &panel_edp_pm_ops, 2300 }, 2301 .probe = panel_edp_dp_aux_ep_probe, 2302 .remove = panel_edp_dp_aux_ep_remove, 2303 .shutdown = panel_edp_dp_aux_ep_shutdown, 2304 }; 2305 2306 static int __init panel_edp_init(void) 2307 { 2308 int err; 2309 2310 err = platform_driver_register(&panel_edp_platform_driver); 2311 if (err < 0) 2312 return err; 2313 2314 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2315 if (err < 0) 2316 goto err_did_platform_register; 2317 2318 return 0; 2319 2320 err_did_platform_register: 2321 platform_driver_unregister(&panel_edp_platform_driver); 2322 2323 return err; 2324 } 2325 module_init(panel_edp_init); 2326 2327 static void __exit panel_edp_exit(void) 2328 { 2329 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2330 platform_driver_unregister(&panel_edp_platform_driver); 2331 } 2332 module_exit(panel_edp_exit); 2333 2334 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2335 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2336 MODULE_LICENSE("GPL and additional rights"); 2337